Abstract: A method of controlling a solenoid valve having a solenoid coil and a poppet includes energizing a first node to a first voltage, and coupling the first node to the solenoid coil and energizing the solenoid coil using a pulse-width-modulated (PWM) signal having a frequency and a duty cycle configured to regulate a current conducted through the solenoid coil to below an opening threshold. The method further includes energizing a second node to a second voltage with energy stored in the solenoid coil, and coupling the second node to the solenoid coil and energizing the solenoid coil using a DC signal configured to increase the current to above the opening threshold. The method further includes coupling the first node to the solenoid coil and energizing the solenoid coil using the PWM signal having a frequency and duty cycle configured to regulate the current to above a closing threshold.

Abstract: A magnetic resonance system may include a magnetic resonance magnet and a storage container configured to accommodate the magnetic resonance magnet. The storage container may also contain an endothermic liquid. The magnetic resonance system may further include a ramping-down device configured to trigger releasing electric energy by the magnetic resonance magnet. The first ramping-down device may include an electric energy consumption device configured to consume at least a portion of the released electric energy by the magnetic resonance magnet.

Abstract: Provided is an electrostatic adsorption body capable of exhibiting a high adsorption force, especially with respect to a highly insulative sheet-like object to be adsorbed, such as a cloth, while using an electrical adsorption force. This electrostatic adsorption body, which uses electrostatic force to adsorb an object to be adsorbed, is provided with: a laminate sheet in which a 20-200 ?m-thick insulator, a 1-20 ?m-thick electrode layer, and a 20-200 ?m-thick resin film are sequentially laminated; and a power supply device that applies a voltage to the electrode layer, wherein the resin film at least has a tensile modulus of 1 MPa or more and less than 100 MPa and a volume resistivity of 1×1010-1013 ? cm, the electrode layer is composed of a bipolar electrode including a positive electrode and a negative electrode, and an object to be adsorbed is adsorbed using the resin film as an adsorption surface due to an electrostatic adsorption force that is generated by applying a voltage to the electrode layer.

Abstract: A surge suppression device includes a plurality of series circuits each of which is composed of a resistor and a capacitor, a case in which a plurality of the resistors and a plurality of the capacitors are placed, wherein respective ends of the plurality of series circuits on the capacitor side are electrically connected to each other via a connection electrode provided on the case. A motor wiring component includes a plurality of conductive wires connected to stator coils of the motor, wiring terminals that are provided at ends of the plurality of conductive wires on a side opposite to the side connected to the stator coils and are connected to electrodes of a terminal block, and the surge suppression device.

Abstract: An ESD protection circuit includes a power MOS transistor disposed between a first line and a second line, a clamp circuit disposed between the first line and a first node to which a gate of the power MOS transistor is coupled, a first resistor disposed between the first node and the second line, a MOS transistor disposed between the first node and the second line, a third line supplied with a third potential generated by a constant-voltage circuit of the protection target circuit, and a second resistor and a first capacitor coupled in series between a second node coupled to the third line and the second line, wherein when defining a junction between the second resistor and the first capacitor as a third node, a gate of the MOS transistor is coupled to the third node.

Abstract: A semiconductor device includes first and second protection circuits. The first protection circuit includes a timer circuit, a voltage detection circuit, and a discharge element. The second protection circuit includes a discharge circuit. The timer circuit is connected between a first pad on a power supply potential side and a second pad on a reference potential side. The voltage detection circuit is connected between the first and second pads on an output side of the timer circuit. The discharge element is connected between the first and second pads on an output side of the voltage detection circuit. The discharge circuit is connected between a third pad on the power supply potential side and a fourth pad on the reference potential side on the output side of the timer circuit.

Abstract: A system and method for reducing charge on a workpiece disposed on a platen is disclosed. The system includes an ionizer to generate ionized gas from the source of backside gas. The ionizer may be used to introduce ionized gas into the backside gas channels of the platen. A controller is used to selectively allow backside gas and/or ionized gas into the backside gas channels. In certain embodiments, the platen also includes an exhaust channel in communication with an exhaust valve to ensure that the pressure within the volume between the top surface of the platen and the workpiece is maintained in a desired range. In one embodiment, the system includes a valving system in communication with the source of backside gas and also in communication with the ionizer. In another embodiment, the amount of ionization performed by the ionizer is programmable.

Abstract: An electrical outlet receptacle including a circuit board defining a first plane and a solenoid having a central axis perpendicular to the first plane. The electrical outlet receptacle further including a reset plunger with a portion extending through the first end of the solenoid and axially movable therein, and an armature movable axially along the portion of the reset plunger extending through the solenoid. Wherein the armature includes a slanted projection configured to contact a cam surface of a slide mechanism and provide the downward force on the cam surface.

Abstract: In some aspects of the present disclosure, an electrostatic discharge (ESD) protection circuit is disclosed. In some aspects, the ESD protection circuit includes a first transistor coupled to a pad, a second transistor coupled between the first transistor and ground, a stack of transistors coupled to the first transistor, and an ESD clamp coupled between the stack of transistors and the ground.

Abstract: An integrated circuit is provided with a protected circuit wherein a first FinFET operably coupled to a signal node is protected against electrostatic discharge voltage damage by a standard cell electrostatic discharge protection circuit which is connected between first and second voltage supplies and which includes a first FinFET diode connected between the signal node and the first voltage supply, and a second FinFET diode connected between the signal node and the second voltage supply, where the first and second FinFET diodes are each formed with a FinFET device comprising (1) a body well region forming a first diode terminal connected to one of the first or second voltage supplies, and (2) a shorted gate, source, and drain regions forming a second diode terminal connected to the signal node.

Abstract: A line protector circuit comprises an external side switch circuit coupled to an external circuit node of the line protector circuit, an internal side switch circuit coupled in series to the external side switch circuit and an internal circuit node of the line protector circuit, a high supply circuit node and a low supply circuit node, and switch control circuitry configured to deactivate the internal side switch circuit and divert a bias current from the external side switch to the low supply circuit node when the external voltage exceeds a high supply voltage of the high supply circuit node.

Abstract: An electrostatic discharge protection circuit includes a pull-down switch, a dummy pattern arranged parallel to the pull-down switch in a first direction, clamp switches arranged parallel to each other in the first direction between the dummy pattern and the pull-down switch, and a resistor configured to transfer a power supply voltage supplied through a power terminal to a gate pattern of the pull-down switch by being arranged parallel to the pull-down switch. Drains of the clamp switches are coupled in common to the power terminal, sources of the clamp switches are coupled in common to a ground terminal, and a first end of the pull-down switch and a second end of the resistor are coupled to each other through a first conductive line extending in the first direction, the pull-down switch, the resistor and the first conductive line are formed in a same layer.

Abstract: The present disclosure provides an electrostatic protection device and an electrostatic protection circuit. The electrostatic protection device includes: a discharge transistor, located on a substrate for discharging electrostatic charges; and a first pad, located on a first metal layer and electrically connected to a drain region of the discharge transistor; wherein a projection of the first pad on the substrate partially overlaps a projection of the drain region on the substrate.

Abstract: An ESD protection circuit that includes a clamp path including two clamp transistors and a GIDL detection circuit for detecting GIDL current conditions in the ESD protection circuit. The GIDL detection circuit generates a signal indicative of a GIDL current condition. The signal is utilized to control a voltage of a control electrode of a clamp transistor of the clamp path to increase the conductivity of the clamp transistor when the signal is indicative of a GIDL current condition to minimize a GIDL current through at least through a portion of the clamp path when the second clamp transistor is nonconductive where no ESD current is being discharged through the clamp path.

Abstract: An ESD power clamp device includes an ESD detection circuit; a controlling circuit coupled with the ESD detection circuit; a field effect transistor (FET) coupled with the controlling circuit, and an impedance element coupled with the FET. The FET includes a drain terminal coupled with a first supply node; a gate terminal coupled with the controlling circuit; a source terminal coupled with a second supply node via the impedance element; and a bulk terminal coupled with second supply node.

Abstract: An Electrostatic Discharge (ESD) protection circuit includes a first discharge path and a second discharge path. The first discharge path is located between a first potential terminal and a second potential terminal. The second discharge path is located between the first potential terminal and the second potential terminal, and is connected to the first discharge path in parallel. The first discharge path and the second discharge path are used for discharging electrostatic charges. At least one of the first discharge path and the second discharge path includes a Silicon Controlled Rectifier (SCR).

Abstract: An electrostatic discharge (ESD) circuit includes an ESD detection circuit, a clamp circuit and an ESD assist circuit. The ESD detection circuit is coupled between a first and a second node. The first node has a first voltage. The second node has a second voltage. The clamp circuit includes a first transistor having a first gate, a first drain, a first source and a first body terminal. The first gate is coupled to at least the ESD detection circuit by a third node. The first drain is coupled to the second node. The first source and the first body terminal are coupled together at the first node. The ESD assist circuit is coupled between the first node and the third node, and is configured to clamp a third voltage of the third node at the first voltage during an ESD event at the first node or the second node.

Abstract: An electro-static discharge (ESD) protection circuit is electrically connected to a first pad and a second pad. The ESD protection circuit includes an ESD transistor having a control terminal, a first terminal electrically connected to the first pad, a second terminal electrically connected to the second pad, and a substrate end; and an electro-static pulse detection circuit having an upper terminal electrically connected to the first pad, a lower terminal electrically connected to the second pad, and an output terminal electrically connected to the control terminal and the substrate end of the ESD transistor.

Abstract: An ESD protection apparatus includes a discharge resistor and a transistor connected in series between a first voltage rail and a second voltage rail, a first coupling capacitor, a diode and a first bias resistor connected in series between the first voltage rail and the second voltage rail, wherein a common node of the diode and the first bias resistor is connected to a gate of the transistor, and an ESD protection device connected between the first voltage rail and the second voltage rail.

Abstract: A tuned single-coil inductor is implemented between a signal driver output and external contact of an ESD-protected integrated circuit (IC) die and more specifically between the parasitic capacitances of the signal driver and the contact-coupled ESD (electrostatic discharge) element to form a Pi (?) filter that enhances signaling bandwidth at the target signaling rate of the IC die. The signal driver may be implemented with output-stage data serialization circuitry disposed in series between source terminals of a thick-oxide drive transistor and a power rail to avoid explicit level-shifting circuitry between the relatively low core voltage domain and relatively high I/O voltage domain.