Patents Examined by Duy Deo
  • Patent number: 9863057
    Abstract: A coated substrate is formed with aligned objects such as small molecules, macromolecules and nanoscale particulates, such as inorganic, organic or inorganic/organic hybrid materials. In accordance with one or more embodiments, an apparatus or method involves an applicator having at least one surface patterned with protruded or indented features, and a coated substrate including a solution-based layer of objects having features and morphology attributes arranged as a function of the protruded or indented features.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: January 9, 2018
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Zhenan Bao, Ying Diao, Stefan Christian Bernhardt Mannsfeld, Chee-Keong Tee, Hector A. Becerril-Garcia, Yan Zhou
  • Patent number: 9856583
    Abstract: A method of manufacturing a silicon carbide single crystal includes steps of preparing a crucible, a source material disposed toward a bottom surface in the crucible, a seed crystal disposed to face the source material toward a top surface in the crucible, a resistive heater, and a heat insulator configured to be able to accommodate the crucible therein, measuring a mass of at least a portion of the heat insulator, comparing a measured value of the mass obtained in the measuring step with a threshold value, and growing a silicon carbide single crystal on the seed crystal by sublimation of the source material by heating the crucible placed in the heat insulator with the resistive heater. When the measured value of the mass is lower than the threshold value in the comparing step, the step of growing a silicon carbide single crystal is performed at least one or more times.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: January 2, 2018
    Inventors: Shin Harada, Tsutomu Hori
  • Patent number: 9850571
    Abstract: The invention belongs to the technical field of inorganic compounds, and particularly, relates to a method for directly preparing graphene by taking CBr4 as a source material and using methods such as molecular-beam epitaxy (MBE) or chemical vapor deposition (CVD). A method for preparing graphene comprises the following steps: selecting a proper material as a substrate; directly depositing a catalyst and CBr4 on a surface of the substrate; and performing annealing treatment on the sample obtained through deposition. Compared with other technologies, an innovative point of the method in the invention is that the catalyst and CBr4 source can be quantitatively and controllably deposited on any substrate, and the catalyst and CBr4 source react on the surface of the substrate to form the graphene, so that the dependence of the graphene growth on a substrate material can be reduced to a great extent, and different substrate materials can be selected according to different application backgrounds.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: December 26, 2017
    Inventors: Shumin Wang, Qian Gong, Xiaoming Xie, Hailong Wang, Zengfeng Di, Guqiao Ding, Qingbo Liu
  • Patent number: 9845549
    Abstract: A crucible having a top surface, a bottom surface opposite to the top surface, and a tubular side surface located between the top surface and the bottom surface, a resistive heater provided outside of the crucible and made of carbon, a source material provided in the crucible, and a seed crystal provided to face the source material in the crucible are prepared. A silicon carbide single crystal is grown on the seed crystal by sublimating the source material with the resistive heater. In the step of growing a silicon carbide single crystal, a value obtained by dividing a value of a current flowing through the resistive heater by a cross-sectional area of the resistive heater perpendicular to a direction in which the current flows is maintained at 5 A/mm2 or less.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: December 19, 2017
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Tsutomu Hori
  • Patent number: 9840767
    Abstract: A manufacturing method for a head slider coated with Diamond-like Carbon (DLC) includes: providing a substrate that is to be finally made into a head slider; depositing a DLC layer on a surface of the substrate, with carbon plasma source being sputtered in a direction that is vertical to the surface of the substrate; and doping a fluorine-doping (F-doping) layer on the DLC layer. Whereby the head slider has good film adhesion performance, higher hardness, better wear resistance, lower surface energy to obtain good hydrophobicity and oleophobicity, and lower fly height in HDD.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: December 12, 2017
    Assignee: SAE MAGNETICS (H.K.) LTD.
    Inventors: Jian Hui Huang, Xiao Ke Ding, Hong Tao Ma, Ryuji Fujii, Da Yao He, De Jin Fan
  • Patent number: 9834854
    Abstract: A process for producing a lithium-manganese-nickel oxide spinel material includes maintaining a solution comprising a dissolved lithium compound, a dissolved manganese compound, a dissolved nickel compound, a hydroxycarboxylic acid, a polyhydroxy alcohol, and, optionally, an additional metallic compound, at an elevated temperature T1, where T1 is below the boiling point of the solution, until the solution gels. The gel is maintained at an elevated temperature until it ignites and burns to form a Li—Mn—Ni—O powder. The Li—Mn—Ni—O powder is calcined to burn off carbon and/or other impurities present in the powder. The resultant calcined powder is optionally subjected 1 to microwave treatment, to obtain a treated powder, which is annealed to crystallize the powder. The resultant annealed material is optionally subjected to microwave treatment. At least one of the microwave treatments is carried out. The lithium-manganese-nickel oxide spinel material is thereby obtained.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: December 5, 2017
    Assignee: CSIR
    Inventors: Kenneth Ikechukwu Ozoemena, Charl Jeremy Jafta
  • Patent number: 9834703
    Abstract: A polishing composition of the present invention is to be used for polishing an object including a portion containing a group III-V compound material. The polishing composition contains abrasive grains, an oxidizing agent, and a water-soluble polymer. When the polishing composition is left to stand for one day in an environment with a temperature of 25° C., the water-soluble polymer may be adsorbed on the abrasive grains at 5,000 or more molecules per 1 ?m2 of the surface area of the abrasive grains. Alternatively, the water-soluble polymer may be a compound that reduces the water contact angle of the portion containing a group III-V compound material of the object after being polished with the polishing composition.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: December 5, 2017
    Inventors: Shuugo Yokota, Yasuyuki Yamato, Satoru Yarita, Tomohiko Akatsuka
  • Patent number: 9831097
    Abstract: The present disclosure provides methods for etching a silicon material in a device structure in semiconductor applications. In one example, a method for etching features in a silicon material includes performing a remote plasma process formed from an etching gas mixture including HF gas without nitrogen etchants to remove a silicon material disposed on a substrate.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: November 28, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Anchuan Wang, Zihui Li, Mikhail Korolik
  • Patent number: 9831081
    Abstract: In embodiment, the method includes cleaning a preceding substrate, and drying the preceding substrate and cleaning a next substrate. Drying the preceding substrate and cleaning the next substrate include determining a cleaning start time of the next substrate, and the cleaning start time corresponds to a desired time point after starting drying the preceding substrate.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: November 28, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jihoon Jeong, Jung-Min Oh, Kuntack Lee, Hyosan Lee
  • Patent number: 9824892
    Abstract: A method for growing semiconductor wafers by lateral diffusion liquid phase epitaxy is described. Also provided are a refractory device for practicing the disclosed method and semiconductor wafers prepared by the disclosed method and device. The disclosed method and device allow for significant cost and material waste savings over current semiconductor production technologies.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: November 21, 2017
    Assignee: McMaster University
    Inventors: Adrian Kitai, Haoling Yu, Bo Li
  • Patent number: 9825226
    Abstract: Provided is a method for manufacturing a conductive film. The method for manufacturing a conductive film includes providing a polymer thin-film on a base film, treating the polymer thin-film by using 10 M to 15 M of nitric acid, and washing the polymer thin-film treated with nitric acid. The nitric acid treatment is performed at room temperature for about 7 minutes to about 13 minutes.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: November 21, 2017
    Inventors: Sun Jin Yun, Changbong Yeon
  • Patent number: 9822468
    Abstract: A method for producing a SiC single crystal by a solution process is provided, which allows generation of miscellaneous crystals to be reduced. Method for producing a SiC single crystal wherein a crucible has thickness Lu in horizontal direction at same height as liquid level of Si—C solution, and thickness Ld in horizontal direction at same height as bottom inner wall, Ld/Lu is 2.00 to 4.21, and thickness in horizontal direction of crucible monotonously increases between Lu and Ld from Lu toward Ld, wall thickness of crucible is 1 mm or greater, bottom thickness Lb in vertical direction of crucible is between 1 mm and 15 mm, bottom outer wall of crucible has flat section with area of 100 mm2 or greater, depth of Si—C solution from bottom inner wall is 30 mm or greater, and method includes heating and electromagnetic stirring Si—C solution with high-frequency coil.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: November 21, 2017
    Inventors: Hironori Daikoku, Kazuhito Kamei, Kazuhiko Kusunoki, Kazuaki Seki, Yutaka Kishida
  • Patent number: 9820386
    Abstract: A method of forming an electronic assembly. The method includes covering a patterned conductive layer that is on a dielectric layer with a solder resist; depositing a metal layer on to the solder resist; depositing a photo resist onto the metal layer; patterning the photo resist; etching the metal layer that is exposed from the photo resist to form a metal mask; removing the photo resist; and plasma etching the solder resist that is exposed from the metal mask. An electronic assembly for securing for an electronic card. The electronic assembly includes a patterned conductive layer that is on a dielectric layer; and a solder resist covering the patterned conductive layer and the dielectric layer, wherein the solder resist includes openings that expose the patterned conductive layer, wherein the openings in the solder resist only have organic material on side walls of the respective openings.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: November 14, 2017
    Assignee: Intel Corporation
    Inventors: Kristof Darmawikarta, Rahul Jain, Robert Alan May, Sheng Li, Sri Ranga Sai Boyapati
  • Patent number: 9815029
    Abstract: This invention discloses a method for preparing an antibacterial and dust-removal membrane. The method comprises the following steps: depositing a layer of nano-ZnO on the immersed membrane surface as the seed crystal with the atomic layer deposition instrument (ALD instrument); vertically immersing the membrane covered with nano-ZnO layer in a hydrothermal reactor filled with crystal growth solution, heating it for a period of time, taking the membrane out and cooling it to the room temperate, and removing it from the substrate; finally, heating this membrane in a drier, and purging it with nitrogen to remove the paraffin within the membrane pore to obtain the porous membrane with nano-ZnO arrays growing on the surface.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: November 14, 2017
    Assignee: Nanjing Tech University
    Inventors: Zhaoxiang Zhong, Xibo Wu, Zhong Yao
  • Patent number: 9809886
    Abstract: A method of machining a nickel containing alloy gas turbine engine component (34) comprises applying a material removal gas comprising gaseous carbon monoxide at a nickel carbonyl gas forming temperature such as 50 to 60° C. to a surface of the component to form a nickel carbonyl gas, and thereby remove a surface layer from at least part of the component.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: November 7, 2017
    Assignee: ROLLS-ROYCE plc
    Inventors: Daniel Clark, Andrew Robert Walpole
  • Patent number: 9812349
    Abstract: One system includes a chamber, a chuck assembly, and an ion source. The chuck assembly includes a substrate support and a precession assembly with a center support coupled to a stationary center point of an under region of the substrate support. The precession assembly includes first and second actuators connected to first and second locations, respectively, that are in the under region off-set from the center point. The precession assembly imparts a precession motion to the substrate support when the first actuator and the second actuator move up and down relative to the center support, and the precession motion imparted to the substrate causes a rotating tilt of the substrate support without rotation of the substrate support. The rotating tilt of the substrate is configured to cause ions generated by the ion source to impinge upon a surface of the substrate in continually varying angles of incidence.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: November 7, 2017
    Assignee: Lam Research Corporation
    Inventors: Ivelin Angelov, Ivan L. Berry, III
  • Patent number: 9812334
    Abstract: A corrosion method of a passivation layer (320) of a silicon wafer (300) includes: pouring hydrofluoric acid solution (100) into a container (200) with an open top; putting the silicon wafer (300) to the opening of the container (200) and one side of the silicon wafer (300) with the passivation layer (320) is opposite to the hydrofluoric acid solution (100); the hydrogen fluoride gas generated from the volatilization of the hydrofluoric acid solution (100) corrodes the passivation layer (320) of the silicon wafer (300), the corrosion time is larger or equal to (thickness of the passivation layer/corrosion rate). By means of the corrosion of the passivation layer of silicon wafer by the fluoride gas generated from the volatilization of the hydrofluoric acid solution, the fluoride gas can fully touch the passivation layer; therefore the passivation layer can be completely corroded, and the corrosion precision is high.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: November 7, 2017
    Assignee: CSMC Technologies Fab1 Co., Ltd.
    Inventor: Qiliang Sun
  • Patent number: 9805946
    Abstract: Among other things, one or more systems and techniques for removing a photoresist from a semiconductor wafer are provided. The photoresist is formed over the semiconductor wafer for patterning or material deposition. Once completed, the photoresist is removed in a manner that mitigates damage to the semiconductor wafer or structures formed thereon. In an embodiment, trioxygen liquid is supplied to the photoresist. The trioxygen liquid is activated using an activator, such as an ultraviolet activator or a hydrogen peroxide activator, to create activated trioxygen liquid used to remove the photoresist. In an embodiment, the activation of the trioxygen liquid results in free radicals that aid in removing the photoresist. In an embodiment, an initial photoresist strip, such as using a sulfuric acid hydrogen peroxide mixture, is performed to remove a first portion of the photoresist, and the activated trioxygen liquid is used to remove a second portion of the photoresist.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: October 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shang-Yuan Yu, Shao-Yen Ku, Hsiao Chien-Wen, Shao-Fu Hsu, Yuan-Chih Chiang, Wen-Chang Tsai, Jui-Chuan Chang
  • Patent number: 9803107
    Abstract: The present invention relates to a polishing agent including: cerium oxide particles; a water-soluble polyamine; potassium hydroxide; at least one selected from an organic acid and a salt thereof; and water, in which the polishing agent has a pH of 10 or more, a polishing method using the polishing agent, and a method for manufacturing a semiconductor integrated circuit device.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: October 31, 2017
    Inventors: Masaru Suzuki, Toshihiko Otsuki
  • Patent number: 9805939
    Abstract: The present invention provides a method and apparatus for etching a photomask substrate with enhanced process monitoring, for example, by providing for optical monitoring at certain regions of the photomask to obtain dual endpoints, e.g., etch rate or thickness loss of both a photoresist layer and an absorber layer. By monitoring transmissity of an optical beam transmitted through areas having photoresist layer and etched absorber layer at two different predetermined wavelength, dual process endpoints may be obtained by a signal optical detection.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: October 31, 2017
    Inventor: Michael N. Grimbergen