Abstract: A method includes providing a semiconductor wafer that includes at least one optical waveguide extending in a longitudinal direction. Stealth dicing laser processing is applied to the semiconductor wafer by producing defect regions into the wafer along at least one cutting line. The cutting line is oblique to the longitudinal direction of the at least one optical waveguide. The wafer is expanded to induce fracture thereof at the at least one cutting line, thereby producing an end surface of the at least one optical waveguide. The end surface is oblique to the longitudinal direction of the at least one optical waveguide.
Abstract: A method for forming contacts on a semiconductor device includes depositing conductive material in one or more trenches and over an etch stop layer to a height above the etch stop layer, patterning a resist on the conductive material with shapes over one or more source/drain regions in the one or more trenches, and forming one or more trench lines in the one or more trenches and one or more self-aligned contacts below the shapes, including subtractively etching the conductive material to remove the conductive material from over the etch stop layer and to recess the conductive material into the one or more trenches without the shapes.
Type:
Grant
Filed:
May 15, 2018
Date of Patent:
July 14, 2020
Assignee:
International Business Machines Corporation
Inventors:
Joshua M. Rubin, Balasubramanian Pranatharthiharan
Abstract: The reliability of a semiconductor device is improved. A photoresist pattern is formed over a semiconductor substrate. Then, over the semiconductor substrate, a protective film is formed in such a manner as to cover the photoresist pattern. Then, with the photoresist pattern covered with the protective film, an impurity is ion implanted into the semiconductor substrate. Thereafter, the protective film is removed by wet etching, and then, the photoresist pattern is removed.
Abstract: Asymmetric, semiconductor memory cells, arrays, devices and methods are described. Among these, an asymmetric, bi-stable semiconductor memory cell is described that includes: a floating body region configured to be charged to a level indicative of a state of the memory cell; a first region in electrical contact with the floating body region; a second region in electrical contact with the floating body region and spaced apart from the first region; and a gate positioned between the first and second regions, such that the first region is on a first side of the memory cell relative to the gate and the second region is on a second side of the memory cell relative to the gate; wherein performance characteristics of the first side are different from performance characteristics of the second side.
Abstract: An imaging device includes a photoelectric converter including first and second electrodes, a photoelectric conversion layer therebetween, and a hole-blocking layer between the first electrode and the photoelectric conversion layer; and a signal detection circuit electrically connected to the first electrode. The hole-blocking material has an electron affinity lower than both a work function of the first conducting material and an electron affinity of the first photoelectric conversion material. The photoelectric conversion unit is applied with a voltage between the first and second electrodes, and responsive to the voltage within a range from a first voltage to a second voltage, shows that a density of current passing between the first and second electrodes when light is incident on the photoelectric conversion layer becomes substantially equal to that when no light is incident thereon. A difference between the first voltage and the second voltage is 0.5 V or more.
Abstract: A solar cell module and a method of manufacturing the same are provided. The method of manufacturing a solar cell module includes forming a plurality of strings to which a plurality of solar cells are connected; disposing a target string at a repair device, the target string including a target solar cell having a defect; separating the target solar cell from the target string by selectively thermally processing a connection area of a target intercell connector and the plurality of conductive wirings fixed to the target solar cell; disposing a new solar cell at the target string; and connecting the plurality of conductive wirings fixed to the new solar cell to the target intercell connector.
Type:
Grant
Filed:
August 25, 2017
Date of Patent:
June 30, 2020
Assignee:
LG ELECTRONICS INC.
Inventors:
Daeseon Hyun, Bojoong Kim, Byungjun Kang, Junhan Kwon, Minpyo Kim
Abstract: A multijunction solar cell comprising at least a first subcell and a second subcell, a first alpha layer disposed over said first solar subcell grown using a surfactant and dopant including selenium or tellurium, the first alpha layer configured to prevent threading dislocations from propagating; a metamorphic grading interlayer disposed over and directly adjacent to said first alpha layer; a second alpha layer grown using a surfactant and dopant including selenium or tellurium over and disposed directly adjacent to said grading interlayer to prevent threading dislocations from propagating; wherein the second solar subcell is disposed over said grading interlayer such that the second solar subcell is lattice mismatched with respect to the first solar subcell.
Type:
Grant
Filed:
March 24, 2017
Date of Patent:
June 30, 2020
Assignee:
SolAero Technologies Corp.
Inventors:
Benjamin Cho, Yong Lin, Pravin Patel, Mark Stan, Arthur Cornfeld, Daniel McGlynn, Fred Newman
Abstract: An optical modulator and a 3D image acquisition apparatus including an optical modulator are provided. The optical modulator is disposed in a multiple quantum well including a plurality of quantum wells and a plurality of quantum barriers, and includes at least one carrier block disposed in the multiple quantum well restricting the carrier movement between the multiple quantum wells.
Type:
Grant
Filed:
February 7, 2018
Date of Patent:
June 30, 2020
Assignee:
SAMSUNG ELECTRONICS CO., LTD.
Inventors:
Chang-young Park, Yong-hwa Park, Sang-hun Lee
Abstract: A method of forming a multijunction solar cell comprising at least a first subcell and a second subcell, the method including forming a first alpha layer over said first solar subcell using a surfactant and dopant including selenium or tellurium, the first alpha layer configured to prevent threading dislocations from propagating; forming a metamorphic grading interlayer over and directly adjacent to said first alpha layer; forming a second alpha layer using a surfactant and dopant including selenium or tellurium over and directly adjacent to said grading interlayer to prevent threading dislocations from propagating; and forming the second solar subcell over said grading interlayer such that the second solar subcell is lattice mismatched with respect to the first solar subcell.
Type:
Grant
Filed:
March 8, 2017
Date of Patent:
June 23, 2020
Assignee:
SolAero Technologies Corp.
Inventors:
Benjamin Cho, Yong Lin, Pravin Patel, Mark Stan, Arthur Cornfeld, Daniel McGlynn, Fred Newman
Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
Type:
Grant
Filed:
January 24, 2017
Date of Patent:
June 23, 2020
Assignee:
Micron Technology, Inc.
Inventors:
Jong Won Lee, Gianpaolo Spadini, Derchang Kau
Abstract: A magnetic system containing a plurality of stacked layer arrays, each of which includes a first anti-ferromagnetic (AFM1) layer, a heavy metal (HM) layer formed of a material having strong spin-orbit coupling, and, optionally, a ferromagnetic (FM) layer or a second anti-ferromagnetic (AFM2) layer. Also disclosed is a method of preparing such a magnetic system.
Abstract: Light emitting diode (LED) apparatuses and methods having a high lumen output density. An example apparatus can include a substrate with one or more LEDs enclosed by an encapsulant. The encapsulant comprises beveled edges and/or top surface facets. By providing facets in the encapsulant and minimizing the chip-to-area ratio through efficient via placement, a high lumen density is achieved. Facets and bevels can be created by removing material from the encapsulant with a beveled blade.
Type:
Grant
Filed:
July 19, 2017
Date of Patent:
June 2, 2020
Assignee:
Cree, Inc.
Inventors:
Troy Gould, Colin Kelly Blakely, Jesse Colin Reiherzer, Craig William Hardin
Abstract: Described are semiconductor devices and methods of making semiconductor devices with a barrier layer comprising cobalt and manganese nitride. Also described are semiconductor devices and methods of making same with a barrier layer comprising CoMn(N) and, optionally, an adhesion layer.
Type:
Grant
Filed:
April 23, 2018
Date of Patent:
May 26, 2020
Assignee:
Applied Materials, Inc.
Inventors:
Sang Ho Yu, Paul F. Ma, Jiang Lu, Ben-Li Sheu
Abstract: Provided is a light emitting device capable of reducing light attenuation within the element and having high light extraction efficiency, and a method of manufacturing the light emitting device. The light emitting device has a light emitting element having a light transmissive member and semiconductor stacked layer portion, electrodes disposed on the semiconductor stacked layer portion in this order. The light emitting element has a first region and a second region from the light transmissive member side. The light transmissive member has a third region and a fourth region from the light emitting element side. The first region has an irregular atomic arrangement compared with the second region. The third region has an irregular atomic arrangement compared with the fourth region. The first region and the third region are directly bonded.
Abstract: A method to fabricate a non-planar memory device including forming a multi-layer silicon nitride structure substantially perpendicular to a top surface of the substrate. There may be multiple non-stoichiometric silicon nitride layers, each including a different or same silicon richness value from one another.
Abstract: A machine that is capable of assembling a copy of itself from a feedstock of parts is described. The machine operates on a lattice or grid on which it is able to move and from which it receives power and control signals. The machine (assembler) is composed of modules that each perform some functionality. In the simplest case, only three module types are needed: a linear step module, a gripper, and an anchor. The linear step module is capable of moving from one lattice location to the next, the gripper module is capable of gripping other modules, and the anchor module is capable of attaching the machine to the grid. With these three primitives it is possible for this simple machine to move on the grid using inchworm-like motions, pick up other modules, and assemble a copy of itself.
Type:
Grant
Filed:
October 31, 2016
Date of Patent:
April 21, 2020
Assignee:
Massachusetts Institute of Technolog
Inventors:
William Kai Langford, Amanda Ghassaei, Neil Gershenfeld
Abstract: The present invention relates to IC chips containing a mixture of standard cells obtained from an original set of design rules and enhanced standard cells that are a variant of the original set of design rules and methods for making the same.
Abstract: A method of fabricating a vertical fin field effect transistor with a merged top source/drain, including, forming a source/drain layer at the surface of a substrate, forming a plurality of vertical fins on the source/drain layer; forming protective spacers on each of the plurality of vertical fins, forming a sacrificial plug between two protective spacers, forming a filler layer on the protective spacers not in contact with the sacrificial plug, and selectively removing the sacrificial plug to form an isolation region trench between the two protective spacers.
Type:
Grant
Filed:
June 15, 2017
Date of Patent:
March 31, 2020
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Abstract: Contact holes of solar cells are formed by laser ablation to accommodate various solar cell designs. Use of a laser to form the contact holes is facilitated by replacing films formed on the diffusion regions with a film that has substantially uniform thickness. Contact holes may be formed to deep diffusion regions to increase the laser ablation process margins. The laser configuration may be tailored to form contact holes through dielectric films of varying thicknesses.
Type:
Grant
Filed:
October 26, 2017
Date of Patent:
March 31, 2020
Assignee:
SunPower Corporation
Inventors:
Gabriel Harley, David D. Smith, Tim Dennis, Ann Waldhauer, Taeseok Kim, Peter John Cousins
Abstract: A multi-stage inversion method for deblending seismic data includes: a) acquiring blended seismic data from a plurality of seismic sources; b) constructing an optimization model that includes the acquired blended seismic data and unblended seismic data; c) performing sparse inversion, via a computer processor, on the optimization model; d) estimating high-amplitude coherent energy from result of the performing sparse inversion in c); e) re-blending the estimated high-amplitude coherent energy; and f) computing blended data with an attenuated direct arrival energy.
Type:
Grant
Filed:
December 18, 2015
Date of Patent:
March 31, 2020
Assignee:
ConocoPhillips Company
Inventors:
Chengbo Li, Chuck Mosher, Leo Ji, Joel Brewer