Abstract: A display device includes: a central area having a display area on a substrate; and a peripheral area around the central area; a plurality of pads arranged along one direction in the central area; a plurality of insulating patterns adjacent the plurality of pads; and a slit between the plurality of insulating patterns in the peripheral area, wherein the slit is formed by removing at least a portion of an insulating material of the plurality of insulating patterns.

Abstract: A method of fabricating a display panel including a display region having a first pixel region where pixels are disposed, and a sensing region having a second pixel region where pixel groups are disposed and a light transmitting part disposed between the pixel groups, is discussed. The method can include forming a light shield layer at least in the sensing region, wherein the light shield layer includes an opening hole corresponding to the light transmitting part and exposes the light transmitting part to a laser beam through the opening hole. The method can further include forming a metal layer spaced apart from the light blocking layer in the first pixel region of the display region and the sensing region, and irradiating the laser beam to at least the sensing region to remove the metal layer from the light transmitting part.

Abstract: The present disclosure provides a display substrate, a method for manufacturing the same, and a display device. The display substrate includes a drive circuit layer disposed on a base substrate and a light emitting structure layer disposed on a side of the drive circuit layer away from the base substrate. The light emitting structure layer includes an anode, an organic light emitting layer, a cathode, and an auxiliary electrode. The organic light emitting layer is respectively connected to the anode and the cathode, and the cathode is connected to the auxiliary electrode; in a plane parallel to the display substrate, an edge of the auxiliary electrode is provided with a structure depressed towards a center of the auxiliary electrode.

Abstract: A method is provided for fabricating an encapsulated emissive element. Beginning with a growth substrate, a plurality of emissive elements is formed. The growth substrate top surface is conformally coated with an encapsulation material. The encapsulation material may be photoresist, a polymer, a light reflective material, or a light absorbing material. The encapsulant is patterned to form fluidic assembly keys having a profile differing from the emissive element profiles. In one aspect, prior to separating the emissive elements from the handling substrate, a fluidic assembly keel or post is formed on each emissive element bottom surface. In one variation, the emissive elements have a horizontal profile. The fluidic assembly key has horizontal profile differing from the emissive element horizontal profile useful in selectively depositing different types of emissive elements during fluidic assembly.

Abstract: A method of manufacturing a semiconductor device, including preparing a semiconductor substrate having a main surface, forming a device element structure on the main surface, forming a protective film on the main surface of the semiconductor substrate to protect the device element structure, the protective film having an opening therein, forming at least one material film in a predetermined pattern on the main surface of the semiconductor substrate and in the opening of the protective film, the at least one material film being separate from the protective film by a distance of less than 1 mm, forming a resist film on the main surface of the semiconductor substrate, covering the protective film and the at least one material film, the resist film having an opening therein corresponding to an inducing region for impurity defects, and inducing the impurity defects in the semiconductor substrate, using the resist film as a mask.

Abstract: This method of evaluating a SiC substrate includes a preparation step of preparing two or more SiC substrates obtained from the same SiC ingot grown from the same seed crystal, a defect position specifying step of specifying positions of defects in the substrates by observing a main surface of each of the two or more SiC substrates, and a comparison step of comparing the positions of the defects of the two or more SiC substrates, in which, in the preparation step, a SiC substrate positioned closest to the seed crystal is used as a reference wafer among the two or more SiC substrates, and the comparison step comprises a sub-step wherein a first defect of the reference wafer is compared with a second defect of a SiC substrate other than the reference wafer, it is judged whether a defect distance of the two compared defects in a [11-20] direction is 0.6 mm or more or less than 0.

Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.

Abstract: Embodiments of 3D memory devices and fabricating methods thereof are disclosed. The method comprises forming an array device semiconductor structure comprising an alternating conductor/dielectric stack disposed on a semiconductor layer, and an array interconnect layer disposed on the alternating conductor/dielectric stack and including a first interconnect structure. The method further comprises a peripheral device disposed on a substrate, and a peripheral interconnect layer disposed on the peripheral device and including a second interconnect structure and a pad. The pad is electrically connected with the peripheral device through the second interconnect structure. The method further comprises bonding the array interconnect layer to the peripheral interconnect layer, such that the first interconnect structure is joined with the second interconnect structure. The method further comprises forming a pad opening exposing a surface of the pad.

Abstract: Methods and devices to build and use multi-functional scattering structures. The disclosed methods and devices account for multiple target functions and can be implemented using fabrication methods based on two-photon polymerization or multi-layer lithography. Exemplary devices functioning as wave splitters are also described. Results confirming the performance and benefits of the disclosed teachings are also described.

Abstract: A method and apparatus are provided for a spectroscopic measurement for determining a lateral recess depth in the sidewall of a microstructure. The structure is formed on a larger substrate with the sidewall in an upright position relative to the substrate, and the recess extends essentially parallel to the substrate. The recess may be an etch depth obtained by etching a first layer relative to two adjacent layers, the layers oriented parallel to the substrate, the etch process progressing inward from the sidewall. An incident energy beam falling on the structure generates a spectroscopic response captured and processed respectively by a detector and a processing unit. The response comprises one or more peaks related to the material or materials of the substrate and the structure. According to the method, a parameter is derived from said one or more peaks, that is representative of the lateral recess depth.

Abstract: A flexible electroluminescent display apparatus can include a flexible substrate including an active area and a bending area extending from the active area; a thin film transistor disposed on the active area and including a semiconductor layer, a gate electrode, a source electrode and a drain electrode; an planarization layer disposed on the thin film transistor; a light emitting element disposed on the planarization layer in the active area and connected to the thin film transistor through a connection electrode; and a first wiring line and a second wiring line disposed in the bending area, in which the first wiring line, the source electrode and the drain electrode are configured as a same layer, and the second wiring line and the connection electrode are configured as a same layer, and the first wiring line and the second wiring line are directly connected to each other.

Abstract: The present disclosure describes a semiconductor device having a channel structure with profile control. The semiconductor device includes a fin structure on a substrate. The fin structure includes a bottom portion on the substrate and a top portion including multiple semiconductor layers. The semiconductor device further includes a gate structure wrapped around the multiple semiconductor layers and a source/drain (S/D) structure on the bottom portion of the fin structure and in contact with the plurality of semiconductor layers. The S/D structure extends into end portions of the multiple semiconductor layers.

Abstract: The present invention provides an array substrate and a manufacturing method thereof, the array substrate forms a dual U-shaped conductor structure encompassing a first thin film transistor and a second thin film transistor by a first light shielding layer, a second light shielding layer, a first shielding layer, and a second shielding layer to perfectly shield moving charges in the film layer under the thin film transistor and the film layers on two sides of the thin film transistor outside the dual U-shaped conductor structure to keep excellent electrical properties of a device.

Abstract: Embodiments of the present disclosure relate to a display device including a substrate, an optical device located under the substrate in a display area, and a subpixel layer located over the substrate in the display area, wherein the subpixel layer includes at least one of first transistor with a first characteristic are located at a first area overlapping with the optical device, and at least one of second transistor with a second characteristic are located at a second area not overlapping with the optical device.

Abstract: An electronic device can include a substrate, an active region of a transistor, and a shield electrode. The substrate can define a trench and include a mesa adjacent to the trench, and the shield electrode can be within the trench. In an embodiment, the electronic device can further include an active region of a transistor within the mesa and an insulating layer including a thicker section and a thinner section closer to a bottom of the trench. In another embodiment, the electronic device can include a body region and a doped region within the mesa and spaced apart from the body region by a semiconductor region. The doped region can have a dopant concentration that is higher than a dopant concentration of the semiconductor region and a portion of the substrate underlying the doped region.

Abstract: Methods for, apparatuses with, and vertical 3D memory devices are described. A vertical 3D memory device may comprise: a plurality of contacts associated with a plurality of digit lines and extending through a substrate; a plurality of word line plates separated from one another by respective dielectric layers and including a first plurality of word line plates and a second plurality of word line plates; a dielectric material positioned between the first plurality and the second plurality of word line plates, the dielectric material extending in a serpentine shape over the substrate; a plurality of pillars formed over and coupled with the plurality of contacts; and a plurality of storage elements each comprising chalcogenide material positioned in a recess between a respective word line plate and a respective pillar, wherein the recess is of an arch-shape, and the chalcogenide material in the recess contacts the respective word line plate.

Abstract: A display device includes a substrate, a first data fan-out line disposed on the substrate, a first data line disposed on the first data fan-out line and comprising a repair area overlapping the first data fan-out line, a color filter disposed on the first data line and overlapping the repair area, and a connection electrode disposed in the repair area and being in direct contact with the first data fan-out line and the first data line.

Abstract: A method for manufacturing a semiconductor structure includes: a substrate is provided, and Shallow Trench Isolation (STI) structures are formed in the substrate, the STI structures isolating a plurality of Active Areas (AAs) spaced in the substrate; word line trenches are formed in the substrate; an etch protection layer is formed on a surface of the first protruding structure; the STI structure is partially removed to form a second protruding structure based on the first protruding structure; the lower portion of the second protruding structure is etched to make a width of the lower portion of the second protruding structure smaller than a width of an upper portion of the second protruding structure; and a word line structure is formed in the word line trench.

Abstract: According to one embodiment, in a manufacturing method of a display device, a first lower electrode, a second lower electrode and a third lower electrode are formed. A rib having first aperture overlapping the first lower electrode, a second aperture overlapping the second lower electrode, and a third aperture overlapping the third lower electrode is formed. A first thin film including a first light emitting layer is formed on the first lower electrode. A second thin film including a second light emitting layer is formed on the second lower electrode. An area of the first aperture is larger than an area of the second aperture.

Abstract: A method for manufacturing a data line includes: forming a conductive layer on a substrate; forming a photoresist layer on a side of the conductive layer away from the substrate; exposing and then developing the photoresist layer to form a groove penetrating the photoresist layer, thus obtaining a patterned photoresist layer; and depositing a functional material electrochemically on the patterned photoresist layer, then removing the patterned photoresist layer to obtain the conductive layer with the patterned functional material layer, thereby obtaining the data line.