Abstract: The present invention discloses an electroluminescent display and a display device, the electroluminescent display comprising a base substrate and a plurality of pixel units arranged in arrays on the base substrate. Each pixel unit is composed of at least four subpixel units, and each pixel unit comprises at least three luminescent material layers. Each luminescent material layer at least covers two adjacent subpixel units, and only one luminescent material layer in each subpixel unit emits light. Since each luminescent material layer at least covers two adjacent subpixel units, when a luminescent material is evaporated and coated by an evaporation coating process, the subpixel units can be made smaller with the size of the mask plate unchanged, which is helpful for improving the resolution of the display.

Abstract: A semiconductor device includes an active pattern provided on a substrate and a gate electrode crossing over the active pattern. The active pattern includes a first buffer pattern on the substrate, a channel pattern on the first buffer pattern, a doped pattern between the first buffer pattern and the channel pattern, and a second buffer pattern between the doped pattern and the channel pattern. The doped pattern includes graphene injected with an impurity.

Abstract: Methods to improve the accuracy of non-contact measurements of an object's dimensions using a dimensioning system are disclosed. The methods include a method for creating a mathematical model (i.e., error model) based on an observed correlation between errors in an estimated dimension and the characteristics of the measurement used to obtain the estimated dimension. These error models may be created for various dimensions and stored for future use. The methods also include a method for using the stored error models to reduce the error associated with a particular dimensioning-system measurement. Here an error model is used to create an estimated error. The estimated error is then removed from the estimate of the dimension to produce a final estimate of the dimension that is more accurate.

Abstract: A method of manufacturing a semiconductor apparatus, includes forming a first trench on a side of a first face of a semiconductor substrate having the first face and a second face, forming a gettering region by implanting ions in the semiconductor substrate through the first trench, and forming a second trench on the side of the first face of the semiconductor substrate after the forming the gettering region. A depth of a bottom surface of the second trench with reference to the first face is smaller than a depth of a bottom surface of the first trench with reference to the first face.

Abstract: An organic semiconductor element functions as a strain sensor, and includes a substrate and an organic semiconductor layer formed on the substrate as a single-crystal thin film of an organic semiconductor that is a polycyclic aromatic compound with four or more rings or a polycyclic compound with four or more rings including one or a plurality of unsaturated five-membered heterocyclic compounds and a plurality of benzene rings. Since the organic semiconductor layer is formed as the single-crystal thin film, an identical crystal structure is obtained regardless of formation technique. Therefore, when the same strain is given, the same carrier mobility is obtained and uniform property is obtained with respect to the strain. Accordingly, it is possible to provide strain sensors having uniform property.

Abstract: A method of forming a semiconductor device includes providing a precursor. The precursor includes a substrate; a gate stack over the substrate; a first dielectric layer over the gate stack; a gate spacer on sidewalls of the gate stack and on sidewalls of the first dielectric layer; and source and drain (S/D) contacts on opposing sides of the gate stack. The method further includes recessing the gate spacer to at least partially expose the sidewalls of the first dielectric layer but not to expose the sidewalls of the gate stack. The method further includes forming a spacer protection layer over the gate spacer, the first dielectric layer, and the S/D contacts.

Abstract: A method of making a solid state semiconducting film. The method includes blending a non-conjugated semiconducting polymer matrix containing crystalline aggregates with intentionally placed conjugation-break spacers along the polymer backbone, and fully conjugated semiconducting polymer. The resulting blend is subjected to a film making method to result is a semiconducting film. A solid state semiconducting film comprising a non-conjugated semiconducting polymer matrix containing crystalline aggregates with intentionally placed conjugation-break spacers along the polymer backbone, and a fully conjugated semiconducting polymer, wherein the fully conjugated semiconducting polymer serves as tie chains to bridge crystalline aggregates from the non-conjugated polymer matrix. Devices made from these semiconductor films.

Abstract: According to an embodiment, the present invention provides an array substrate that includes a base substrate and a number of film layers provided on the base substrate. The base substrate is provided with an installation slot that provides an installation space for a hardware structure. A packaging-reserved slot is defined in a number of film layers and extending through at least a part of the film layers. The installation slot extends through the base substrate in a thickness direction of the array substrate, and the packaging-reserved slot surrounds the installation slot.

Abstract: A semiconductor structure is provided in which an L-shaped airgap spacer is located between a functional gate structure and a source/drain contact structure. The L-shaped airgap spacer is sandwiched between a lower dielectric material spacer that is L-shaped and an upper dielectric material spacer that is also L-shaped.

Abstract: Provided is a method for manufacturing an inorganic material having a tensile stress, which includes: forming an inorganic stressor from an inorganic wafer made of an inorganic matter; forming an inorganic layer on the inorganic stressor; and etching a bulk inorganic matter at a lower portion of the inorganic stressor to generate an inorganic material having a tensile stress, wherein the inorganic layer has a tensile stress by etching the bulk inorganic matter to relieve a compressive stress applied to the inorganic stressor when the inorganic stressor is being formed. Therefore, FET and various circuits having higher charge mobility may be realized, and also, since characteristics may be maintained even when being applied to a plastic substrate, high performance flexible electronic device may be manufactured.

Abstract: There is installed a configuration that includes a process container; a heater chamber exhaust duct configured to discharge an air that has cooled a space at which a heater is installed; a gas box exhaust duct configured to suck and discharge an atmosphere in a gas box; a scavenger exhaust duct configured to suck and discharge an atmosphere in a scavenger; a local exhaust duct configured to suck and discharge an atmosphere in a local exhaust port installed in a transfer chamber; an exhaust damper valve including an opening degree variable mechanism installed in at least one selected from the group of the heater chamber exhaust duct, the gas box exhaust duct, the scavenger exhaust duct, and the local exhaust duct; and a controller configured to remotely control an opening degree of the exhaust damper valve.

Abstract: An analyte monitoring platform consisting of a proximity communicator and an implantable biosensor that includes system architecture for biosensor authentication, identification and methods to use analyte sensors for general wellness. The system architecture also permits multi-analyte sensing. In addition, the system and methods can be used for a single analyte or combination of analytes.

Abstract: In an ultraviolet LED chip, an epitaxial structure can be isolated into two insulated structures, i.e. a first and a second epitaxial structures by growing the epitaxial structure on a surface of a substrate, and arranging an insulating layer and a groove contacting layer in the middle of the epitaxial structure. The N-type AlGaN layer is stretched out through the groove contacting layer. In the ultraviolet LED chip, through the cooperation among the N electrode, P electrode and intermediate electrode on the base plate along with the first and second epitaxial structures, an LED and an ESD are formed respectively. The ESD is connect to the ends of LED in anti-parallel for providing an electrostatic discharging channel, so as to reduce the direct damage of the ultraviolet LED chip caused by electrostatic discharging, and increase a forward voltage of the LED and the antistatic intensity.

Abstract: A display device includes a substrate including a display area and a non-display area disposed around the display area; a fan-out unit disposed in the non-display area and including a first pad unit and a first fan-out line electrically connected to the first pad unit; a first signal line disposed on a different layer from the first fan-out line and including a first area overlapping the first fan-out line; a first switching element disposed on the display area and electrically connected to the first signal line and a first pixel electrode; and a color filter overlapping the first area.

Abstract: The semiconductor device includes a first insulating layer; a first oxide insulating layer over the first insulating layer; an oxide semiconductor layer over the first oxide insulating layer; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a second oxide insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a gate insulating layer over the second oxide insulating layer; a gate electrode layer over the gate insulating layer; a second insulating layer over the first insulating layer the source electrode layer, the drain electrode layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer, and a third insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, and the second insulating layer.

Abstract: A method for preparing an OLED display substrate of an embodiment of the present disclosure comprises: providing a substrate comprising pixel definition regions each for defining a pixel unit, and forming a first electrode in the pixel unit; forming a pixel definition structure and an auxiliary electrode in the pixel definition region, the pixel definition structure being configured to separate the first electrode from the auxiliary electrode; forming a phase transition structure; forming a light-emitting layer to cover the phase transition structure and the first electrode; exciting the phase transition structure to contract the phase transition structure, thereby causing the light-emitting layer to be broken at a position corresponding to the contraction of the phase transition structure to form an opening; and forming a second electrode, such that the second electrode covers the light-emitting layer and is electrically connected to the auxiliary electrode through the opening.

Abstract: A manufacturing method of a light-emitting device includes steps of: providing a substrate with a top surface, wherein the top surface comprises a plurality of concavo-convex structures; forming a semiconductor stack on the top surface; forming a trench in the semiconductor stack to define a plurality of second semiconductor stacks and expose a first upper surface; forming a scribing region which extends from the first upper surface into the semiconductor stack and exposes a side surface of the semiconductor stack to define a plurality of first semiconductor stacks; removing a portion of the plurality of first semiconductor stacks and a portion of the concavo-convex structures trough the region to form a first side wall of each of the first semiconductor stack; and dividing the substrate along the region; wherein the first side wall and the top surface form an acute angle ? between thereof, 30°???80°.

Abstract: The present application discloses systems and methods of providing different functionality to EAC devices using multiple algorithm/operand pairs, each tied to one or more different functions.

Abstract: One illustrative integrated circuit product disclosed herein includes a single diffusion break (SDB) isolation structure positioned between a first fin portion and a second fin portion, wherein the first fin portion comprises a first end surface and the second fin portion comprises a second end surface. In this example, the SDB structure includes a conformal liner layer that engages the first end surface of the first fin portion and the second end surface of the second fin portion, an insulating material positioned on the conformal liner layer, a cap structure positioned above an upper surface of the insulating material and an air gap positioned between a bottom surface of the cap structure and the upper surface of the insulating material.

Abstract: An integrated circuit (IC) device comprises a substrate having a metal-oxide-semiconductor (MOS) region; a gate region disposed over the substrate and in the MOS region; and source/drain features in the MOS region and separated by the gate region. The gate region includes a fin structure and a nanowire over the fin structure. The nanowire extends from the source feature to the drain feature.