Abstract: A method for moving data includes identifying, by a staging manager in a container, a trigger condition associated with data being used by an application external to the container, performing an analysis on the trigger condition, making a first determination, based on the analysis, that the trigger condition is satisfied, and processing, based on the first determination, a data movement action.

Abstract: Methods, systems, and devices for a multi-port storage-class memory interface are described. A memory controller of the storage-class memory subsystem may receive, from a host device, a request associated with host addresses. The memory controller may generate interleaved addresses with a low latency based on the host addresses. The interleaved addresses parallelize processing of the request utilizing a set of memory media ports. Each memory media port of the set of memory media port may operate independent of each other to obtain a desired aggregated data transfer rate and a memory capacity. The interleaved address may leave no gaps in memory space. The memory controller may control a wear-leveling operation to distribute access operations across one or more zones of the memory media port.

Abstract: An expansion card may include a printed circuit board and a hardware accelerator that is disposed on the printed circuit board. The hardware accelerator may include application-specific hardware circuitry designed to perform a computing task. The hardware accelerator may also offload a portion of the computing task from a central processing unit of a computing device by executing, via the application-specific hardware circuitry, the portion of the computing task. The expansion card may further include an edge connector, disposed on the printed circuit board, that is dimensioned to be inserted into an expansion socket of the computing device. The edge connector may couple the hardware accelerator to the central processing unit via a computing bus connected to the expansion socket. The edge socket may also include a pinout that is more compact than a pinout specification defined for the computing bus. Various other apparatuses, systems, and methods are also disclosed.

Abstract: A computing device receives a response comprising one or more data sets corresponding to an identifier. The computing device identifies a first data set identifier in the response that signals the beginning of a first data set and edits the first data set to comprise a first keyboard stroke entry prefix understood by a second computing device as defining the first data set as a first particular type of data and a keyboard stroke entry suffix understood by the second computing device as defining an end of the first data set. The computing device identifies and edits a second data set. The edited first and second data sets are transmitted to the second computing device, where it processes the data sets based on the keyboard stroke entry prefixes and recognizes the end of the data sets based on the keyboard stroke entry suffix.

Abstract: Configuration devices in a module. In some embodiments a radio-frequency module includes a serial bus including a first serial data line and a second serial data line. The radio-frequency module also includes a control component coupled to the serial bus and the first switch, the control component configured to determine whether first data is detected on the first serial data line, determine whether second data is detected on the second serial data line, and decode a command based on the first data and second data when the first data is detected on the first serial data line and when the second data is detected on the second serial data line.

Abstract: Provided are an application management method, a storage medium, and an electronic apparatus. The method includes: collecting a plurality of characteristic information of an application; learning the plurality of characteristic information to obtain a self-organizing neural network model of the application; calculating a first characteristic coefficient of the application; determining a second characteristic coefficient from the characteristic coefficient matrix according to the first characteristic coefficient; and judging whether the application can be cleaned up according to the second characteristic coefficient.

Abstract: A method for automatically configuring a portable device comprises determining a position of the portable device and automatically configuring the portable device based on the determined position.

Abstract: A memory system, a memory controller and an operating method are disclosed. By inputting a read command to the memory device, starting to input data for a write command when the write command is input to the memory device while the memory device performs a read sensing operation for the read command, and inputting, to the memory device, data for the write command when input of the write command is started, it is possible to enhance the write performance of the memory system when the memory system executes a write operation after a read operation.

Abstract: In one embodiment, an apparatus is provided. The apparatus includes a first interface configured to communicate with a computing device. The apparatus also includes a second interface configured to communicate with a data storage device. The apparatus further includes a processing device coupled to the first interface and the second interface. The processing device is configured to receive, from the computing device via the first interface, a request to measure a set of performance metrics for the data storage device. The processing device is also configured to identify a set of commands used to measure the set of performance metrics for the data storage device. The processing device is further configured to determine whether the set of commands has been performed by the data storage device.

Abstract: A temperature detector (201) of an input unit (200) acquires a temperature of the input unit (200). A temperature detector (301) of an output unit (300) acquires a temperature of the output unit (300). When the temperature of the input unit (200) or the output unit (300) satisfies a preset condition, an input/output manager (101) of the CPU unit (100) controls passage/blockage of a signal from the detector (901) to the input unit (200) or a signal from the output unit (300) to a control target device (902) in accordance with preset content of signal input/output restriction.

Abstract: A transmission apparatus is capable of accessing a register of a cable satisfactorily. An inquiry about the presence or absence of a register in a cable connected between the transmission apparatus and a reception apparatus is performed. In response to the inquiry, information indicating the presence or absence of the register is received from the cable. When the information indicates the presence of the register, the register of the cable is accessed so that acquisition of storage data or writing in the storage data is performed.

Abstract: High-efficiency control technology for non-volatile memory is shown. A controller allocates spare blocks of a non-volatile memory to provide a first active block and writes data issued by a host to the first active block. When the number of spare blocks is less than a threshold number and valid data of a first source block is less than a critical data amount, the controller uses the first active block as a data transfer destination for the valid data from the first source block.

Abstract: A system to send a first command to a first memory die of a plurality of memory dies of a memory sub-system the first command to execute an initialization process. The system reads a first bit value from the first memory die, the first bit value indicating the first memory die is executing a peak current phase of the initialization process. The system reads a second bit value from the first memory die, the second bit value indicating the first memory die is executing a safe phase of the initialization process. In response to reading the second bit value, a second command is sent to a second memory die to execute the initialization process.

Abstract: A controller for controlling a memory device includes: a buffer including a plurality of segments; and a buffer manager suitable for deciding a segment attribute for each of the segments that represents one or more kinds of buffer allocation request for which the corresponding segment is allocable, deciding a priority allocation for each of the segments based on the segment attribute of the corresponding segment, and when a buffer allocation request is received, allocating one or more segments among the plurality of segments based on the segment attribute and the priorities of each of the non-allocated segments relative to the segment attributes.

Abstract: Systems and methods for facilitating interactions with remote memory are disclosed. An observing task can execute in a first environment allocated to a first memory space, and a second memory space can be remote from the observing task. An interposition system proxy can invoke at least one function implemented using an ad hoc polymorphic programming language feature to facilitate requests from the observing task to the second memory space. This can include traversing a data structure for at least one target object, resolving an address in the second memory space based on the traversal, and at least one of reading data from and writing data to the resolved address in the second memory space.

Abstract: Apparatuses and methods relating to an enhanced serial peripheral interface (eSPI) port expander circuitry are described. In an embodiment, an apparatus includes an upstream eSPI port, a plurality of downstream eSPI ports, and an eSPI aggregator. The upstream eSPI port is to operate as an eSPI slave on an upstream eSPI bus. Each of the plurality of downstream eSPI ports is to operate as an eSPI master on a corresponding one of a plurality of downstream eSPI buses. The eSPI aggregator is to forward or broadcast transactions from the upstream eSPI bus to one or more of the plurality of downstream eSPI buses and to aggregate responses from one or more of the downstream eSPI buses.

Abstract: A fault-tolerant data storage system associates durability requirements of service level agreements (SLAs) for volumes stored in the fault-tolerant data storage system with volume partitions stored in the fault-tolerant data storage system. For a given volume partition, volume data is stored in two or more replicas on two or more different system components and/or erasure encoded across multiple other system components. The fault-tolerant data storage system uses the respective durability requirements of the SLAs and failure statistics of the system components to allocate bandwidth for replacing lost instances of redundantly stored volume data such that the lost data is replaced within a target time calculated to guarantee the durability requirements of the SLAs are satisfied.

Abstract: Systems and methods are disclosed for routing of streaming data as between multiple compute resources. For example, the system may comprise a processor, a field programmable gate array (FPGA), a shared memory that is shared by a user space of an operating system for the processor and the FPGA, a network protocol stack, and driver code for execution by the processor. The driver code can be configured to (1) make the received streaming data available to a user mode software application for processing, (2) make data stored in the shared memory available to the FPGA via DMA transfers of data from the shared memory into the FPGA for processing thereby, (3) receive a stream of processed data from the FPGA, and (4) provide the received processed data to the network protocol stack for delivery to one or more data consumers.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. In response to receiving a first write command from a host, the controller determines a first physical address indicative of a physical storage location of the nonvolatile memory to which first write data associated with the first write command is to be written, and updates an address translation table such that the first physical address is associated with a logical address of the first write data. The controller starts updating the address translation table before the transfer of the first write data is finished or before the write of the first write data to the nonvolatile memory is finished.

Abstract: An apparatus in one embodiment comprises a host device comprising a processor coupled to memory. The host device is configured to communicate over a network with at least one storage system. The host device is further configured to generate a user space block device and to generate a kernel space block device corresponding to the user space block device. The host device is further configured to receive an input-output operation at the kernel space block device from an application executing on the host device and to transfer the input-output operation from the kernel space block device to the corresponding user space block device. The host device is further configured to submit the input-output operation to the at least one storage system based at least in part on the user space block device.