Abstract: The disclosure provides a display device and a method of manufacturing the display device. The display device includes a first electrode disposed on an organic insulating layer and a second electrode disposed on an intermediate layer and overlapping the first electrode and an auxiliary electrode in a plan view, the second electrode electrically contacting the auxiliary electrode through a hole of the intermediate layer. A thickness of the intermediate layer varies in a direction away from a center of the hole of the intermediate layer.

Abstract: The memory cell includes: a piezoelectric substrate layer, wherein two ends of the piezoelectric substrate layer are respectively provided with a first electrode and a second electrode, and a current-free drive of skyrmion is implemented by applying a voltage to the first electrode and the second electrode; a magnetic layer on a surface of the piezoelectric substrate layer, wherein the magnetic layer is used to form a heterojunction with the piezoelectric substrate layer, and is used to generate, stabilize, and serve as a basic carrier for a movement of the skyrmion; wherein the magnetic layer includes a convex body, the convex body is configured to divide the magnetic layer into a bit region and a memory region, and the bit region is provided with a magnetic tunnel junction used to perform generation and detection functions of the skyrmion.

Abstract: A method of fabricating a display device with high resolution is provided. A display device having both high display quality and high resolution is provided. The method of fabricating a display device includes steps of forming a first EL film and a first sacrificial film over a first pixel electrode and a second pixel electrode; etching the first sacrificial film to form a first sacrificial layer; etching the first EL film to form a first EL layer and to expose the second pixel electrode; forming a second EL film and a second sacrificial film; etching the second sacrificial film to form a second sacrificial layer; etching the second EL film to form a second EL layer; forming an insulating film covering the first sacrificial layer, the first EL layer, the second sacrificial layer, and the second EL layer; and etching the insulating film to form an insulating layer including a region in contact with a side surface of the first EL layer and a region in contact with a side surface of the second EL layer.

Abstract: A method of fabricating a semiconductor device for sensing biological material includes: forming a field-effect transistor (FET) on a semiconductor substrate that includes a gate; forming a well within a material disposed over the semiconductor substrate, the well having an opening at a first end and a floor at second end, the well further having one or more side walls extending from the floor toward the opening to define an open-ended cavity into which a fluid may be flowed; forming a via extending through the floor such that an end-most surface of the via resides proud of the floor in a direction of the well's opening, the via being electrically coupled to the gate; and forming a sensing layer that at least partially covers the floor and a portion of the via residing proud of the floor, the sensing layer being reactive to exposure to a biological material.

Abstract: A display substrate comprises a base substrate, a first conductive layer, a first planarization layer, a second conductive layer, a second planarization layer and at least one transparent conductive layer. The second conductive layer is electrically connected with the first conductive layer through at least one first via penetrating the first planarization layer. The transparent conductive layer includes at least one first transparent conductive line and at least one auxiliary trace. An orthographic projection of the first transparent conductive line on the base substrate is overlapped with an orthographic projection of the at least one first via on the base substrate. At least a portion of the auxiliary traces are in the same direction as an extension direction of the first transparent conductive line, and an orthographic projection of the auxiliary traces on the base substrate is adjacent to an orthographic projection of the first via on the base substrate.

Abstract: A display panel includes a base layer including a first region, and a second region which is adjacent to the first region, a pixel disposed on the first region of the base layer, a line electrically connected to the pixel and extending from the first region to the second region, a pad electrically connected to the line, at which an electrical signal is input to the display panel from outside thereof and disposed under a top surface of the base layer, and a test circuit on the base layer, in the second region, the test circuit being spaced apart from the first region and further from the first region than the pad.

Abstract: Provided is a display panel and a manufacturing method of the same. The display panel includes a plurality of light emitting elements, a plurality of transistors respectively connected to the plurality of light emitting elements, and a plurality of connection lines respectively connecting the plurality of light emitting elements and the plurality of transistors, wherein each of the plurality of connection lines includes a first connection part connected to a corresponding light emitting element among the plurality of light emitting elements, and a second connection part connected to a corresponding transistor among the plurality of transistors, and wherein each of the plurality of light emitting elements includes a first electrode, an intermediate layer disposed on the first electrode, and a second electrode disposed on the intermediate layer, and the first electrodes included in the plurality of light emitting elements are connected to each other to provide an integral shape.

Abstract: A mother glass protective film having a plurality of cell film regions defined along a first direction, and a connection region adjacent to the plurality of cell film regions, includes: a carrier film; and a panel protective film on the carrier film, and having a first opening overlapping with at least the plurality of cell film regions.

Abstract: A display apparatus includes a display layer located on a surface of a substrate and including a plurality of pixels, a thin-film encapsulation layer located on the display layer, the thin-film encapsulation layer including at least one inorganic layer and at least one organic layer, a polarization film located on the thin-film encapsulation layer, and a protective film located on another surface of the substrate, which is opposite to the surface of the substrate, the protective film corresponding to the display layer. A difference between a coefficient of thermal expansion of the polarization film and a coefficient of thermal expansion of the protective film is in a range of about 0 ?m/° C. to about 5 ?m/° C.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bidirectional device, methods of manufacture and methods of operation. The structure includes: a first gate structure adjacent to a first source region; a second gate structure adjacent to a second source region; and field plates adjacent to the first gate structure, the second gate structure and a surface of an active layer of the first gate structure and the second gate structure.

Abstract: A display device can include a substrate in which a display area and a non-display area are disposed, a thin film transistor disposed on a the substrate that corresponds to the display area, a gate driver disposed on a portion of the substrate that corresponds to the non-display area, a protection layer disposed to cover the thin film transistor and the gate driver, a planarization layer disposed on the protection layer and including a plurality of openings exposing at least a part of the protection layer in the non-display area, an organic light emitting diode disposed on the planarization layer so as to be electrically connected to the thin film transistor in the display area, and a nano particle layer disposed on the protection layer overlapping the plurality of openings. The nano particle layer includes nano particles surface-modified with a hydrophobic functional group.

Abstract: A semiconductor device, including a substrate, a first source/drain region, a second source/drain region, and a gate structure, is provided. The substrate has an extra body portion and a fin protruding from a top surface of the substrate, wherein the fin spans the extra body portion. The first source/drain region and the second source/drain region are in the fin. The gate structure spans the fin, is located above the extra body portion, and is located between the first source/drain region and the second source/drain region.

Abstract: The present invention relates to OLED devices and stacks for OLED devices that include a symmetric emissive-layer architecture. In one embodiment, the present invention relates to an emissive stack having three layers, wherein the top and bottom layers emit light in the same or similar color region while the middle layer emits light in a different color region than the other two layers. In such an embodiment, the three layers are in contact with each other with no other layers in between. The symmetric emissive-layer architecture of the present invention can be used to improve the color stability of OLED devices.

Abstract: A power semiconductor device includes a base semiconductor layer including impurities of a first conductivity type; a body portion provided on the base semiconductor layer and defined by a source trench, the body portion including a gate trench extending inwardly from an upper surface of the body portion; a gate electrode provided in the gate trench; a source electrode provided on the body portion and spaced apart from the gate electrode; and a drain electrode provided below the base semiconductor layer, wherein the body portion includes: a drift layer provided on the base semiconductor layer and including impurities of the first conductivity type; and a pair of shielding regions provided in the drift layer, spaced apart from each other in a horizontal direction, and spaced apart from the base semiconductor layer and the gate trench, the pair of shielding regions including impurities of a second conductivity type different from the first conductivity type.

Abstract: A second test portion includes a second test first terminal, a second test second terminal, a second test third terminal, and a second test fourth terminal electrically connected to a second test semiconductor layer via respective contact holes formed in a layered film of a gate insulating film and an interlayer insulating film, and the layered film of the gate insulating film and the interlayer insulating film in the second test portion is provided with an opening open upward between at least one of the second test first terminal, the second test second terminal, the second test third terminal, and the second test fourth terminal.

Abstract: A method of forming a complementary field-effect transistor (CFET) device includes: forming a plurality of channel regions stacked vertically over a fin; forming an isolation structure between a first subset of the plurality of channel regions and a second subset of the plurality of channel regions; forming a gate dielectric material around the plurality of channel regions and the isolation structure; forming a work function material around the gate dielectric material; forming a silicon-containing passivation layer around the work function material; after forming the silicon-containing passivation layer, removing a first portion of the silicon-containing passivation layer disposed around the first subset of the plurality of channel regions and keeping a second portion of the silicon-containing passivation layer disposed around the second subset of the plurality of channel regions; and after removing the first portion of the silicon-containing passivation layer, forming a gate fill material around the plurali

Abstract: A light-emitting diode (LED) includes a substrate, an epitaxial structure disposed on the substrate, and first and second electrode units disposed on the epitaxial structure. The first and second electrode units are electrically connected to first and second semiconductor layers of the epitaxial structure, respectively. A surface of the epitaxial structure opposite to the substrate has an operating zone to be pushed by an ejector pin during a packaging process. A projection of the second electrode unit on the substrate bypasses a projection of the operating zone on the substrate, and extends toward the first electrode unit.

Abstract: A display device includes: a substrate including a first area and a first connection area extending from the first area; an inorganic insulating layer disposed on the substrate in the first area and having a side surface; an organic layer disposed on the substrate, covering the side surface of the inorganic insulating layer and arranged in the first connection area; a first organic insulating layer disposed on the inorganic insulating layer in the first area and having a first side surface; and a first wire disposed on the first organic insulating layer in the first area and disposed on the organic layer in the first connection area, where the first wire extends along the first side surface in a direction from the first area to the first connection area.

Abstract: A semiconductor device includes a first device fin and a second device fin that are each located in a first region of the semiconductor device. The first region has a first pattern density. A first dummy fin is located in the first region. The first dummy fin is disposed between the first device fin and the second device fin. The first dummy fin has a first height. A third device fin and a fourth device fin are each located in a second region of the semiconductor device. The second region has a second pattern density that is greater the first pattern density. A second dummy fin is located in the second region. The second dummy fin is disposed between the third device fin and the fourth device fin. The second dummy fin has a second height that is greater than the first height.

Abstract: Embodiments of the present application provide an encapsulation structure, a display panel and a method of manufacturing the display panel. The encapsulation structure includes the barrier structure layer. In the barrier structure layer, the first barrier layer is adopted to fix the protrusion structure, and the second barrier layer is utilized to wrap the protrusion structure. The encapsulation structure provided by the embodiment of the present application implements the effective wrapping on the protrusion structure, solves the crack problem of the barrier layer caused by the protrusion structure, and thus enhances the service lifetime and reliability of the display panel.