Patents Examined by Eric W Jones
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Patent number: 12690369Abstract: A display apparatus includes a display layer located on a surface of a substrate and including a plurality of pixels, a thin-film encapsulation layer located on the display layer, the thin-film encapsulation layer including at least one inorganic layer and at least one organic layer, a polarization film located on the thin-film encapsulation layer, and a protective film located on another surface of the substrate, which is opposite to the surface of the substrate, the protective film corresponding to the display layer. A difference between a coefficient of thermal expansion of the polarization film and a coefficient of thermal expansion of the protective film is in a range of about 0 ?m/° C. to about 5 ?m/° C.Type: GrantFiled: February 13, 2023Date of Patent: July 21, 2026Assignee: Samsung Display Co., Ltd.Inventors: Hyunmin Hwang, Jongwoo Park, Youngtae Choi
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Patent number: 12684866Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bidirectional device, methods of manufacture and methods of operation. The structure includes: a first gate structure adjacent to a first source region; a second gate structure adjacent to a second source region; and field plates adjacent to the first gate structure, the second gate structure and a surface of an active layer of the first gate structure and the second gate structure.Type: GrantFiled: December 9, 2022Date of Patent: July 14, 2026Assignee: GLOBALFOUNDRIES U.S. IncInventors: Santosh Sharma, Michael J. Zierak, Mark D. Levy, Steven J. Bentley
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Patent number: 12677543Abstract: A display device can include a substrate in which a display area and a non-display area are disposed, a thin film transistor disposed on a the substrate that corresponds to the display area, a gate driver disposed on a portion of the substrate that corresponds to the non-display area, a protection layer disposed to cover the thin film transistor and the gate driver, a planarization layer disposed on the protection layer and including a plurality of openings exposing at least a part of the protection layer in the non-display area, an organic light emitting diode disposed on the planarization layer so as to be electrically connected to the thin film transistor in the display area, and a nano particle layer disposed on the protection layer overlapping the plurality of openings. The nano particle layer includes nano particles surface-modified with a hydrophobic functional group.Type: GrantFiled: December 22, 2022Date of Patent: July 7, 2026Assignee: LG DISPLAY CO., LTD.Inventors: Hyejin Kim, Huiseong Yu, SungHo Lee, Wooseok Noh, Youngjune Go
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Patent number: 12672307Abstract: A semiconductor device, including a substrate, a first source/drain region, a second source/drain region, and a gate structure, is provided. The substrate has an extra body portion and a fin protruding from a top surface of the substrate, wherein the fin spans the extra body portion. The first source/drain region and the second source/drain region are in the fin. The gate structure spans the fin, is located above the extra body portion, and is located between the first source/drain region and the second source/drain region.Type: GrantFiled: October 13, 2022Date of Patent: June 30, 2026Assignee: United Microelectronics Corp.Inventors: Yi Chuen Eng, Tzu-Feng Chang, Teng-Chuan Hu, Yi-Wen Chen, Yu-Hsiang Lin
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Patent number: 12652901Abstract: The present invention relates to OLED devices and stacks for OLED devices that include a symmetric emissive-layer architecture. In one embodiment, the present invention relates to an emissive stack having three layers, wherein the top and bottom layers emit light in the same or similar color region while the middle layer emits light in a different color region than the other two layers. In such an embodiment, the three layers are in contact with each other with no other layers in between. The symmetric emissive-layer architecture of the present invention can be used to improve the color stability of OLED devices.Type: GrantFiled: October 1, 2021Date of Patent: June 9, 2026Assignee: Universal Display CorporationInventors: Hitoshi Yamamoto, Xin Xu, Michael S. Weaver, Vadim Adamovich
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Patent number: 12648188Abstract: A power semiconductor device includes a base semiconductor layer including impurities of a first conductivity type; a body portion provided on the base semiconductor layer and defined by a source trench, the body portion including a gate trench extending inwardly from an upper surface of the body portion; a gate electrode provided in the gate trench; a source electrode provided on the body portion and spaced apart from the gate electrode; and a drain electrode provided below the base semiconductor layer, wherein the body portion includes: a drift layer provided on the base semiconductor layer and including impurities of the first conductivity type; and a pair of shielding regions provided in the drift layer, spaced apart from each other in a horizontal direction, and spaced apart from the base semiconductor layer and the gate trench, the pair of shielding regions including impurities of a second conductivity type different from the first conductivity type.Type: GrantFiled: September 22, 2022Date of Patent: June 2, 2026Assignees: SAMSUNG ELECTRONICS CO., LTD., SOGANG UNIVERSITY RESEARCH FOUNDATIONInventors: Kwangsoo Kim, Jinhee Cheon
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Patent number: 12641976Abstract: A second test portion includes a second test first terminal, a second test second terminal, a second test third terminal, and a second test fourth terminal electrically connected to a second test semiconductor layer via respective contact holes formed in a layered film of a gate insulating film and an interlayer insulating film, and the layered film of the gate insulating film and the interlayer insulating film in the second test portion is provided with an opening open upward between at least one of the second test first terminal, the second test second terminal, the second test third terminal, and the second test fourth terminal.Type: GrantFiled: March 25, 2021Date of Patent: May 26, 2026Assignee: Sharp Display Technology CorporationInventors: Takao Saitoh, Yohsuke Kanzaki, Masaki Yamanaka, Masahiko Miwa, Yi Sun, Masaki Fujiwara
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Patent number: 12641877Abstract: A method of forming a complementary field-effect transistor (CFET) device includes: forming a plurality of channel regions stacked vertically over a fin; forming an isolation structure between a first subset of the plurality of channel regions and a second subset of the plurality of channel regions; forming a gate dielectric material around the plurality of channel regions and the isolation structure; forming a work function material around the gate dielectric material; forming a silicon-containing passivation layer around the work function material; after forming the silicon-containing passivation layer, removing a first portion of the silicon-containing passivation layer disposed around the first subset of the plurality of channel regions and keeping a second portion of the silicon-containing passivation layer disposed around the second subset of the plurality of channel regions; and after removing the first portion of the silicon-containing passivation layer, forming a gate fill material around the pluraliType: GrantFiled: June 30, 2023Date of Patent: May 26, 2026Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Ming Lin, Chun-I Wu, Tsung-Kai Chiu, Wei-Yen Woon, Szuya Liao
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Patent number: 12641935Abstract: A light-emitting diode (LED) includes a substrate, an epitaxial structure disposed on the substrate, and first and second electrode units disposed on the epitaxial structure. The first and second electrode units are electrically connected to first and second semiconductor layers of the epitaxial structure, respectively. A surface of the epitaxial structure opposite to the substrate has an operating zone to be pushed by an ejector pin during a packaging process. A projection of the second electrode unit on the substrate bypasses a projection of the operating zone on the substrate, and extends toward the first electrode unit.Type: GrantFiled: January 24, 2022Date of Patent: May 26, 2026Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.Inventors: Peng Liu, Anhe He, Su-Hui Lin, Jiangbin Zeng, Chao Lu, Kang-Wei Peng, Xiaoliang Liu, Ling-Yuan Hong, Min Huang, Chung-Ying Chang
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Patent number: 12628519Abstract: A display device includes: a substrate including a first area and a first connection area extending from the first area; an inorganic insulating layer disposed on the substrate in the first area and having a side surface; an organic layer disposed on the substrate, covering the side surface of the inorganic insulating layer and arranged in the first connection area; a first organic insulating layer disposed on the inorganic insulating layer in the first area and having a first side surface; and a first wire disposed on the first organic insulating layer in the first area and disposed on the organic layer in the first connection area, where the first wire extends along the first side surface in a direction from the first area to the first connection area.Type: GrantFiled: February 1, 2023Date of Patent: May 12, 2026Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Minkyu Woo, Gyungsoon Park, Seonyoung Choi
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Patent number: 12628418Abstract: A semiconductor device includes a first device fin and a second device fin that are each located in a first region of the semiconductor device. The first region has a first pattern density. A first dummy fin is located in the first region. The first dummy fin is disposed between the first device fin and the second device fin. The first dummy fin has a first height. A third device fin and a fourth device fin are each located in a second region of the semiconductor device. The second region has a second pattern density that is greater the first pattern density. A second dummy fin is located in the second region. The second dummy fin is disposed between the third device fin and the fourth device fin. The second dummy fin has a second height that is greater than the first height.Type: GrantFiled: July 19, 2023Date of Patent: May 12, 2026Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Zhi-Chang Lin, Wei-Hao Wu, Jia-Ni Yu
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Patent number: 12622156Abstract: Embodiments of the present application provide an encapsulation structure, a display panel and a method of manufacturing the display panel. The encapsulation structure includes the barrier structure layer. In the barrier structure layer, the first barrier layer is adopted to fix the protrusion structure, and the second barrier layer is utilized to wrap the protrusion structure. The encapsulation structure provided by the embodiment of the present application implements the effective wrapping on the protrusion structure, solves the crack problem of the barrier layer caused by the protrusion structure, and thus enhances the service lifetime and reliability of the display panel.Type: GrantFiled: September 3, 2021Date of Patent: May 5, 2026Assignees: Huizhou China Star Optoelectronics Display Co., Ltd., Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.Inventor: Yang Miao
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Patent number: 12615937Abstract: A display substrate, a preparation method thereof, and a display apparatus are provided, wherein the display substrate includes a display area and an edge area, and the display substrate further comprises a substrate and a power supply line arranged on the substrate and located in the edge area, the power supply line includes a first power supply portion and a second power supply portion connected with each other, the second power supply portion being located on a side of the first power supply portion far away from the substrate; the display area including a plurality of display units, at least one display unit includes a pixel driving circuit and a light emitting device, the pixel driving circuit being electrically connected with an anode of the light emitting device, the power supply line being electrically connected with a cathode of the light emitting device.Type: GrantFiled: January 21, 2022Date of Patent: April 28, 2026Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Hongjun Zhou, Long Ma, Tianyi Cheng, Yao Huang, Binyan Wang
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Patent number: 12610686Abstract: Disclosed are an array substrate, a display panel, a display device, and a manufacturing method of the array substrate. The array substrate includes a substrate layer, a passivation layer and a filter layer sequentially stacked. A side of the passivation layer facing the filter layer is provided with a concave-convex structure. By setting the concave-convex structure, when the light rays hit the uneven structure, the passivation layer region of the concave-convex structure can function as a lens. According to the principle of light scattering, light is scattered or diffused in the concave-convex structure to increase the propagation paths of light, more light can pass through the passivation layer and the light transmittance is improved. According to the principle of light diffraction, a new light source is formed at the position of the concave-convex structure to increase the light density and the light transmittance is improved.Type: GrantFiled: July 29, 2022Date of Patent: April 21, 2026Assignee: HKC CORPORATION LIMITEDInventors: Won Kyu Lee, Jeoung Kwen Noh, Haijiang Yuan
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Patent number: 12604617Abstract: A display device and a method of manufacturing a display device are provided. A display device includes a display panel including a first pixel area, and a second pixel area including a plurality of protruding patterns protruded outward from the first pixel area at a corner portion having both a curvature of left or right side and a curvature of upper or lower side of the display device, and a cut-out portion defined by a space between the plurality of protruding patterns, and a protective member on a lower surface of the display panel includes a first protective area overlapping with the first pixel area of the display panel in a thickness direction, and a second protective area overlapping with the second pixel area of the display panel in the thickness direction, and a density per unit volume of the second protective area is greater than that of the first protective area.Type: GrantFiled: January 9, 2023Date of Patent: April 14, 2026Assignee: Samsung Display Co., Ltd.Inventors: Jung Kyu Lee, Kyu Ho Jung
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Patent number: 12598883Abstract: A display apparatus includes: a first organic light-emitting diode, a second organic light-emitting diode, and a third organic light-emitting diode corresponding to a first sub-pixel, a second sub-pixel, and a third sub-pixel, respectively; a first intermediate layer commonly provided in the first organic light-emitting diode and the second organic light-emitting diode, and comprising a first emission layer and a first n-type charge generation layer; a second intermediate layer provided in the third organic light-emitting diode, and comprising a second emission layer and a second n-type charge generation layer, wherein the first n-type charge generation layer includes a first material, and the second n-type charge generation layer includes a second material different from the first material.Type: GrantFiled: October 19, 2021Date of Patent: April 7, 2026Assignee: Samsung Display Co., Ltd.Inventors: Hyeongpil Kim, Byounghun Sung
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Patent number: 12593598Abstract: A display apparatus includes a substrate, a thin-film transistor, an insulating material stack, and a first dam structure. The substrate includes a display area and a peripheral area located outside the display area. The thin-film transistor layer overlaps the substrate. The insulating material stack overlaps the peripheral area. The first dam structure overlaps the substrate, is located closer to the display area than the insulating material stack, partially covers the insulating material stack, and reaches farther than the insulating material stack with reference to the substrate.Type: GrantFiled: October 14, 2022Date of Patent: March 31, 2026Assignee: Samsung Display Co., Ltd.Inventor: Mijung Han
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Patent number: 12593568Abstract: Sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in an organic light-emitting diode (OLED) display are described herein. The adjacent metal-containing overhang structures defining each sub-pixel of the sub-pixel circuit of the display provide for formation of the sub-pixel circuit using evaporation deposition and provide for the metal-containing overhang structures to remain in place after the sub-pixel circuit is formed (e.g., utilizing the methods of the fifth, sixth, or seventh exemplary embodiments). Evaporation deposition may be utilized for deposition of an OLED material and cathode. The metal-containing overhang structures define deposition angles, i.e., provide for a shadowing effect during evaporation deposition.Type: GrantFiled: July 27, 2021Date of Patent: March 31, 2026Assignee: Applied Materials, Inc.Inventors: Jungmin Lee, Seong Ho Yoo, Dieter Haas, Si Kyoung Kim, Yu-hsin Lin, Ji Young Choung
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Patent number: 12593583Abstract: Pixels each including a light emitting unit formed by laminating a first electrode, an organic layer, and a second electrode are arranged in a two-dimensional matrix. The organic layer includes multiple light emitting layers of different types and a light emission separation layer. Each of the multiple light emitting layers of different types is laminated as a common layer extending continuously over the pixels. The light emission separation layer is arranged between two adjacent light emitting layers, and is formed so as to have a different configuration depending on a display color of the pixel.Type: GrantFiled: December 27, 2019Date of Patent: March 31, 2026Assignee: Sony Semiconductor Solutions CorporationInventor: Tomoyoshi Ichikawa
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Patent number: 12581703Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes first and second gate structures formed over a semiconductor substrate and a multilayer gate isolation structure separating the first gate structure from the second gate structure. The multilayer gate isolation structure includes a first insulating feature adjacent to upper portions of the first gate structure and the second gate structure, and a second insulating feature separating the semiconductor substrate from the first insulating feature. The material of the second insulating feature is different than that of the first insulating feature. The second insulating feature has a lower dielectric constant or lower etch resistance than the first insulating feature.Type: GrantFiled: June 22, 2022Date of Patent: March 17, 2026Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hong-Chih Chen, Wei-Chih Kao, Chun-Yi Chang, Yu-San Chien, Hsin-Che Chiang, Chun-Sheng Liang