Abstract: A USB hub integrated circuit device, comprising USB hub logic comprising a plurality USB ports, wherein at least one port comprises a pair of bi-directional transmission channels, wherein for the at least one port two physical layers are provided in parallel, each physical layer being associated with one bidirectional transmission channel, wherein the USB hub logic is further configured to select one of said physical layers for each port depending on a logic condition.

Abstract: A barcode reader and a docking station for charging the barcode reader are disclosed. The barcode reader may be an elongated pen-shaped device that includes a capacitive tip for use as a stylus against a capacitive touch screen and a barcode reader for reading a barcode. The barcode reader may be docked in the docking station for charging. The docking station may include a magnetic structure for holding the barcode reader to the docking station, and a positioning structure for aligning the charging contacts of the barcode reader and the docking station. The docking station may include a battery such that the barcode reader may be charged from the battery while being docked in the docking station.

Abstract: A peripheral device connected to a local electronic device which is connected to at least one communication network can communicate with a peripheral device attached to a remote electronic device as if the remote peripheral device was locally attached. Data designated for the remote peripheral device is received by a local virtual device object and transmitted to the remote electronic device via at least one of the electronic devices communication interfaces or peripheral devices. Data received by the remote electronic device's communication interface or peripheral device is written to the peripheral device at the remote electronic device by a virtual device object. For compensation of different transfer speeds or outages between the peripheral device and the communication interface or another peripheral device the virtual device provides the ability to utilize the virtual devices emulation driver that is attached to the virtual device object as an I/O buffer.

Abstract: Methods and apparatus for data aggregation and multiplexing of one or more virtual bus interfaces via a physical bus interface. Various disclosed embodiments are configured to: (i) multiplex multiple logical interfaces over a single physical interface, (ii) exchange session management and logical interface control, (iii) manage flow control, (iv) provide “hints” about the data (e.g., metadata), and/or (v) pad data packets. In one particular implementation, the methods and apparatus are configured for use within a wireless-enabled portable electronic device, such as for example a cellular-enabled smartphone, and make use of one or more features of a high-speed serialized physical bus interface.

Abstract: This technology provides an electronic device and a method of fabricating the same. An electronic device in accordance with an implementation of this document includes a transistor comprising a semiconductor substrate including an active region defined by an isolation layer; and a gate which is formed over the active region and the isolation layer and extends in a first direction to cross the active region, wherein the active region includes a head portion towering over the isolation layer, a body portion disposed under the head portion, and a neck portion which is disposed between the head portion and the body portion and is recessed compared to the head portion and the body portion in the first direction, in a region where the gate and the active region overlap with each other.

Abstract: A firmware updating method in just a bunch of disks includes the following blocks. A motherboard is coupled to a first primary storage extension chip or to a second primary storage extension chip. The first primary storage extension chip and the second primary storage extension chip are coupled to each other. At least one secondary storage extension chip is coupled to the first primary storage extension chip. At least one secondary storage extension chip is coupled to the second primary storage extension chip. A signal sent to the first primary storage extension chip or to the second primary storage extension chip by the motherboard causes firmware of each storage extension chip to be updated.

Abstract: A standardized hot-pluggable transceiving unit comprising a housing, a connector and a processing unit. The housing has specific standardized dimensions and can be inserted into a chassis of a hosting unit. The connector receives an IP flow. The processing unit processes packets of the IP flow based on a control plane message. The control plane message is received by the connector receiving the IP flow or by another connector of the transceiving unit. The processing unit may further generate a report or an alarm related to the IP flow, for transmission by the transceiving unit. The IP flow may for example transport a video payload. A system comprising a chassis and the transceiving unit is also disclosed. The chassis comprises a processing unit capable of processing packets of IP flows. The transceiving unit is inserted into the chassis and exchanges data with the processing unit of the chassis.

Abstract: Apparatus and methods for USB hosts and USB devices to dynamically switch roles such that a product which initially operates as a USB host may instead operate as a USB device and vice versa. Products such as smartphones and tablets which initially operate as USB devices may dynamically switch roles to become USB hosts. Similarly, products such as PCs and in-vehicle infotainment systems which initially operate as USB hosts may dynamically switch roles to become USB devices. Dynamic USB role switching is permitted in a variety of topologies including those in which a direct connection exists between a host and a device as well as those in which a USB hub is present. In addition, such dynamic role switching may be performed in topologies which incorporate widely used USB Type A connectors and cables, thus avoiding the need for a special connector or cable.

Abstract: An interface module has at least a configuration connection, a reset connection, a transmission connection and a reception connection. The interface module also has at least a first interface processing unit and a second interface processing unit which differs from the first interface processing unit and the connections of which can be connected to the connections of the interface module via a multiplexer. Only one set of interface connections needs to be provided on the interface module.

Abstract: Method and apparatus for implementing an optimized credit return mechanism for packet sends. A Programmed Input/Output (PIO) send memory is partitioned into a plurality of send contexts, each comprising a memory buffer including a plurality of send blocks configured to store packet data. A storage scheme using FIFO semantics is implemented with each send block associated with a respective FIFO slot. In response to receiving packet data written to the send blocks and detecting the data in those send blocks has egressed from a send context, corresponding freed FIFO slots are detected, and a lowest slot for which credit return indicia has not be returned is determined. The highest slot in a sequence of freed slots from the lowest slot is then determined, and corresponding credit return indicia is returned.

Abstract: An information handling system includes a processor operable to receive a system management interrupt, and an embedded controller coupled to the processor via a primary interface and via a system management interrupt interface. The embedded controller receives a command to enable address decoding from the processor via the primary interface, sends the system management interrupt via the system management interrupt interface in response to receiving the command, and receives an indication from the processor via the primary interface, the indication including a determination if the processor was operating in a system management mode when the processor sent the command.

Abstract: A data storage device includes a nonvolatile memory device; a buffer memory for storing temporarily data to be transmitted from the nonvolatile memory device to a host device or data to be transmitted from the host device to the nonvolatile memory device; a memory control unit for performing a control operation for controlling the nonvolatile memory device; and a direct memory access (DMA) unit for performing a data transmission operation associated with the buffer memory, according to control of the memory control unit, wherein the DMA block transmits a first data from the nonvolatile memory device to the buffer memory, and wherein the DMA unit transmits a second data from the nonvolatile memory device to the buffer memory, while the first data stored in the buffer memory is transmitted from the buffer memory to the host device.

Abstract: An embodiment includes a method includes designating a portion of a plurality of processing cores as an input/output (I/O) core and compiling a program source code to produce compiled program source code, including identifying an I/O operation region of the program source code, determining a number of I/O operations for the I/O operation region, and determining a number of system resources and system resource types for the I/O operation region. The method also includes executing the program source code using the plurality of processing cores, including scheduling the I/O operation region of the program source code on the I/O core of the plurality of processing cores.

Abstract: A data processing system is provided which includes a processor nest communicatively coupled to an input/output bus by a bus controller, and a service interface controller communicatively coupled to the processor nest. The system includes storage for storing commands for the bus controller and associated command data and resulting status data, the storage being communicatively coupled to the processor nest and the bus controller. The service interface controller is configured, in response to received service commands, to read and write the storage, to execute the command specified in the storage, to retrieve the result of the command, and to store the result in the storage.

Abstract: The invention provides a method for a portable electronic device such as a computer to be capable of safely coping with the occurrence of a surprise removal from an external hard disk drive (HDD) connected by wireless. An HDD is connected to a portable computer by wireless via a wireless extension device. First, a wireless communication path between the HDD and the portable computer is configured. Subsequently, a file is read and edited by accessing the HDD from the portable computer. Next, removal information indicating that the portable computer is away from the HDD is produced. The removal information can be produced by detecting an acceleration generated in the portable computer, or by directly detecting the distance by the strength of the wireless signal. Data under editing is saved before occurrence of surprise removal by ejecting the HDD in response to the production of the removal information.

Abstract: The embodiments are directed to methods and systems for sending and receiving signals between one or more peripheral devices connected to a dongle system and an operating system. The methods and systems can detect when a dongle system has been connected to a mobile computing device. The methods and systems can receive an input to use the dongle system with a local operating system or a remote operating system. The methods and systems can also establish a communication channel between the local operating system and the remote operating system, and exchange signals between the dongle system and the remote operating system using one or more virtual filters.

Abstract: In an example embodiment, there is described herein a location based detection technique that determines whether multiple requests from different addresses, such as a Layer 2 MAC (Media Access Control) address and/or layer 3 IP (Internet Protocol) address are being sent form a single device. In particular embodiments, if the device sends more than a predefined threshold number of requests, those requests can be ignored and/or denied.

Abstract: A serial transmission peripheral device for transmitting serial transmission data with a variable data length includes a pulse forming unit; and a register programmable to set a desired transmission length. The peripheral device is operable to determine an actual transmission length and calculate a length of a pause pulse and to add the pause pulse at the end of a transmission to generate a transmission having a constant length.

Abstract: Systems and methods for connecting a device to one of a plurality of processing hosts. A virtual interface card (VIC) adapter learns the number and location of the hosts and an identification of the device; receives a mapping of the device to a selected host where in the host is selected from the plurality of hosts; and dynamically builds an interface that connects the device to the selected host.

Abstract: Provided is a method of managing a register port, the method including performing scheduling on register ports that are used during a plurality of cycles to enable performing of a calculation; encoding data of the register ports according to results of the scheduling, the encoding of the data including, with respect to data of one of the register ports that does not have a schedule during one of the plurality of cycles, equally encoding the data of the one register port during the one cycle with data of an adjacent cycle of the one register port, the adjacent cycle being adjacent to the one cycle; and transmitting results of the encoding to a device that includes the register ports.