Patents Examined by Ernest Unelus
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Patent number: 9921992Abstract: A two-phase asynchronous transmission circuit for transmitting data over a wired interface according to a two-phase asynchronous protocol, the transmission circuit including: N data output lines, where N is an integer equal to 3 or more, wherein the transmission circuit is capable of transmitting N unique data symbols, each of the output lines being associated with a corresponding one of the N data symbols, and the transmission circuit is adapted to transmit each data symbol by applying a voltage transition to the corresponding output line independently of the voltage state of the other output lines.Type: GrantFiled: December 28, 2015Date of Patent: March 20, 2018Assignee: Commissariat à l'Énergie Atomique et aux Énergies AlternativesInventors: Julian Hilgemberg Pontes, Pascal Vivet
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Patent number: 9921998Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.Type: GrantFiled: August 14, 2017Date of Patent: March 20, 2018Assignee: QUALCOMM IncorporatedInventors: Radu Pitigoi-Aron, Richard Dominic Wietfeldt, Douglas Wayne Hoffman
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Patent number: 9923306Abstract: A sensor interconnect system is disclosed. The sensor interconnect system comprises a first connection component comprising a locking pin, a locating pin and a spring loaded electrical contact comprising at least one contact pin and a second connection component comprising an alignment feature, a locking feature, and a second electrical contact. The second connection component is coupled to a sensor located in a contained fluid sensing area. The locking pin interacts with the locking feature to maintain a lateral position of the first connection component relative to the second connection component and the locating pin interacts with the alignment feature to maintain a rotational position of the first connection component relative to the second connection component. The at least one contact pin of the spring loaded electrical contact is in electrical communication with the second electrical contact, when the system is assembled.Type: GrantFiled: March 20, 2017Date of Patent: March 20, 2018Assignee: Adalet/Scott Fetzer CompanyInventors: John W. Merrill, Julie A. Stalder, Robert S. Kress
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Patent number: 9917518Abstract: A method and a circuit of detecting attachment and detachment between a portable device and a power converter are provided. The method and the circuit confirm attachment of the portable device to the power converter and generate an attachment signal. The method and the circuit further detect a bus voltage of the power converter for confirming detachment of the portable device from the power converter.Type: GrantFiled: April 22, 2015Date of Patent: March 13, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Eui-Soo Kim, Bong-Geun Chung, Gwan-Bon Koo, Ju-Hyun Kim, Young-Bae Park
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Patent number: 9910788Abstract: A processor device includes a cache and a memory storing a set of counters. Each counter of the set is associated with a corresponding block of a plurality of blocks of the cache. The processor device further includes a cache access monitor to, for each time quantum for a series of one or more time quanta, increment counter values of the set of counters based on accesses to the corresponding blocks of the cache. The processor device further includes a transfer engine to, after completion of each time quantum, transfer the counter values of the set of counters for the time quantum to a corresponding location in a system memory.Type: GrantFiled: September 22, 2015Date of Patent: March 6, 2018Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Philip J. Rogers, Benjamin T. Sander, Anthony Asaro
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Patent number: 9910699Abstract: A method comprising is described. The method includes receiving an interrupt targeting a virtual processor, determining a status of the virtual processor and directly delivering the interrupt to the virtual processor upon determining that the virtual processor is operating in a running state.Type: GrantFiled: October 28, 2014Date of Patent: March 6, 2018Assignee: INTEL CORPORATIONInventors: Rajesh M. Sankaran, Gilbert Neiger
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Patent number: 9898205Abstract: Various systems and methods for scheduling commands of a storage area network to minimize latency are disclosed. For example, one method involves receiving a command, where the command is received prior to this command being issued to one or more storage devices. The commands is configured to be issued to the one or more storage devices using one or more paths. The method also involves determining whether the command is a high impact (HI) command, where this determination is based, at least in part, on one or more criteria. In response to a determination that the command is an HI command, the method involves selecting a first path of the one or more paths as a primary HI path, where the selecting is based on one or more other criteria. The availability of the primary HI path to non-HI commands is determined based on one or more different criteria.Type: GrantFiled: October 31, 2013Date of Patent: February 20, 2018Assignee: Veritas Technologies LLCInventor: Kirubakaran Kaliannan
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Patent number: 9892075Abstract: An example method for facilitating policy-driven storage in a microserver computing environment is provided and includes receiving, at an input/output (I/O) adapter in a microserver chassis having a plurality of compute nodes and a shared storage resource, policy contexts prescribing storage access parameters of respective compute nodes and enforcing the respective policy contexts on I/O operations by the compute nodes, in which respect a particular I/O operation by any compute node is not executed if the respective policy context does not allow the particular I/O operation. The method further includes allocating tokens to command descriptors associated with I/O operations for accessing the shared storage resource, identifying a violation of any policy context of any compute node based on availability of the tokens, and throttling I/O operations by other compute nodes until the violation disappears.Type: GrantFiled: December 10, 2015Date of Patent: February 13, 2018Assignee: CISCO TECHNOLOGY, INC.Inventors: Prabhath Sajeepa, Sagar Borikar
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Patent number: 9886406Abstract: A detecting method for determining either a first expansion bus interface or a second expansion bus interface of an expansion device of an electronic device is applied for implementing a signal communication with a control unit. The detecting method includes the following steps: turning on the first expansion bus interface; detecting whether the control unit transmits a feedback signal after the first expansion bus interface is turned on; if not, turning on the second expansion bus interface; detecting whether the control unit transmits the feedback signal after the second expansion bus interface is turned on; and if yes, implementing the signal communication between the expansion device and the control unit through the second expansion bus interface to complete a boot up procedure.Type: GrantFiled: October 27, 2014Date of Patent: February 6, 2018Assignee: Acer Inc.Inventors: Shu-Yu Jiang, Yung-Sen Lin
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Patent number: 9875210Abstract: An apparatus for retimer presence detection is described herein. The apparatus includes at least one retimer, wherein an algorithm is to enable the at least one retimer to announce its presence by asserting a bit of a presence message during link initialization. The at least one retimer can declare an index and is accessible via the index.Type: GrantFiled: June 27, 2014Date of Patent: January 23, 2018Assignee: Intel CorporationInventors: Huimin Chen, Howard L. Heck
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Patent number: 9876372Abstract: A barcode reader and a docking station for charging the barcode reader are disclosed. The barcode reader may be an elongated pen-shaped device that includes a capacitive tip for use as a stylus against a capacitive touch screen and a barcode reader for reading a barcode. The barcode reader may be docked in the docking station for charging. The docking station may include a magnetic structure for holding the barcode reader to the docking station, and a positioning structure for aligning the charging contacts of the barcode reader and the docking station. The docking station may include a battery such that the barcode reader may be charged from the battery while being docked in the docking station.Type: GrantFiled: July 30, 2015Date of Patent: January 23, 2018Assignee: The Code CorporationInventors: Phil Utykanski, Ryan Hoobler
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Patent number: 9875207Abstract: An apparatus includes a remote terminal unit (RTU) having one or more input/output (I/O) modules and a controller module. Each of the one or more I/O modules includes multiple I/O channels. The controller module includes at least one processing device configured to communicate with at least one industrial field device via the I/O channels of the I/O modules. The controller module includes a first connector, and a first of the one or more I/O modules includes a second connector. The first connector is configured to be physically connected to the second connector, and the first and second connectors are configured to transport data and power directly between the controller module and the first I/O module.Type: GrantFiled: August 14, 2014Date of Patent: January 23, 2018Assignee: HONEYWELL INTERNATIONAL INC.Inventors: Jie Lv, Lei Zou, Zhi Yang, Min Zhang
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Patent number: 9870373Abstract: A daisy-chain storage synchronization (DSS) system and method that permits a daisy-chain of interconnected pass-thru disk drive controllers (PTDDCs) each connected to a SATA local disk drive (LDD) disk storage element (DSE) to support state synchronization within PTDDCs in the daisy-chain is disclosed. The PTDDCs within the daisy-chain are configured to individually maintain drive state information (DSI) relating to the LDD as well as chain state information (CSI) relating to the individual PTDDCs within the daisy-chain. This state information may be modified on receipt of out-of-band signaling (OBS) from other PTDDC elements up the daisy-chain as well as OBS from other PTDDC elements down the daisy-chain. CSI is determined in part by conventional SATA OBS state register protocols that are modified by internal state registers (ISR) in each individual PTDDC daisy-chain element so as to make the DSS transparent to existing SATA OBS single-disk standard hardware command protocols.Type: GrantFiled: May 15, 2017Date of Patent: January 16, 2018Inventor: Kevin Mark Klughart
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Patent number: 9857857Abstract: A hub hub control method, wherein the hub possesses an uplink port and a plurality of downlink ports, includes: receiving link status of each downlink port to know whether each downlink port has built a link; and when none of the plurality of downlink ports has built a link, controlling the uplink port to be unable to build a link. A hub control circuit, the hub possessing an uplink port and a plurality of downlink ports, includes a link status reception unit and an uplink port control unit for respective execution of the two steps of the hub control method.Type: GrantFiled: May 4, 2015Date of Patent: January 2, 2018Assignee: Realtek Semiconductor Corp.Inventors: Neng-Hsien Lin, Luobin Wang
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Patent number: 9858226Abstract: In one embodiment a system comprises an integrated circuit, a plurality of voltage regulators; and a data bus coupled to the integrated circuit and the plurality of voltage regulators. In some embodiments the integrated circuit comprises logic to embed a timing signal on the data bus. Other embodiments may be described.Type: GrantFiled: December 28, 2012Date of Patent: January 2, 2018Assignee: Intel CorporationInventors: Jayesh Iyer, Edward R. Stanford, Waseem Kraipak
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Patent number: 9857866Abstract: A host apparatus, into which a card having a nonvolatile semiconductor memory is inserted, issues a check command to the card. The check command instructs to send information on whether the card supports a termination process in which the card shifts into a state ready for a stop of power supply from the host apparatus.Type: GrantFiled: July 29, 2015Date of Patent: January 2, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventor: Akihisa Fujimoto
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Patent number: 9858463Abstract: A barcode reader and an accessory are disclosed. The accessory may include an interface system and a wireless and/or wired interface for communication with a host computer such that the barcode reader may communicate with the host computer via the accessory. The interface system includes an authentication coprocessor such that the barcode reader may establish mutual authentication with the host computer using the authentication coprocessor of the interface system. The barcode reader may send a request for an accessory identifier, and the accessory may then query the authentication coprocessor for the accessory identifier and provide the accessory identifier to the barcode reader. The barcode reader may send an authentication challenge to the accessory, and the accessory may then present the authentication challenge to the authentication coprocessor to obtain an authentication response, and provide the authentication response to the barcode reader.Type: GrantFiled: May 31, 2016Date of Patent: January 2, 2018Assignee: The Code CorporationInventors: Steve Pierce, Ryan Hoobler, John Deal, Garrett Russell
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Patent number: 9852103Abstract: Embodiments relate to half-duplex bidirectional transmission of data compliant with a first standard (e.g., Universal Serial Bus (USB) standard) over a physical channel of a multimedia link for transmitting audio/video (“A/V”) data compliant with a second standard (e.g., Mobile High-Definition Link (MHL) standard) between a source device and a sink device using time division multiplexing (TDM). The source device sends units of data including A/V data and forward data compliant with the first standard at first times whereas the sink device sends units of data including backward data compliant with the first standard at second times between transmissions from the source device. The first times do not overlap with the second times. Synchronization signals may be added to the first and second units of data to align character symbols embedded in the first and second units of data.Type: GrantFiled: April 8, 2015Date of Patent: December 26, 2017Assignee: Lattice Semiconductor CorporationInventors: Ju Hwan Yi, Young Il Kim, Gijung Ahn, Min-Kyu Kim, Daeyun Shim, Gyudong Kim, Hoon Choi
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Patent number: 9851941Abstract: A method and apparatus for handling incoming data frames within a network interface controller. The network interface controller comprises at least one controller component operably coupled to at least one memory element. The at least one controller component is arranged to identify a next available buffer pointer from a pool of buffer pointers stored within a first area of memory within the at least one memory element, receive an indication that a start of a data frame has been received via a network interface, and allocate the identified next available buffer pointer to the data frame.Type: GrantFiled: June 18, 2014Date of Patent: December 26, 2017Assignee: NXP USA, INC.Inventor: John Ralston
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Patent number: 9847891Abstract: In a system according to one embodiment of the present disclosure, the system comprises a first device, a second device, a communications link, and a memory. The memory stores instructions that when executed by the system perform a method of communications link training. This method comprises requesting a speed change to a second speed for the first device communicating with the second device at a first speed via the communications link. A saved set of parameters are accessed for at least one of the first device and the second device. A first training cycle is performed for the first device and the second device at the second speed using the saved set of parameters for the at least one of the first device and second device. The reuse of parameters from a previous successful equalization training cycle reduces the time required to perform equalization training.Type: GrantFiled: August 24, 2011Date of Patent: December 19, 2017Assignee: Nvidia CorporationInventors: David Wyatt, Vishal Mehta, Michael Hopgood, Mark Taylor, Hitendra Dutt, Samuel Vincent, Wei-Je Huang