Patents Examined by Evan Pert
  • Patent number: 10262945
    Abstract: A three-dimensional memory device includes driver transistors containing boron doped semiconductor active regions, device contact via structures in physical contact with the boron doped semiconductor active regions, the device contact via structures containing at least one of tantalum, tungsten, and cobalt, and a three-dimensional memory array located over the driver transistors and including an alternating stack of insulating layers and electrically conductive layers and memory structures vertically extending through the alternating stack.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: April 16, 2019
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Raghuveer S. Makala, Murshed Chowdhury, Keerti Shukla, Tomohisa Abe, Yao-Sheng Lee, James Kai
  • Patent number: 10095204
    Abstract: A method includes: generating first information for each of a plurality of jobs based on temperature information acquired from a first information processing device that has executed each of the plurality of jobs, each of the first information indicating change amount of the temperature of the first information processing device when each of the jobs is executed by the first information processing device; generating second information for each of a plurality of second information processing devices that have executed a specific one of the plurality of jobs, the second information indicating change amount of the temperature of each of the second information processing devices which executed the specific job; and determining which one of the plurality of second information processing devices to allocate a job based on the first information, the second information and the temperature information of the plurality of second information processing devices.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: October 9, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Tsuyoshi Honma, Tamotsu Sengoku, Tokutomi Nagao, Naoaki Ono, Seiji Kambe, Yuuji Itou, Haruki Hattori
  • Patent number: 10088599
    Abstract: Systems, terminals, servers and methods are provided for weather forecasting. For example, one or more first terminals acquire environmental information corresponding to the first terminals; wherein the environmental information includes geographic location information of the first terminals and weather data corresponding to the geographic location information; the first terminals transmit the environmental information to a server so that the server acquires weather forecasting information of an area corresponding to one or more geographic locations of the first terminals based on at least information associated with the weather data corresponding to the first terminals; wherein the geographic locations corresponding to the first terminals are within the area; and the first terminals acquire the weather forecasting information of the area transmitted by the server.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: October 2, 2018
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Jingbiao Liang, Chu Zeng, Junhao Fan, Huanyi Zheng, Cheng Li
  • Patent number: 10079354
    Abstract: A transistor device includes an array of fin structures arranged on a substrate, each of the fin structures being vertically alternating stacks of a first isoelectric point material having a first isoelectric point and a second isoelectric point material having a second isoelectric point that is different than the first isoelectric point; one or more carbon nanotubes (CNTs) suspended between the fin structures and contacting a side surface of the second isoelectric point material in the fin structures; a gate wrapped around the array of CNTs; and source and drain contacts arranged over the fin structures; wherein each of the fin structures have a trapezoid shape or parallel sides that are oriented about 90° with respect to the substrate.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: September 18, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Qing Cao, Kangguo Cheng, Zhengwen Li, Fei Liu, Zhen Zhang
  • Patent number: 10060258
    Abstract: Systems and methods for monitoring and characterizing fluids in subterranean formations are provided. In one embodiment, a method for monitoring a well bore is provided, the method including: providing a first quantity of one or more noble gases of a known volume; circulating at least a portion of the fluid and the one or more noble gases in a portion of the well bore; detecting a second quantity of the noble gases in a portion of the fluid that has been circulated in a portion of the well bore; and determining one or more parameters relating to the well bore (e.g., well bore volume, lag time, flow characteristics, and/or efficiency of a gas extraction system) based on the quantities of the noble gases provided and/or detected in the fluid and/or the relative times at which the noble gases are provided or detected.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: August 28, 2018
    Assignee: Halliburton Energy Services, Inc.
    Inventor: Mathew Rowe
  • Patent number: 10020321
    Abstract: A first PMOS transistor is defined by a gate electrode extending along a first gate electrode track. A first NMOS transistor is defined by a gate electrode extending along a second gate electrode track. A second PMOS transistor is defined by a gate electrode extending along the second gate electrode track. A second NMOS transistor is defined by a gate electrode extending along the first gate electrode track. The gate electrodes of the first PMOS transistor and the first NMOS transistor are electrically connected to a first gate node. The gate electrodes of the second PMOS transistor and the second NMOS transistor are electrically connected to a second gate node. Each of the first PMOS transistor, the first NMOS transistor, the second PMOS transistor, and the second NMOS transistor has a respective diffusion terminal electrically connected to a common output node.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: July 10, 2018
    Assignee: Tela Innovations, Inc.
    Inventors: Scott T. Becker, Jim Mali, Carole Lambert
  • Patent number: 9997613
    Abstract: A semiconductor device includes a plurality of gate stacks spaced apart from each other on a substrate, an etch stop layer formed on an upper surface of each gate stack, a dielectric cap layer formed on each etch stop layer, a plurality of source/drain regions formed on the substrate between respective pairs of adjacent gate stacks, and a plurality of contacts respectively corresponding to each source/drain region, wherein the contacts are separated from the gate structures and contact their corresponding source/drain regions.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: June 12, 2018
    Assignee: International Business Machines Corporation
    Inventors: Josephine B. Chang, Bruce B. Doris, Michael A. Guillorn, Isaac Lauer, Xin Miao
  • Patent number: 9995847
    Abstract: A method comprises receiving data associated with a detection of the odor, the data associated with the detection of the odor comprising a location of the detection of the odor and a time of the detection of the odor, retrieving weather data corresponding to the detection of the odor, the weather data including a wind speed and direction in the location of the detection of the odor at the time of the detection of the odor, calculating a location of the source of the odor as a function of the location of the detection of the odor, the time of the location of the odor and the wind speed and direction in the location of the detection of the odor, and outputting to a user on a display a graphical representation of a likely area that includes the location of the source of the odor.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: June 12, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jayant Kalagnanam, Liu Xiao, Kyong Min Yeo, Yinsheng Zhou
  • Patent number: 9995849
    Abstract: A method comprises receiving data associated with a detection of the odor, the data associated with the detection of the odor comprising a location of the detection of the odor and a time of the detection of the odor, retrieving weather data corresponding to the detection of the odor, the weather data including a wind speed and direction in the location of the detection of the odor at the time of the detection of the odor, calculating a location of the source of the odor as a function of the location of the detection of the odor, the time of the location of the odor and the wind speed and direction in the location of the detection of the odor, and outputting to a user on a display a graphical representation of a likely area that includes the location of the source of the odor.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: June 12, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jayant Kalagnanam, Liu Xiao, Kyong Min Yeo, Yinsheng Zhou
  • Patent number: 9984606
    Abstract: Provided is a device for diagnosing a display system of a terminal. The device includes: a sampling module configured to sample the display system of the terminal at at least one sampling breakpoint to acquire sampled data used for diagnosing the display system of the terminal; a storage configured to store the sampled data acquired by the sampling module; and a transmitter configured to transmit the sampled data stored in the storage for the diagnosing the display system.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: May 29, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Xiaojing Ding, Lu Yang, Vinney Guo
  • Patent number: 9983048
    Abstract: A system of detecting loading and unloading of mobile containers such as grain carts utilizes two low pass filters to determine whether the contents of the container are changing by subtracting one filter signal from the other, and using the sign of the difference. Weighing performance is improved by utilizing accelerometers to compensate for measurement dynamics and non-level orientation. Failure and degradation of weight sensors is detected by testing sensor half bridges. Loading and unloading weights can be tied to specific vehicles by utilizing RF beacons.
    Type: Grant
    Filed: November 15, 2014
    Date of Patent: May 29, 2018
    Assignee: Bitstrata Systems Inc.
    Inventors: Ian Robert Meier, Michael David Lockerbie
  • Patent number: 9978682
    Abstract: Complementary metal oxide semiconductor (MOS) (CMOS) standard cell circuits employing metal lines in a first metal layer used for routing, and related methods are disclosed. In one aspect, a CMOS standard cell circuit includes first supply rail, second supply rail, and metal lines disposed in the first metal layer. One or more of the metal lines are dynamically cut corresponding to a first cell boundary and a second cell boundary of the CMOS standard cell such that the metal lines have cut edges corresponding to the first and second cell boundaries. Metal lines not cut corresponding to the first and second cell boundaries can be used to interconnect nodes of the CMOS standard cell circuit. Dynamically cutting the metal lines allows the first metal layer to be used for routing, reducing routing in other metal layers such that fewer vias and metal lines are disposed above the first metal layer.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: May 22, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Anthony Correale, Jr., William Goodall, III, Philip Michael Iles
  • Patent number: 9978742
    Abstract: A device is disclosed that includes a first transistor, a second transistor, and a first PODE device. The second transistor is electrically coupled to the first transistor. The first PODE device is adjacent to a drain/source region of the second transistor. A control end of the first PODE device is electrically coupled to a drain/source end of the second transistor.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: May 22, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Tien-Chien Huang
  • Patent number: 9966309
    Abstract: A method includes forming a metallic layer over a Metal-Oxide-Semiconductor (MOS) device, forming reverse memory posts over the metallic layer, and etching the metallic layer using the reverse memory posts as an etching mask. The remaining portions of the metallic layer include a gate contact plug and a source/drain contact plug. The reverse memory posts are then removed. After the gate contact plug and the source/drain contact plug are formed, an Inter-Level Dielectric (ILD) is formed to surround the gate contact plug and the source/drain contact plug.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: May 8, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yuan Ting, Jyu-Horng Shieh
  • Patent number: 9960205
    Abstract: An optoelectronic device including a semiconductor substrate including first and second opposing faces, a first set of first light-emitting diodes resting on a first portion of the substrate and including conical or frustoconical wire-like semiconductor elements, a first electrode covering each first light-emitting diode, a first conductive portion insulated from the substrate, extending through the substrate and connected to the first electrode; a second set of second light-emitting diodes resting on a second portion of the substrate and including conical or frustoconical wire-like semiconductor elements, a second electrode covering each second light-emitting diode, a second conductive portion insulated from the substrate and connected to the second electrode, and a first conductive element connecting the first conductive portion to the second portion of the substrate on the side of the second face.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: May 1, 2018
    Assignee: Aledia
    Inventors: Christophe Bouvier, Erwan Dornel
  • Patent number: 9959815
    Abstract: A light emitting assembly is described. In one embodiment, one or more light emitting diode (LED) devices and one or more microcontrollers are bonded to a same side of a substrate, with the one or more microcontrollers to switch and drive the one or more LED devices.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: May 1, 2018
    Assignee: APPLE INC.
    Inventors: Kapil V. Sakariya, Andreas Bibl, Kelly McGroddy
  • Patent number: 9960320
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first metal pillar, a second metal pillar, and an insulating layer. The semiconductor layer includes a first surface, a second surface, and a light emitting layer. The first metal pillar is electrically connected to the second surface. The first metal pillar includes first and second metal layers. The first metal layer is provided between the second surface and at least a part of the second metal layer. The second metal pillar is arranged side by side with the first metal pillar, and electrically connected to the second surface. The second metal pillar includes third and fourth metal layers. The third metal layer is provided between the second surface and at least a part of the fourth metal layer. The insulating layer is provided between the first and second metal pillars.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: May 1, 2018
    Assignee: ALPAD CORPORATION
    Inventors: Susumu Obata, Akihiro Kojima
  • Patent number: 9945799
    Abstract: A thermal displacement correction device for a machine tool is provided with detection result determination unit configured to determine, based on an actual position and a reference position detected by position detection unit, whether or not the actual position is based on correct detection, correction error calculation unit configured to calculate a correction error in the actual position if it is determined that the result of detection is based on correct detection, and correction amount modification unit configured to modify a thermal displacement correction amount based on the correction error.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: April 17, 2018
    Assignee: FANUC CORPORATION
    Inventors: Yasuaki Koyama, Susumu Maekawa
  • Patent number: 9941455
    Abstract: Disclosed herein is a light emitting device. The light emitting device is provided to include a light emitting structure, a first electrode pad, a second electrode pad and a heat dissipation pad, and a substrate on which the light emitting diode is mounted. The substrate includes a base; an insulation pattern formed on the base; and a conductive pattern disposed on the insulation pattern. The base includes a post and a groove separating the post from the conductive pattern. An upper surface of the post is placed lower than an upper surface of the conductive pattern, the heat dissipation pad contacts the upper surface of the post, and the first electrode pad and the second electrode pad contact the conductive pattern. With this structure, the light emitting device has excellent properties in terms of electrical stability and heat dissipation efficiency.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: April 10, 2018
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: So Ra Lee, Chang Yeon Kim, Ju Yong Park, Sung Su Son
  • Patent number: 9941322
    Abstract: A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: April 10, 2018
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Hiroshi Ozaki