Abstract: A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.

Abstract: A method of forming a field effect transistor is provided. The method of forming a field effect transistor may include forming a dummy gate perpendicular to and covering a channel region of a semiconductor fin, such that a source drain region of the semiconductor fin remains uncovered, depositing a metal layer above and in direct contact with a sidewall of the dummy gate, and above and in direct contact with a top and a sidewall of the source drain region, and forming a metal silicide source drain in the source drain region by annealing the metal layer and the semiconductor fin, such that the metal silicide source drain overlaps the dummy gate.

Abstract: A system and method of operation involves collecting acceleration and gyroscope data from a first sensor positioned in a wearable device on a user's wrist and a second sensor located in a mobile device. The mobile device determines a trajectory for the wearable device by filtering the first sensor data using the second sensor data, and determines a probability of the user holding an automobile steering wheel using the trajectory. The method may also include determining a probability of the user holding an automobile steering wheel of a specific automobile selected from an automobile list. The disclosed system includes the wearable device and the mobile device.

Abstract: Provided is a lighting device, comprising: a light source module comprising: at least one light source disposed on a printed circuit board; and a resin layer disposed on the printed circuit board so that the light source is embedded; a light reflection member formed on at least any one of one side surface and another side surface of the resin layer; and a diffusion plate having an upper surface formed on the light source module, and a side wall which is integrally formed with the upper surface and formed to extend in a lower side direction and which is adhered onto the light reflection member, wherein a first separated space is formed between the light source module and the upper surface of the diffusion plate, whereby flexibility of the product itself can be secured, and durability and reliability of the product can be also improved.

Abstract: A light emitting device having a structure in which oxygen and moisture are prevented from reaching light emitting elements, and a method of manufacturing the same, are provided. Further, the light emitting elements are sealed by using a small number of process steps, without enclosing a drying agent. The present invention has a top surface emission structure. A substrate on which the light emitting elements are formed is bonded to a transparent sealing substrate. The structure is one in which a transparent second sealing material covers the entire surface of a pixel region when bonding the two substrates, and a first sealing material (having a higher viscosity than the second sealing material), which contains a gap material (filler, fine particles, or the like) for protecting a gap between the two substrates, surrounds the pixel region. The two substrates are sealed by the first sealing material and the second sealing material.

Abstract: Nanoelectromechanical (NEMS) devices having nanomagnets for an improved range of operating voltages and improved control of dimensions of a cantilever are described. For example, in an embodiment, a nanoelectromechanical (NEMS) device includes a substrate layer, a first magnetic layer disposed above the substrate layer, a first dielectric layer disposed above the first magnetic layer, a second dielectric disposed above the first dielectric layer, and a cantilever disposed above the second dielectric layer. The cantilever bends from a first position to a second position towards the substrate layer when a voltage is applied to the cantilever.

Abstract: An electric appliance monitor method and an monitor system are provided. The method includes the following steps. In a sampling period, data of an electric appliance is transmitted to a cloud server, and a load boundary is determined. The electric appliance is detected to obtain a measured power factor, a measured root-mean-square voltage and a measured power. Further, a supply frequency of an electric supply is recognized. Based on the measured data, a real part and an imaginary part of the load current related to a reflection coefficient of the electric appliance during the current usage state is calculated. On a real-imaginary current coordinate system, the load boundary and a coordinated point representing to the real part and imaginary part of the load current are displayed. Whether to execute a protection process is determined according to the load boundary, the real part and the imaginary part of the load current.

Abstract: A fabrication method of a display panel and a display panel, and a display device are provided. The display panel is divided into a display region and a non-display region and comprises a first substrate, and the non-display region of the first substrate includes an IC attaching region. The fabrication method comprises a thinning process. The thinning process includes: 1) forming a barrier layer insoluble to a thinning fluid in a region of a first surface of the first substrate of the display panel corresponding to the IC attaching region; 2) thinning the display panel by adopting the thinning fluid such that a thickness of the IC attaching region of the first substrate is greater than a thickness of the display region of the first substrate; and 3) removing the barrier layer.

Abstract: The light emitting device includes at least one light emitting element that emits light having a peak emission wavelength in a wavelength range from 380 nm to 480 nm inclusive; a first green phosphor that is excited by the primary light emitted by the light emitting element and emits light having the peak emission wavelength in the green region; a second green phosphor that is excited by the primary light and emits light having the peak emission wavelength in the green region; and a red phosphor that is excited by the primary light and emits light having the peak emission wavelength in the red region. The peak emission wavelength of the light emitted by the second green phosphor is shorter than the peak emission wavelength of the light emitted by the first green phosphor.

Abstract: Air cavity packages and methods for producing air cavity packages containing sintered bonded components, multipart window frames, and/or other unique structural features are disclosed. In one embodiment, a method for fabricating an air cavity package includes the step or process of forming a first metal particle-containing precursor layer between a base flange and a window frame positioned over the base flange. A second metal particle-containing precursor layer is further formed between the base flange and a microelectronic device positioned over the base flange. The metal particle-containing precursor layers are sintered substantially concurrently at a maximum processing temperature less than melt point(s) of metal particles within the layers to produce a first sintered bond layer from the first precursor layer joining the window frame to the base flange and to produce a second sintered bond layer from the second precursor layer joining the microelectronic device to the base flange.

Abstract: A self-aligned SiGe FinFET device features a relaxed channel region having a high germanium concentration. Instead of first introducing germanium into the channel and then attempting to relax the resulting strained film, a relaxed channel is formed initially to accept the germanium. In this way, a presence of germanium can be established without straining or damaging the lattice. Gate structures are patterned relative to intrinsic silicon fins, to ensure that the gates are properly aligned, prior to introducing germanium into the fin lattice structure. After aligning the gate structures, the silicon fins are segmented to elastically relax the silicon lattice. Then, germanium is introduced into the relaxed silicon lattice, to produce a SiGe channel that is substantially stress-free and also defect-free. Using the method described, concentration of germanium achieved in a structurally stable film can be increased to a level greater than 85%.

Abstract: Some embodiments include a memory array having a first series of access/sense lines which extend along a first direction, a second series of access/sense lines over the first series of access/sense lines and which extend along a second direction substantially orthogonal to the first direction, and memory cells vertically between the first and second series of access/sense lines. Each memory cell is uniquely addressed by a combination of an access/sense line from the first series and an access/sense line from the second series. The memory cells have programmable material. At least some of the programmable material within each memory cell is a polygonal structure having a sidewall that extends along a third direction which is different from the first and second directions. Some embodiments include methods of forming memory arrays.

Abstract: Embodiments are related to systems and methods for fluidic assembly, and more particularly to systems and methods for assuring deposition of elements in relation to a substrate. In some cases, embodiments include a substrate including a plurality of wells each having a sidewall where a through hole via extends from a bottom of at least one of the plurality of wells; and a post enhanced diode including a post extending from a top surface of a diode structure.

Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.

Abstract: Provided are a silicon carbide semiconductor device that is capable of preventing breakdown voltage degradation in the edge termination structure and a method of manufacturing the same. The p-type regions 31, 32 and the p-type region 33, which serves as an electric field relaxation region and is connected to the first p-type base regions 10, are positioned under the step-like portion 40, and the bottom surfaces of the p-type regions 31, 32, 33 are substantially flatly connected to the bottom surface of the first p-type base regions 10. The first base regions have an impurity concentration of 4×1017 cm?3 or higher. The p-type region 33 is designed to have a lower impurity concentration than the first base regions 10 and higher than the p-type regions 31, 32. In this way, the breakdown voltage degradation in the edge termination structure 102 can be prevented.

Abstract: A method for fabricating a semiconductor device includes patterning a sacrificial layer on a substrate to define a bolometer, with trenches being formed in the sacrificial layer to define anchors for the bolometer, the trenches extending through the sacrificial layer and exposing conductive elements at the bottom of the trenches. A thin titanium nitride layer is then deposited on the sacrificial layer and within the trenches. The titanium nitride layer is configured to form a structural support for the bolometer and to provide an electrical connection to the conductive elements on the substrate.

Abstract: A normal-line detection device is provided with: four or more non-contacting distance sensors for measuring the distance to a processing surface of a work piece, the non-contacting distance sensors being arranged on the periphery of a drill body, in an arrangement plane orthogonal to an axis line of the drill body, and a distance measurement axis of each non-contacting distance sensor and the axis line intersecting; and a PC for calculating an approximation surface of a processing surface on the basis of measurement values from the non-contacting distance sensors and the angle of the non-contacting distance sensors with respect to the axis line, and determining the normal-line of the approximation surface as the normal-line of the processing surface.

Abstract: An active device structure and a method of fabricating an active device are provided. The active device structure includes a gate, an oxide channel layer, a source, a drain and a high power deposited insulation layer. The gate and the oxide channel layer are overlapped in a top and bottom manner. The oxide channel layer includes a top layer and a bottom layer having a crystalline structure different from a crystalline structure of the top layer. The source and the drain both contact the oxide channel layer, wherein a gap separating the source and the drain defines a channel area. The high power deposited insulation layer contacts the top layer of the oxide channel layer. The top layer of the oxide channel layer provides the effect of blocking light, which solves the problem of threshold voltage shift due to the light irradiation on the oxide channel layer.

Abstract: A Group III nitride semiconductor containing: a RAMO4 substrate containing a single crystal represented by the general formula RAMO4 (wherein R represents one or a plurality of trivalent elements selected from the group consisting of Sc, In, Y, and a lanthanoid element, A represents one or a plurality of trivalent elements selected from the group consisting of Fe(III), Ga, and Al, and M represents one or a plurality of divalent elements selected from the group consisting of Mg, Mn, Fe(II), Co, Cu, Zn, and Cd), and a Group III nitride crystal disposed above the RAMO4 substrate, having therebetween a dissimilar film that contains a material different from the RAMO4 substrate, and has plural openings.

Abstract: A TFT includes a substrate, a gate, a gate insulating layer, a semiconductor oxide layer, a source/drain layer, a passivation layer, and a transparent conducting layer arranged from bottom to top. An etching block layer is formed after the source/drain layer arranged on the semiconductor oxide layer is etched. A method for forming for the TFT includes: depositing and photo-etching a gate on a substrate; depositing a gate insulating layer on the gate; depositing and photo-etching a semiconductor oxide layer on the gate insulating layer; depositing and photo-etching a source/drain layer on the semiconductor oxide layer; etching the source/drain layer on the semiconductor oxide layer for forming an etching block layer; depositing a passivation layer on the source/drain layer and the semiconductor oxide layer; depositing a transparent conducting layer on the passivation layer.