Abstract: Embodiments are directed to a method of forming a semiconductor device and resulting structures for controlling a threshold voltage on a nanosheet-based transistor. A nanosheet stack is formed over a substrate. The nanosheet stack includes a first nanosheet vertically stacked over a second nanosheet. A tri-layer gate metal stack is formed on each nanosheet. The tri-layer gate metal stack includes an inner nitride layer formed on a surface of each nanosheet, a doped transition metal layer formed on each inner nitride layer, and an outer nitride layer formed on each doped transition metal layer.

Abstract: A pattern forming method includes forming a guide mask layer including a first feature having a first opening width, a second feature having a second opening width, a third feature having a third opening width. The first width being less than the second width and greater than the third width. A self-organizing material having a phase-separation period is disposed on the guide mask layer to at least partially fill the first, second, and third features. The self-organizing material is process to the cause phase-separation into first and second polymer portions. The first width is greater than the phase-separation period and the third width is less. A masking pattern is formed on the first layer by removing the second polymer portions and leaving the first polymer portions. The masking pattern is then transferred to the first layer.

Abstract: According to an embodiment, a MEMS device includes a deflectable membrane including a first plurality of electrostatic comb fingers, a first anchor structure including a second plurality of electrostatic comb fingers interdigitated with a first subset of the first plurality of electrostatic comb fingers, and a second anchor structure including a third plurality of electrostatic comb fingers interdigitated with a second subset of the first plurality of electrostatic comb fingers. The second plurality of electrostatic comb fingers are offset from the first plurality of electrostatic comb fingers in a first direction and the third plurality of electrostatic comb fingers are offset from the first plurality of electrostatic comb fingers in a second direction, where the first direction is different from the second direction.

Abstract: A display device including a substrate, a first gate electrode, a second gate electrode, an active layer, and a first data electrode is provided. The active layer is disposed between the first gate electrode and the second gate electrode. And one of the first gate electrode and the second gate electrode is connected to the data line, so as to reduce the off leak current.

Abstract: A resistive memory device includes a first electrode, a sidewall spacer electrode located on a sidewall of a dielectric material contacting the first electrode, a resistive memory cell containing a resistive memory material and contacting the sidewall spacer electrode, and a second electrode containing the resistive memory cell.

Abstract: This application is directed to a low cost IC solution that provides Super CMOS microelectronics macros. Hereinafter, SCMOS refers to Super CMOS and Schottky CMOS. SCMOS device solutions includes a niche circuit element, such as complementary low threshold Schottky barrier diode pairs (SBD) made by selected metal barrier contacts (Co, Ti, Ni or other metal atoms or compounds) to P- and N- Si beds of the CMOS transistors. A DTL like new circuit topology and designed wide contents of broad product libraries, which used the integrated SBD and transistors (BJT, CMOS, and Flash versions) as basic components.

Abstract: A re-writeable non-volatile memory device including a re-writeable non-volatile two-terminal memory element (ME) having tantalum. The ME including a first terminal, a second terminal, a first layer of a conductive metal oxide (CMO), and a second layer in direct contact with the first layer. The second layer and the first layer being operative to store at least one-bit of data as a plurality of resistive states, and the first and second layer are electrically in series with each other and with the first and second terminals.

Abstract: A semiconductor device having stable electric characteristics is provided. The transistor includes first to third oxide semiconductor layers, a gate electrode, and a gate insulating layer. The second oxide semiconductor layer has a portion positioned between the first and third oxide semiconductor layers. The gate insulating layer has a region in contact with a top surface of the third oxide semiconductor layer. The gate electrode overlaps with a top surface of the portion with the gate insulating layer positioned therebetween. The gate electrode faces a side surface of the portion in a channel width direction with the gate insulating layer positioned therebetween. The second oxide semiconductor layer includes a region having a thickness greater than or equal to 2 nm and less than 8 nm. The length in the channel width direction of the second oxide semiconductor layer is less than 60 nm.

Abstract: A TFT substrate, a TFT switch and a manufacturing method for the same are disclosed. The method includes steps of disposing a gate electrode layer on a substrate, thinning at least a portion of each side region along a thickness direction of the gate electrode layer in order to form two thin regions, disposing a semiconductor layer above the gate electrode layer, and disposing a source electrode layer and a drain electrode layer on the semiconductor layer, wherein, a contact region between the source electrode layer and the semiconductor layer, and a contact region between the drain electrode layer and the semiconductor layer are respectively corresponding to the two thin regions. The present invention can omit a doping process in order to achieve a good ohmic contact so as to solve a schottky contact problem.

Abstract: An FFS mode array substrate and a manufacturing method thereof are provided. The FFS mode array substrate has: a glass substrate provided with a gate electrode thereon; a first insulation layer; a semiconductor layer having a channel region and a common electrode region to form a channel semiconductor layer on the channel region of the semiconductor layer, and form a common electrode layer on the common electrode region of the semiconductor layer by doping semiconductor thereon; and a second insulation layer provided with a first through hole and a second through hole therein.

Abstract: A method of manufacturing a light-emitting display device, the method including forming a first electrode on a substrate for each pixel of a plurality of pixels; forming a pixel defining film on the first electrode such that the pixel defining film includes an opening exposing the first electrode; and forming an organic layer on the first electrode, wherein forming the organic layer includes providing an organic solution into the opening of the pixel defining film, and drying the organic solution by performing an exhaust process in a state where an air current is provided by using a drying gas such that the air current is sequentially composed of a position facing the organic solution, a position to which the organic solution is discharged, and a position facing the organic solution.

Abstract: A semiconductor device according to the present invention includes a first conductive-type SiC semiconductor layer, and a Schottky metal, comprising molybdenum and having a thickness of 10 nm to 150 nm, that contacts the surface of the SiC semiconductor layer. The junction of the SiC semiconductor layer to the Schottky metal has a planar structure, or a structure with recesses and protrusions of equal to or less than 5 nm. A method for manufacturing a semiconductor device according to the present invention includes: a step of forming a Schottky metal, comprising molybdenum and having a thickness of 10 nm to 150 nm, on the surface of a first conductive-type SiC semiconductor layer; and a step for heat treating the Schottky metal while the surface thereof is exposed, and structuring the junction of the SiC semiconductor layer to the Schottky metal to be planar, or to have recesses and protrusions of equal to or less than 5 nm.

Abstract: Provided is a hybrid diode device. The hybrid diode device includes a first lower nitride layer disposed on a substrate and including a first 2-dimensional electron gas (2DEG) layer, a second lower nitride layer extending from the first lower nitride layer to the outside of the substrate and including a second 2DEG layer, a first upper nitride layer disposed on the first lower nitride layer, a second upper nitride layer disposed on the second lower nitride layer, a first cap layer disposed on the first upper nitride layer, a second cap layer disposed on the second upper nitride layer, a first electrode structure connected to the first lower nitride layer and the first cap layer; and a second electrode structure connected to the second lower nitride layer and the first electrode structure. The second lower nitride layer generates electric energy through dynamic movement.

Abstract: Provided is a technology for efficiently obtaining a metal oxide film having good adhesiveness. A method of producing a metal oxide film includes: an application step of applying a solution containing an organic metal complex onto a substrate; an ozone exposure step of exposing the resultant coating film to ozone; and a heating step of heating the coating film.

Abstract: An array substrate, a display device and a method for fabrication the array substrate are provided. The array substrate comprises a base substrate; gate lines and data lines; pixel electrodes; a common electrode layer including at least one first slot and at least one second slot at least partially overlapped with the first slot; at least one shielding electrode disposed above the data line; and at least one shielding branch electrode disposed above the gate line and electrically connected to the shielding electrode. A projection of the shielding electrode onto the data line is at least partially overlapped with the data line, a projection of the shielding branch electrode onto the gate line is at least partially overlapped with the gate line, and the array substrate exhibits at least one raised area where the at least one shielding branch electrode is embedded.

Abstract: The present disclosure provides a method for producing a thin film transistor. The method includes the steps of: forming a protective layer on an active layer of the thin film transistor and patterning the protective layer along with the active layer when the active layer is deposited; depositing a source and drain electrode layer and patterning it by a dry etching to form a source electrode and a drain electrode; and etching or passivating the protective layer located in a back channel region of the source electrode and the drain electrode. In addition, the present disclosure also discloses a thin film transistor produced by the above method, and an array substrate.

Abstract: Disclosed herein is a wafer processing method for processing the back side of a wafer having a plurality of devices formed on the front side so as to be separated by a plurality of crossing division lines. The wafer processing method includes a back grinding step of grinding the back side of the wafer to thereby reduce the thickness of the wafer to a predetermined thickness, a back polishing step of polishing the back side of the wafer after performing the back grinding step, thereby removing grinding strain, and a diamond-like carbon film deposition step of forming a diamond-like carbon film on the back side of the wafer after performing the back polishing step.

Abstract: The disclosed provides a thin film transistor, an array substrate, a display device and methods of manufacturing the thin film transistor and the array substrate. An active layer of the thin film transistor is formed of metallic oxide material, and a source electrode and a drain electrode of the thin film transistor both are formed of graphene or silver nanowire. The source electrode and the drain electrode are formed through an ink-jet printing process. Due to characteristics of graphene or silver nanowire, the manufacturing process of the thin film transistor may be simplified, the performance of the thin film transistor may be improved and the size of a channel region may be decreased. Further, an aperture ratio of the array substrate and the display device having such a thin film transistor may be increased.

Abstract: To enhance the performance of a semiconductor device. In a method for manufacturing a semiconductor device, a metal film is formed over a semiconductor substrate having an insulating film formed on a surface thereof, and then the metal film is removed in a memory cell region, whereas, in a part of a peripheral circuit region, the metal film is left. Next, a silicon film is formed over the semiconductor substrate, then the silicon film is patterned in the memory cell region, and, in the peripheral circuit region, the silicon film is left so that an outer peripheral portion of the remaining metal film is covered with the silicon film. Subsequently, in the peripheral circuit region, the silicon film, the metal film, and the insulating film are patterned for forming an insulating film portion formed of the insulating film, a metal film portion formed of the metal film, and a conductive film portion formed of the silicon film.

Abstract: The present invention discloses a wafer-level semiconductor device and a manufacturing method thereof. The wafer-level semiconductor device comprises a wafer-level substrate; a plurality of serial groups formed on a surface of the substrate and are disposed in parallel, each serial group comprising a plurality of parallel groups disposed in series, each parallel groups comprising a plurality of unit cells disposed in parallel, wherein each unit cell is an independent functional unit which is formed by processing a semiconductor layer directly grown on a surface of the substrate; and a lead, which is at least electrically connected between two selected parallel groups in each serial group to make ON-voltages of all the serial groups substantially consistent. The device of the present invention, with a simple structure, a simple and convenient manufacturing process, and a high efficiency to produce qualified products, can be put into large-scale production and application.