Patents Examined by Evren Seven
  • Patent number: 11195807
    Abstract: Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: December 7, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tomoyuki Asada, Yoichi Nogami, Kenichi Horiguchi, Shigeo Yamabe, Satoshi Miho, Kenji Mukai
  • Patent number: 11196401
    Abstract: In tuning a radio frequency (RF) module including a non-volatile tunable RF filter, a desired frequency and an undesired frequency being provided by an amplifier of the RF module are detected. The non-volatile tunable RF filter is coupled to an output of the amplifier of the RF module. A factory setting of an adjustable capacitor in the non-volatile tunable RF filter is changed by factory-setting a state of a non-volatile RF switch, such that the non-volatile tunable RF filter substantially rejects the undesired frequency and substantially passes the desired frequency. The adjustable capacitor includes the non-volatile RF switch, and the factory setting of the adjustable capacitor corresponds to a factory-set state of the non-volatile RF switch. An end-user is prevented access to the non-volatile RF switch, so as prevent the end-user from modifying the factory-set state of the non-volatile RF switch.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: December 7, 2021
    Assignee: Newport Fab, LLC
    Inventors: Chris Masse, David J. Howard, Nabil El-Hinnawy, Gregory P. Slovin
  • Patent number: 11195777
    Abstract: An object is to provide a semiconductor module that ensures to determine a state of the thermally conductive material provided between a semiconductor device and a heat sink. The semiconductor module includes the semiconductor device, the thermally conductive material, and a controller. The thermally conductive material has a property of softening or melting at a specific temperature and is provided on one surface, which is mountable on the heat sink, of the outer surfaces of the semiconductor device. The controller determines the state of the thermally conductive material between the one surface of the semiconductor device and the heat sink based on temperature information on two different points in the semiconductor device.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: December 7, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroaki Nagafuchi
  • Patent number: 11189652
    Abstract: Provided are a structure having excellent moisture resistance, a color filter, a solid-state imaging element, an image display device, and a method for producing a structure. Provided is also a composition for forming an organic material layer which is used to form the above-mentioned structure. This structure 100 has a support 1, partition walls 2 formed on the support 1, colored layers 4 formed in regions partitioned by the partition walls 2, on the support 1, and organic material layers 3 formed using a composition including a compound having a group with an ethylenically unsaturated bond, between the partition walls 2 and the colored layers 4.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: November 30, 2021
    Assignee: FUJIFILM Corporation
    Inventors: Kazuya Oota, Kaoru Aoyagi
  • Patent number: 11189491
    Abstract: A method of forming a mask pattern and a method of fabricating a semiconductor device, the method of forming a mask pattern including providing a substrate including a plurality of patterns thereon; forming a mask material solution layer such that the mask material solution layer covers the patterns on the substrate; and applying a liquid material to remove an upper portion of the mask material solution layer, wherein the mask material solution layer includes a fluorine additive concentrated at the upper portion of the mask material solution layer.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: November 30, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chul-Ho Kim, Yool Kang, Jaesung Kang, Jinphil Choi
  • Patent number: 11189484
    Abstract: Methods, apparatuses, and systems related to a semiconductor nitridation passivation are described. An example method includes performing a dry etch process on a semiconductor structure on a wafer in a semiconductor fabrication process. The method further includes performing a dry strip process on the semiconductor structure. The method further includes performing a first wet strip clean process on the semiconductor. The method further includes performing a second wet strip clean process on the semiconductor. The method further includes performing a nitridation passivation on the semiconductor structure to avoid oxidization of the semiconductor structure. The method further performing a spacer material deposition on the semiconductor structure.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: November 30, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Russell A. Benson, Silvia Borsari, Vinay Nair, Ying Rui, Somik Mukherjee
  • Patent number: 11189737
    Abstract: A laminated body comprising a substrate, one or more layers selected from a contact resistance reducing layer and a reduction suppressing layer, a Schottky electrode layer and a metal oxide semiconductor layer in this order.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: November 30, 2021
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Yoshihiro Ueoka, Takashi Sekiya, Shigekazu Tomai, Emi Kawashima, Yuki Tsuruma, Motohiro Takeshima
  • Patent number: 11164816
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a first lattice constant, a first word line positioned in the substrate, and a plurality of stress regions positioned adjacent to lower portions of sidewalls of the first word line. The plurality of stress regions have a second lattice constant, the second lattice constant of the plurality of stress regions is different from the first lattice constant of the substrate.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: November 2, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Tse-Yao Huang
  • Patent number: 11158514
    Abstract: A semiconductor device includes an n-type semiconductor layer; a first metal layer provided on the n-type semiconductor layer, the first metal layer including first atoms capable of being n-type impurities in the n-type semiconductor layer; a second metal layer provided on the first metal layer, the second metal layer including titanium atoms; a third metal layer provided on the second metal layer; and a second atom capable of being a p-type impurity in the n-type semiconductor layer. The second atom and a part of the titanium atoms are included in a vicinity of an interface between the first metal layer and the second metal layer.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: October 26, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Toshiyuki Nishikawa, Kazuhiko Komatsu, Shinji Nunotani, Yoshiyuki Harada, Hideto Sugawara
  • Patent number: 11159145
    Abstract: In a first approach, a reconfigurable radio frequency (RF) filtering module includes a phase-change material (PCM) RF switch bank and an RF filter bank. Each RF filter in the RF filter bank is capable to be engaged and disengaged by a PCM RF switch in the PCM RF switch bank. In a second approach, a tunable RF filter includes PCM RF switches and a capacitor and/or an inductor. Each of the capacitor and/or inductor is capable to be engaged and disengaged by at least one PCM RF switch of the PCM RF switches. In a third approach, an adjustable passive component includes multiple segments and a PCM RF switch. A selectable segment in the multiple segments is capable to be engaged and disengaged by the PCM RF switch. In all approaches, each PCM RF switch includes a PCM and a heating element transverse to the PCM.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: October 26, 2021
    Assignee: Newport Fab, LLC
    Inventors: Nabil El-Hinnawy, Chris Masse, Gregory P. Slovin, David J. Howard
  • Patent number: 11158520
    Abstract: A process for assembling microelectronic or semiconductor chips, comprising: providing a semiconductor chip having an active face with a connection pad; coating the active face of the semiconductor chip with a conformal dielectric material layer, such that the connection pad is completely coated by the conformal dielectric material layer; temporarily adhering the active face of the semiconductor chip to a carrier wafer; temporarily adhering the carrier wafer to a wafer-with-a-through-cavity such that the semiconductor chip extends into the through-cavity; assembling the semiconductor chip to the wafer-with-the-through-cavity by filling the through-cavity with a heat spreader material; releasing the assembled semiconductor chip and wafer-with-the-through-cavity from the carrier wafer; removing the conformal dielectric material layer from at least a portion of the connection pad; and forming an electrical connection to said at least a portion of the connection pad.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: October 26, 2021
    Assignee: HRL Laboratories, LLC
    Inventor: Florian G. Herrault
  • Patent number: 11158794
    Abstract: A high-yield, tunable radio frequency (RF) filter includes a plurality of process-dependent capacitors and a plurality of non-volatile RF switches. Each of the plurality of process-dependent capacitors is connected to at least one of the plurality of non-volatile RF switches. An auxiliary capacitor in the plurality of process-dependent capacitors is engaged by an ON-state non-volatile RF switch in the plurality of non-volatile RF switches. A primary capacitor in the plurality of process-dependent capacitors is disengaged by an OFF-state non-volatile RF switch in the plurality of non-volatile RF switches. The auxiliary capacitor substitutes for the primary capacitor.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: October 26, 2021
    Assignee: Newport Fab, LLC
    Inventors: Chris Masse, David J. Howard, Nabil EI-Hinnawy, Gregory P. Slovin
  • Patent number: 11145540
    Abstract: The present disclosure provides a semiconductor structure and a method for preparing the semiconductor structure. The semiconductor structure includes a base layer, a plurality of conductive lines, a plurality of dielectric pillars, and a sealing layer having a plurality of sealing caps. The conductive lines are disposed on the base layer. The dielectric pillars are disposed on the base layer and separated from the conductive layer. The sealing caps are disposed between the conductive lines and the dielectric pillars, wherein the sealing caps are in contact with the conductive lines and the dielectric pillars, and separated from the base layer.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: October 12, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chun-Chi Lai
  • Patent number: 11139792
    Abstract: In tuning a radio frequency (RF) module including a non-volatile tunable RF filter, a desired frequency and an undesired frequency being provided by an amplifier of the RF module are detected. The non-volatile tunable RF filter is coupled to an output of the amplifier of the RF module. A factory setting of an adjustable capacitor in the non-volatile tunable RF filter is changed by factory-setting a state of a non-volatile RF switch, such that the non-volatile tunable RF filter substantially rejects the undesired frequency and substantially passes the desired frequency. The adjustable capacitor includes the non-volatile RF switch, and the factory setting of the adjustable capacitor corresponds to a factory-set state of the non-volatile RF switch. An end-user is prevented access to the non-volatile RF switch, so as prevent the end-user from modifying the factory-set state of the non-volatile RF switch.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: October 5, 2021
    Assignee: Newport Fab, LLC
    Inventors: Chris Masse, David J. Howard, Nabil El-Hinnawy, Gregory P. Slovin
  • Patent number: 11139168
    Abstract: Exemplary methods of semiconductor processing may include depositing a material on a substrate seated on a substrate support housed in a processing region of a semiconductor processing chamber. The processing region may be at least partially defined by the substrate support and a faceplate. The substrate support may be at a first position within the processing region relative to the faceplate. The methods may include translating the substrate support to a second position relative to the faceplate. The methods may include forming a plasma of an etchant precursor within the processing region of the semiconductor processing chamber. The methods may include etching an edge region of the substrate.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: October 5, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Jun Ma, Amit Bansal, Tuan A. Nguyen
  • Patent number: 11139365
    Abstract: An integrated circuit comprising: a source comprising an output port; a set of serially-connected resistors electrically coupled to the output port of the source; a comparator comprising a first input port, a second input port, and an output port; a set of switches, each switch in the set of switches comprising a first terminal electrically coupled to the first input port of the comparator, and a second terminal electrically coupled to the set of serially-connected resistors; a current source comprising an output port electrically coupled to the second input port of the comparator; and a pin electrically coupled to the output port of the current source.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: October 5, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Uwe Schlenker, Stefan Herzer, Konrad Wagensohner
  • Patent number: 11139364
    Abstract: A display panel and a method of producing the display panel are disclosed. A pixel unit and an auxiliary power supply unit are disposed at a portion of the display panel corresponding to the display sub-areas, the auxiliary power supply unit is configured to supply a power to a cathode layer so that an voltage of each of the display sub-areas applied by the cathode layer is equal to or substantially equal to each other. The cathode layer has a first cathode and a second cathode. The auxiliary power supply unit has a power line and an auxiliary power supply electrode. The display panel has an improved display quality in this disclosure.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: October 5, 2021
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Zhaosong Liu, Jangsoon Im
  • Patent number: 11133433
    Abstract: A semiconductor optical device is comprised of a phonon donating material structurally connected to an indirect bandgap material to improve absorption and emission of light in the indirect bandgap material. An excitation energy source provides excitation radiation to the semiconductor optical device to excite electrons in the semiconductor optical device. Phonons from the phonon donating material present in the indirect bandgap material provide a mechanism for increased rates of electron-hole generation and recombination, and electrical leads provide an electrical connection to the semiconductor optical device.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: September 28, 2021
    Assignee: UCHICAGO ARGONNE, LLC
    Inventor: Chad Husko
  • Patent number: 11133455
    Abstract: An example device includes a nanovoided polymer element, which may be located at least in part between the electrodes. In some examples, the nanovoided polymer element may include anisotropic voids, including a gas, and separated from each other by polymer walls. The device may be an electroactive device, such as an actuator having a response time for a transition between actuation states. The gas may have a characteristic diffusion time (e.g., to diffuse half the mean wall thickness through the polymer walls) that is less than the response time. The nanovoids may be sufficiently small (e.g., below 1 micron in diameter or an analogous dimension), and/or the polymer walls may be sufficiently thin, such that the gas interchange between gas in the voids and gas absorbed by the polymer walls may occur faster than the response time, and in some examples, effectively instantaneously.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: September 28, 2021
    Assignee: Facebook Technologies, LLC
    Inventors: Andrew Spann, Eric Schmitt, Nagi Elabbasi, Kenneth Diest, Katherine Marie Smyth, Renate Eva Klementine Landig, Andrew John Ouderkirk
  • Patent number: 11114334
    Abstract: A semiconductor device includes a first bit line and a second bit line disposed over a semiconductor substrate, and a dielectric structure disposed over a sidewall of the first bit line. The first bit line is between the second bit line and the dielectric structure, and the first bit line is separated from the second bit line by an air gap. A method for preparing a semiconductor device includes forming a first dielectric structure and a second dielectric structure over a semiconductor substrate, and forming a conductive material over the first and the second dielectric structures. The conductive material extends into a first opening between the first and the second dielectric structures. The method also includes partially removing the conductive material to form a first bit line and a second bit line in the first opening.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: September 7, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Liang-Pin Chou