Abstract: Various embodiments include methods performed by a processor for managing voltage droop margins of a power distribution network (PDN). Various embodiments may include receiving, by a processor from a first client powered by a shared power rail within the PDN, a first requested performance corner, receiving, by the processor from a second client powered by the shared power rail, a second requested performance corner, determining by the processor a first peak current value based on the first requested performance corner, determining by the processor a second peak current value based on the second requested performance corner, determining by the processor a system voltage droop margin based on the first peak current value, the second peak current value, and an impedance value of the PDN, and adjusting a voltage of the shared power rail based on the system voltage droop margin.

Abstract: A first command is scheduled on a command bus, where the first command requires use of a data bus resource at a first time period after scheduling the first command. Prior to the first time period, a second command is identified according to a scheduling policy. A determination is made whether scheduling the second command on the command bus will cause a conflict in usage of the at least one data bus resource. In response to determining that scheduling the second command will cause the conflict in usage, a third lower-priority command is identified for which scheduling on the command bus will not cause the conflict in usage. The third command is scheduled on the command bus prior to scheduling the second command, even though it has lower priority than the second command.

Abstract: A power negotiation method for power over Ethernet, power sourcing equipment, a system, and a storage medium are provided, and belong to the field of power over Ethernet technologies. The power sourcing equipment includes a plurality of power supply ports and a plurality of data ports. The power sourcing equipment supplies power to a connected powered device through the power supply port, and transmits data to the connected powered device through the data port. In this way, the power supply port can meet a data transmission requirement when a data transmission rate increases. According to the application, when a first power supply port and a first data port are connected to a first powered device, the power sourcing equipment can perform power negotiation with first power sourcing equipment through the first data port based on port feature information of the first power supply port.

Abstract: The system on a chip includes at least a first digital domain configured to be reinitialized by a first reinitialization signal, a second digital domain and an interface circuit. The interface circuit includes a starting register in the first digital domain, a destination register in the second digital domain and a synchronization circuit in the first digital domain. The interface circuit is configured to transfer data from the starting register to the destination register upon command of a control signal transmitted by the synchronization circuit. The starting register and the synchronization circuit are configured to not be reinitialized by the first reinitialization signal.

Abstract: A clock generating circuit includes an input terminal, configured to receive a clock signal; an output terminal, configured to output an output signal; a gray counter circuit, coupled to the input terminal, and configured to divide the clock signal to produce a first output signal; and a shielding circuit, coupled to the input terminal, the gray counter circuit and the output terminal, and configured to shield a glitch in the first output signal to generate the output signal according to the clock signal.

Abstract: A method including identifying the operation mode of the electronic device as a first operation mode, sensing a change of setting corresponding to the first operation mode, determining whether to update setting information about the setting, based on at least one of a changing pattern or a change history of a user, and when the operation mode is identified later as the first operation mode, providing the user with the first operation mode with the plurality of updated settings including the setting information about the updated setting is provided.

Abstract: The present disclosure provides an information reading method, a device, a cable, a charging system, and a computer storage medium. The device includes a device control chip and a first interface. The first interface includes a first-type data signal terminal and a second-type data signal terminal. The first-type data signal terminal is connected to a power supply terminal of a communication control chip of the cable. The second-type data signal terminal is connected to a data signal terminal of the communication control chip. The device control chip is configured to control the first-type data signal terminal to be in a first output state. The first-type data signal terminal is configured to provide, when in the first output state, a first voltage to the power supply terminal, to supply power to the communication control chip.

Abstract: Embodiments described herein relate to methods, systems, and non-transitory computer readable mediums storing instructions for migrating BIOS settings to a new computational device. Using telemetry and other sources, one or more embodiments of the invention determine the identity of the one or more hardware elements and from that produces a compatible tree for the new computation device. The method then retrieves previous BIOS settings that are to be migrated, and determines, using the compatible tree, one or more BIOS settings of the previous BIOS settings that need to be changed. The BIOS is changed, and the updated BIOS settings are then migrated to the new computational device, wherein the BIOS on the new computational device is configured with the updated BIOS settings.

Abstract: A computing device includes a host processor to execute a host driver to create a host-side interface, the host-side interface emulating a first Ethernet interface, assign the host-side interface a first medium access control (MAC) address and a first Internet Protocol (IP) address. Memory components are disposed on a substrate. A memory channel network (MCN) processor is disposed on the substrate and coupled between the memory components and the host processor. The MCN processor is to execute an MCN driver to create a MCN-side interface, the MCN-side interface emulating a second Ethernet interface. The MCN processor is to assign the MCN-side interface a second MAC address and a second IP address, which identify the MCN processor as a MCN network node to the host processor.

Abstract: A system and method for installation and configuration of computing resources where a local attribute that uniquely identifies a deployed device is used with a query to a remote domain name server to receive one or more responses to the query, the responses from the domain name server providing the steps and operations to implement an expected local configuration which is then validated and implemented in each the deployed device.

Abstract: Embodiments of a multi-processor array are disclosed that may include a plurality of processors, local memories, configurable communication elements, and direct memory access (DMA) engines, and a DMA controller. Each processor may be coupled to one of the local memories, and the plurality of processors, local memories, and configurable communication elements may be coupled together in an interspersed arrangement. The DMA controller may be configured to control the operation of the plurality of DMA engines.

Abstract: An electronic control unit includes a microcomputer configured to be started by a plurality of starting factors, in which different operation modes are associated with each of the starting factors, and a resource is associated with each of the operation modes. The microcomputer identifies a starting factor in an initialization process started by the starting factor, and selects and executes an operation mode associated with the starting factor identified. When another starting factor is generated during execution of the operation mode, the microcomputer stops execution of the operation mode and restarts, and then executes an operation mode associated with the other starting factor.

Abstract: Devices and techniques for CHAINED RESOURCE LOCKING are described herein. Threads form a last-in-first-out (LIFO) queue on a resource lock to create a chained lock on the resource. A data store representing the lock for the resource holds the previous thread's identifier, enabling a subsequent thread to wake the previous thread using the identifier when the subsequent thread releases the lock. Generally, the thread releasing the lock need not interact with the data store, reducing contention for the data store among many threads.

Abstract: A method, apparatus and storage medium for starting up peripheral component interconnect express (PCIE) device are provided. According to the method, a basic input/output system (BIOS) attempts to verify firmware of a PCIE device to determine whether the firmware of the PCIE device is tampered with. Moreover, the BIOS may only start up a PCIE device with firmware that succeeds in the verification. Therefore, a computer device is prevented from starting up a PCIE device with firmware that is tampered with, thereby reducing the security risk caused by the PCIE device to the computer device.

Abstract: Embodiments of the systems and methods disclosed herein relate to a modem having a processor including a Unified Extensible Firmware Interface (UEFI) driver. The UEFI driver can be configured to provide a software interface between an operating system for the modem and firmware for the modem. The modem can include a boot diagnostic driver configured to run from the UEFI driver and execute a diagnostic test when the modem is booting up. The boot diagnostic driver can be configured to generate a signal based on a result of the diagnostic test.

Abstract: According to embodiments of the present disclosure, an Information Handling System (IHS), systems and methods for identifying firmware versions of a firmware image using SPDM alias certificates are disclosed. In one embodiment, an IHS includes a Security Protocol and Data Model (SPDM)-enabled device conforming to a SPDM specification, and computer-executable instructions to receive a request to attest a firmware image, generate an alias certificate using a hash of the firmware and version information associated with the firmware in response to the request, and using the alias certificate, attest the version of the firmware image using the version information.

Abstract: Embodiments herein provide more efficient, more flexible, and more cost-effective ways to provide additional and/or increased functionality to an information handling system. Presented herein are embodiments of an application acceleration port interface module (which embodiments may be referred to herein for convenience as “AAPIM”) into which pluggable I/O (input/output) modules may be inserted and the other ends inserted into ports of an information handling system to provide the information handling system with increase capabilities (e.g., increased resource, such as added processing, and increased services, such as new applications or accelerated services). AAPIM embodiments are versatile solutions to address application acceleration needs that can be quickly reprogrammed to address specific needs of a user.

Abstract: Optimized bus powered peripheral battery charging includes a circuit to initiate a change in an advanced configuration and power interface (ACPI) state in a controller allowing charging of a peripheral device battery, the circuit including a signal converter coupled between an input port and the controller to sense when a the peripheral device battery is coupled to an input port and to restrict the controller from changing ACPI state multiple times for a given peripheral device battery coupling; and a ground loop detector coupled in parallel to the signal converter between the input port and the controller to allow the controller to know that the peripheral device battery has maintained being coupled to the input port.

Abstract: Aspects of the embodiments are directed to systems, methods, and computer program products that facilitate a downstream port to operate in Separate Reference Clocks with Independent Spread Spectrum Clocking (SSC) (SRIS) mode. The system can determine that the downstream port supports one or more SRIS selection mechanisms; determine a system clock configuration from the downstream port to a corresponding upstream port connected to the downstream port by the PCIe-compliant link; set an SRIS mode in the downstream port; and transmit data across the link from the downstream port using the determined system clock configuration.

Abstract: Some embodiments of the invention provide a method for generating custom system templates to define new system types. For a particular system type, the method defines at least a manifest file that specifies a set of properties of the particular system type. The method compresses the defined manifest file to create a custom system template package for the particular system type. The method uploads the custom system template package to an authorization service in order to instantiate a new system of the particular system type.