Abstract: A computer system with an emulation mechanism includes a program execution unit for executing an application program. The application program includes a write command. An emulation control unit writes an address and data concerning a write command in buffers in response to the write command. When a predetermined condition is satisfied, the emulation control unit generates and outputs an interrupt to the program execution unit. In response to the interrupt, the program execution unit executes an emulation program and emulates the address and data stored in the buffers upon execution of the emulation program.

Abstract: The read/write head buffer provides a buffer memory for each read/write head in the rotating media data storage system to that a seek request from the processor can be handled as soon as the beginning of the requested data record is positioned below the associated read/write head. The data image stored on the rotating media is read from the rotating media by the read/write head and stored in the read/write head buffer independent of the availability of a data communication path to the processor. Thus, the read data operation need not be synchronized with the availability of a data communication path to the processor and the requested data is retrieved from the rotating media as soon as the data record is properly positioned. In no case is the data retrieval time greater than one revolution of the rotating media. The error correction codes written on the rotating media to protect the integrity of the requested data are maintained since they are stored in the read/write head buffer along with the data record.

Abstract: This invention relates to a central office (CO) based automatic call distributor (ACD) system arrangement for providing resource control and call event data processing services for a plurality of ACD systems, served by a switching system. The arrangement comprises a switching system, having a control processor complex (CPC), a special Event and Control Link (ECL) processor that performs ACD end-user call event data partitioning and ACD end-user resource allocation message screening, and one or more Management Information System (MIS) processors that perform data processing to derive statistics associated with calls to an ACD. The ECL receives, partitions, and transmits call event data messages from the CPC to the MIS processors.

Abstract: In order to make parallel processing of a serial execution type user program automatically and at a high speed without re-coding, an object code is parallelized by detection of the possibility of parallel execution in an iteration unit of a loop, detection of the possibility of parallel execution of each statement in the loop, the interchange of an outer loop by an inner loop of a multiple loop, reduction of the multiple loop to a single loop, inclined coversion for making parallel execution along a wave front plane (line) when sufficient multiplicity is not derived, and the program which is estimated to have the shortest processing time is selected from the granularity, and multiplicity of the object code, the variance of the number of instructions and the proportion of synchronization control at the time of parallelization of the object code.

Abstract: A data processing system comprises a number of processing nodes, each having a processor and a local store. The workload of the system is represented by packets, including function packets specifying a function and pointers to one or more argument packets to which the function is to be applied. When a node processes a function packet, it checks whether all its argument packets are resident in the local store. If not, copies of the argument packets are fetched from the remote nodes in which they reside. These argument packets are referenced by special indirection packets, which contain the local and global address of the argument packet, and a reference count for garbage collection purposes.

Abstract: A hardware cartridge performs the function of a verifiable, use-once authorization. The hardware cartridge is provided with physical security so that its contents are not accessible except via a specific protocol. The cartridge stores data in two or more segments. The cartridge responds to a query or challenge by outputting that portion of the data it stores selected by the query or challenge. Assuming the authorizing device has access to the complete contents of the hardware cartridge, it can verify the authenticity by receiving only that portion of the contents selected by its query. In one embodiment, the two segments comprise a pair of shift registers which feed data to a multiplexer; the multiplexer is controlled by the query to output the selected portion of the stored data. In another embodiment, a plurality of segments are stored in a random access memory which is addressed by the query.

Abstract: An architecture for a dynamic video random access memory on a single integrated circuit chip having internal circuitry for performing drawing or replacement rule logical operations on an addressed line of stored video information in the RAM and further having the write masking circuitry for modifying selected portions of the line of stored video information between selected START and STOP bit locations within the line.

Abstract: A technique for assigning addresses to modular units connected to a computer system expansion bus. A unique address is initially generated in a controller module attached to the expansion bus and is transferred to the first one of several serially coupled expansion modules. The first modules receives the unique address which now identifies that module and generates a new unique address from the received unique address. The new unique address is transferred to the next expansion module which uses the received address to identify itself. The steps are repeated until each expansion module has received a unique address to identify itself. In each module, a Read Only Memory (ROM) is used to receive the unique address from the previous module and to generate a new address for the next module.

Abstract: An integrated records management system having the capability to record and transcribe dictation. The system is particularly useful for the prompt and efficient management of patient's medical records. The system includes a digital dictation sub-system with a number of dictation input units and a number of transcription output units. The dictation system receives dictation jobs corresponding to reports, and particularly medical reports and stores them as voice files for later output for review of transcription. Job records containing information about the dictation jobs is transmitted to a database server which manages and maintains a database of medical records. The transcription output terminals together with word processing stations connected to the data base server form work stations for transcriptionists.

Abstract: Apparatus and method for servicing interrupt requests on a pended bus. An interrupt servicing node provides interrupt acknowledge messages including destination data specifying a particular interrupting node at times when the interrupt servicing node is ready to service an interrupt request message. The interrupt servicing node includes storage for specifying the identity of a particular interrupting node and for indicating that an interrupt request is pending from a particular interrupting node. An interrupting node provides to the pended bus an interrupt request message including ID data for identifying the interrupting node as the source of an interrupt request. The interrupting node detects whether an interrupt acknowledge message on the bus includes destination data specifying that interrupting node.

Abstract: A grouping device comprises a register table and a grouping unit the register table having m registers corresponding to m groups, each register including an n-bits data storing portion corresponding to the n input signals, for registering relationships between the n input signals and the m groups, the grouping unit receiving grouping signals output from the register table and the n input signals, for selecting one group from the m groups for each input signal and grouping each input signal into the selected group in accordance with the register table. Therefore, the register access time is shortened and the confirmation of the contents of the register by the CPU is made easier.

Abstract: A data input device for an electronic data processing device such as a personal computer includes an input keyboard, which has a key field, a casing and a plug-in receptacle for a keyboard plug on a circuit connector; and a connector, such as a junction cable, which has a keyboard plug which fits into the receptacle on the keyboard, a circuit connector which is a connection wire, a plug at the end of the connection wire connecting with the electronic data processing device, and programmable encoder electronics for encoding unique signals corresponding to each key in the key field on the keyboard. A portion of the encoder electronics, in which the program relating the keyboard to the electronic data processing device is encoded, is located within the keyboard plug and not within the keyboard itself.

Abstract: A computer system shares memory between multiple processors by dividing the memory into a plurality of sections, subsections, and banks, and by providing a memory path between each processor and each section of memory. Each processor may generate references to the memory from any one of four ports, which are multiplexed to the memory paths and onto the sections of memory. The system provides that each processor has an associated register in each subsection of memory and that each processor can make no more than one reference to a subsection at a time. Reference conflict resolution means are provided at the processor level to arbitrate conflicts between ports in the processors attempting to reference the same section or subsection in the memory. Reference conflict resolution means are provided at the subsection level of the memory to arbitrate conflicts between different processors attempting to reference the same banks of memory.

Abstract: The method allows for the loading of operating systems between computers over a network, thereby drastically decreasing the amount of time required to download an operating system or update an operating system. A root directory is created and a subset of the operating system is loaded into the memory of the computer which is to receive the operating system, thereby eliminating the need to access or use the disk during the operating system download process. The subset of the operating system contains the basic commands for file creation and manipulation, directory creation and network communication. The computer system is then started using the subset of the operating system located in memory and connected to the network. Once the computer is connected to the network, the files comprising the operating system to be downloaded are copied and transferred from a remote computer over the network and stored on the disk drive of the receiving computer.

Abstract: A microcomputer system comprising a central processor unit, communication apparatus having a first memory to store receipt data, data transfer controller to transfer the receipt data stored in the first memory, a second memory, and counting apparatus, wherein the receipt data consists of at least one unit information item, and the counting apparatus is caused to count up in accordance with a number of the unit information items.

Abstract: An improved system for interconnecting main storage units is provided wherein each main storage unit is provided with a support control card and each support control card is provided with interface connection means comprising X-1 number of interfaces where X is a value equal to the number of MSUs. And means for enabling the connection of the interfaces between different pairs of MSUs to operably connect any number of said X number of MSUs to a plurality of data processors employing X(X-1)/2 pairs of cables.

Abstract: Power may be conserved and battery life may be extended in a microprocessor controlled device by providing two microprocessors, one of which is a low power, low performance low speed processor for performing background tasks, the other of which is a high power, high performance, high speed processor for performing computationally intensive foreground tasks. The low speed processor activates the high speed processor when a high performance task is to be performed. When activating the high performance processor, the low performance processor also controls the device's power supply to provide high voltage to the high speed processor. The high speed processor may run at variable clock speeds, with power consumption of the processor increasing with increasing speed. The high speed processor selects its own clock speed based upon the task to be performed, by including a clock speed in each software subroutine which controls a task.

Abstract: Interprocessor message communication and synchronization apparatus and method for a plurality of processors connected to a system bus. The message communication photocol involves utilizing an array of mailbox locations associated with the processors, respectively, and located in common memory accessible to all of the processors. A processor desiring to send a message to another processor inserts the message into its mailbox along with the address of the other processor. The sending processor interrupts the receiving processor which, in response to the interrupt, scans the mailboxes to find the mailbox with its address therein thereby receiving the message. The interrupt is effected by the sending processor broadcasting an input/output write instruction on the system bus along with the address of the receiving processor and a data field representative of the interrupt to be transmitted.

Abstract: A microcomputer in which a higher address must be corrected according to a carry or borrow signal generated during address computation for memory reference based on each addressing mode. The microcomputer is provided with a databank register for holding the higher address and a temporary register for storing a value obtained by incrementing or decrementing by one digit the contents of the data bank register so that the higher order address may be corrected with neither increase in the number of instruction executing cycles nor loss of the memory area continuity.

Abstract: A method of monitoring patient data generates an optimal overview. The patient data is sensed by appropriate sensors and displayed as parameter values assigned to individual organ systems. A data field contains a plurality of parameter values and overview graphic images referring to organ systems are formed from this data field with the aid of a network switch and are displayed in response to a retrieval command.