Abstract: Various embodiments described herein provide for a memory sub-system read operation or a memory sub-system write operation that can be requested by a host system and involves performing a multi-level (e.g., two-level) pointer dereferencing internally within the memory sub-system. Such embodiments can at least reduce the number of read operations that a host system sends to a memory sub-system to perform a multi-level dereferencing operation.

Abstract: A memory request, including an address, is accessed. The memory request also specifies a type of an operation (e.g., a read or write) associated with an instance (e.g., a block) of data. A group of caches is selected using a bit or bits in the address. A first hash of the address is performed to select a cache in the group. A second hash of the address is performed to select a set of cache lines in the cache. Unless the operation results in a cache miss, the memory request is processed at the selected cache. When there is a cache miss, a third hash of the address is performed to select a memory controller, and a fourth hash of the address is performed to select a bank group and a bank in memory.

Abstract: A method for operating a multi-transaction memory system, the method includes: storing Logical Block Address (LBA) information changed in response to a request from a host and a transaction identification (ID) of the request into one page of a memory block; and performing a transaction commit in response to a transaction commit request including the transaction ID from the host, wherein the performing of the transaction commit includes: changing a valid block bitmap in a controller of the multi-transaction memory system based on the LBA information.

Abstract: Data of a vector storage request pertaining to one or more disjoint, non-adjacent, and/or non-contiguous logical identifier ranges are stored contiguously within a log on a non-volatile storage medium. A request consolidation module modifies one or more sub-requests of the vector storage request in response to other, cached storage requests. Data of an atomic vector storage request may comprise persistent indicators, such as persistent metadata flags, to identify data pertaining to incomplete atomic storage requests. A restart recovery module identifies and excludes data of incomplete atomic operations.

Abstract: A data storage device includes a memory device and a memory controller. The memory device includes multiple memory blocks. The memory controller determines whether execution of a garbage collection procedure is required according to a number of spare memory blocks. When the execution of the garbage collection procedure is required, the memory controller determines an execution period according to a latest editing status of a plurality of open memory blocks; starts the execution of the garbage collection procedure so as to perform at least a portion of the garbage collection procedure in the execution period; and suspends the execution of the garbage collection procedure when the execution period has expired but the garbage collection procedure is not finished. The memory controller further determines a time interval for continuing the execution of the garbage collection procedure later according to the latest editing status of the open memory blocks.

Abstract: Storage space is reclaimed by cleaning and compacting data objects where data objects are stored by immutable storage. A storage area of which space needs to be reclaimed is identified. Active and stale data objects stored in a storage area are identified, and only active data objects are transferred to a shadow storage area from the storage area when recovering storage space. I/O operations can be fulfilled from the storage area and the shadow storage area. Compaction requests and I/O requests are throttled according to QOS parameters. Recovery of storage space does not cause a failure to meet performance requirements for any storage volume.

Abstract: Technologies are described to perform workload based device access. An input-output (IO) request received from an application. An application profile for the application is determined. Based on the application profile, one or more IO parameter values to access a device are set. The device is accessed based on the one or more IO parameter values to fulfill the IO request.

Abstract: Techniques for processing data may include: receiving source physical storage allocation units that include valid data and one or more holes of unused physical storage, wherein each source physical storage allocation unit has an associated timestamp denoting a most recent destaging time of any data stored on the source physical storage allocation unit; determining an age for each source physical allocation unit based on the associated timestamp of the source physical allocation unit; for each source physical storage allocation unit, determining one of multiple age buckets for the source physical allocation unit based on the age of the source physical allocation unit; and for a first of the age buckets including two source physical allocation units, performing first processing including: relocating at least some valid data from the two source physical storage allocation units to a target physical storage allocation unit.

Abstract: Data protection using change-based measurements in block-based backup is disclosed. Block change information indicating an extent of change associated with a volume may be determined. The block change information may be based at least in part on stored information indicating monitored changes to blocks in the volume. A backup operation may be initiated based at least in part on the determined block change information.

Abstract: Examples may include techniques to enable cache coherency of objects in a distributed shared memory (DSM) system, even where multiple nodes in the system manage the objects. Node memory space includes a tracking address space (TAS) where lines in the TAS correspond to objects in the (DSM). Access to the objects and the TAS is managed by a host fabric interface (HFI) caching agent in HFI of a node.

Abstract: In one embodiment, a flash sharing controller is to enable a plurality of components of a platform to share a flash memory. The flash sharing controller may include: a flash sharing class layer including a configuration controller to configure the plurality of components to be flash master devices and configure a flash sharing slave device for the flash memory; and a physical layer coupled to the flash sharing class layer to communicate with the plurality of components via a bus. Other embodiments are described and claimed.

Abstract: A system architecture is provided and includes an on-chip coherency unit, a processing unit, an accelerator and dedicated wiring. The processing unit is communicative with the on-chip coherency unit via a first interface. The accelerator is communicative with the on-chip coherency unit via a second interface. The accelerator is configured to be receptive of a request to execute lossless data compression or decompression from the processing unit and to responsively execute the lossless data compression or decompression faster than the processing unit. The processing unit and the accelerator are directly communicative by way of the dedicated wiring.

Abstract: Techniques manage a storage device. Such techniques involve: in response to receiving an I/O request for a storage device comprising a plurality of disks, determining, from the plurality of disks, at least one disk related to the I/O request; allocating, to each of the at least one disk, at least one access credit for completing the I/O request from total access credits of the disk, wherein the total access credits are associated with at least one of a type of the disk, a type of the I/O request and performance of the disk; and in response to respective access credits being allocated to the at least one disk, performing access requested by the I/O request to each of the at least one disk. Such techniques can effectively improve the overall access performance of the storage device.

Abstract: A memory system includes a memory device including memory blocks and a memory controller configured to control the memory device. The memory device stores a firmware which includes binaries, and the binaries include a first binary and a second binary. The memory controller loads the firmware to a first region in a working memory, loads the first binary to a second region which is included in the first region, and loads the second binary to a third region which is included in the first region and is different from the second region. The memory controller stores information on an entry function corresponding to a target function included in the second binary, in a fourth region which is different from the first region. A start address of the second region is determined as a fixed value, and a start address of the third region is dynamically determined.

Abstract: According to one general aspect, an apparatus may include a processor configured to issue a first request for a piece of data from a cache memory and a second request for the piece of data from a system memory. The apparatus may include the cache memory configured to temporarily store a subset of data. The apparatus may include a memory interconnect. The a memory interconnect may be configured to receive the second request for the piece of data from the system memory. The a memory interconnect may be configured to determine if the piece of memory is stored in the cache memory. The a memory interconnect may be configured to, if the piece of memory is determined to be stored in the cache memory, cancel the second request for the piece of data from the system memory.

Abstract: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to operate in at least one of a storage mode, a memory mode or a combination of the storage mode or the memory mode based on the one or more configuration commands. Other examples are described and claimed.

Abstract: A list of a first type of tracks in a cache is generated. A list of a second type of tracks in the cache is generated, wherein I/O operations are completed relatively faster to the first type of tracks than to the second type of tracks. A determination is made as to whether to demote a track from the list of the first type of tracks or from the list of the second type of tracks.

Abstract: According to one embodiment, a memory system manages a plurality of parallel units each including blocks belonging to different nonvolatile memory dies. When receiving from a host a write request designating a third address to identify first data to be written, the memory system selects one block from undefective blocks included in one parallel unit as a write destination block by referring to defect information, determines a write destination location in the selected block, and writes the first data to the write destination location. The memory system notifies the host of a first physical address indicative of both of the selected block and the write destination location, and the third address.

Abstract: Examples of the present disclosure describe systems and methods for sharing memory using a multi-ring shared, traversable and dynamic database. In aspects, the database may be synchronized and shared between multiple processes and/or operation mode protection rings of a system. The database may also be persisted to enable the management of information between hardware reboots and application sessions. The information stored in the database may be view independent, traversable, and resizable from various component views of the database. In some aspects, an event processor is additionally described. The event processor may use the database to allocate memory chunks of a shared heap to components/processes in one or more protection modes of the operating system.

Abstract: Deploying client-specific applications in a storage system utilizing redundant system resources, including: identifying a redundant controller in the storage system, wherein the storage system includes at least a first controller and the redundant controller; and executing one or more applications on the redundant controller, wherein the one or more applications are executed in a container.