Abstract: Examples herein describe a peripheral I/O device with a hybrid gateway that permits the device to have both I/O and coherent domains. That is, the I/O device can benefit from a traditional I/O model where the I/O device driver manages some of the compute resources in the I/O device as well as the benefits of adding other compute resources in the I/O device to the same coherent domain used by the hardware in the host computing system. As result, the compute resources in the coherent domain of the peripheral I/O device can communicate with the host in a similar manner as, e.g., CPU-to-CPU communication in the host. At the same time, the compute resources in the I/O domain can benefit from the advantages of the traditional I/O device model which provides efficiencies when doing large memory transfers between the host and the I/O device (e.g., DMA).

Abstract: Described is a process for optimizing energy utilization in a computer processing device, including sampling energy and power measurements for given hardware components, storing the energy and power measurements, computing metrics for a sample based on current power consumption and current power limits, comparing the current sample metrics against a metric threshold, classifying the current sample based on the comparison, assigning a classification type based on the classifying the current sample, determining if an actual number of a computational intensity characteristic exceeds a maximum allowed reference number in a sample window for the classification type, if the actual number of a computational intensity characteristic exceeds the maximum for the classification type, computing a new maximum allowed for the classification type, and constraining the hardware components to the new maximum energy and power measurements.

Abstract: Systems and methods for configuration of computer peripherals are described. In one embodiment, the systems and methods may include detecting the storage device being connected to a host machine; determining whether the host machine supports human interface device (HID) service; and upon determining the host machine supports the HID service, bypassing installation of a driver and using a HID protocol to establish an interface between the storage device and the host machine.

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to transition devices between operational modes. An example apparatus comprising: an activity detector configured to be coupled to a communication bus; a communication bus controller coupled to the activity detector; a hardware wakeup controller coupled to the activity detector; a switching circuit coupled to the hardware wakeup controller; a first oscillator coupled to the switching circuit; and a second oscillator the second oscillator coupled to the switching circuit and the hardware wakeup controller.

Abstract: A system of automation components, having a control unit, having a memory area which includes a parameter data record, and a key memory, which is able to be connected to the control unit via an unambiguously allocatable, electrically conductive connection. The key memory is location-bound, in particular able to be spatially fixedly allocatable to a specific point in a system as a whole, the key memory having at least one non-volatile memory area, including an unambiguous item of identifying information. The control unit is able to read out the identifying information. The system also includes an external data memory, which is able to be directly accessed, and data is able to be exchanged between the control unit and the external data memory.

Abstract: Described herein is a method for asset tracking using an asset tracking device. The method comprises detecting a trigger to perform a co-location check; in response to the trigger, determining the asset tracking device is co-located with a carrier en route to a destination; determining a low power duration; and causing the asset tracking device to enter a low power mode for the low power duration.

Abstract: An aspect includes receiving a request to boot a software image on a machine including a plurality of processing units having different characteristics. A processing unit subtype identifier is extracted from a license record for the machine. The processing unit subtype identifier includes a software image type and an allocation of the processing units of the processing unit subtype. A processing unit capability of the machine is queried. The software image is enabled with the allocation of the processing units based on verifying that a software image identifier of the software image matches the software image type from the processing unit subtype identifier, and the processing unit capability of the machine meets the allocation of the processing units from the processing unit subtype.

Abstract: A framework for system power control of a dual-port non-volatile memory storage device is provided. The electronic system includes a storage device, two hosts and a control circuit within each of the two hosts. Each host filters signals for shortly turning off a power supply of the storage device during a process of boot and reboot of the host. When one of the hosts enters a turn-off state, it is detected whether another one of the hosts is running, and the one of the hosts does not control the power supply if the another one of the hosts is running. Two control signals of the two hosts control the power supply of the storage device through an AND gate.

Abstract: Systems, methods, and devices can include a first die comprising a first arbitration and multiplexing logic, a first protocol stack associated with a first interconnect protocol, and a second protocol stack associated with a second interconnect protocol. A second die comprising a second arbitration and multiplexing logic. A multilane link connects the first die to the second die. The second arbitration and multiplexing logic can send a request to the first arbitration and multiplexing logic to change a first virtual link state associated with the first protocol stack. The first arbitration and multiplexing logic can receive, from across the multilane link, the request from the first die indicating a request to change the first virtual link state; determine that the first interconnect protocol is ready to change a physical link state; and change the first virtual link state according to the received request while maintaining a second virtual link state.

Abstract: A computing device includes an accessory containing an option ROM, a first processor adapted to boot the computing device and to execute the option ROM, and a second processor adapted to be activated by the first processor to monitor execution of the option ROM by the first processor. The second processor is adapted to restore the first processor to a state prior to execution of the option ROM in response to the first processor becoming hung during execution of the option ROM. A computer program product includes program instructions executable by a processor to monitor execution of the option ROM by a first processor of a computing device, determine whether the first processor has become hung during execution of the option ROM, and restore the first processor to an execution environment that the first processor had prior to execution of the option ROM.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for gathering configuration information of a computer system during a system management mode of the computer system and exposing the gathered configuration information to securely attest to the configuration of the system.

Abstract: In one example, a mixed signaling socket includes a set of central processing unit (CPU) cores coupled via an inter-core link and a set of analog circuits having an analog input, each analog circuit coupled to a respective CPU core via a separate private bus. A field programmable gate array (FPGA) control circuit is coupled to the inter-core link and the set of analog circuits to provide predicable clock timing to the set of analog circuits and control signals to the set of CPU cores. An analog to digital module in at least one CPU core includes instructions to perform an analog to digital conversion to create a digital representation of the analog input using the predictable clock timing and control signals from the FPGA.

Abstract: A method for executing a security stack can include executing a bootloader included in a memory resource of an electronic device in response to the bootloader receiving a prompt. The method can include performing a verification function, with the bootloader, on data stored in a programmable memory included in the memory resource of the electronic device, wherein the verification function includes comparing security data stored in a configuration area of the memory resource with a signature that accompanies the data stored in the programmable memory. The method can include determining whether the security data stored in the configuration area matches the signature that accompanies the data stored in the programmable memory.

Abstract: An electronic unit includes a USB host and a USB device. After the USB host and the USB device are connected to each other by a USB cable, a signal requesting for a connection permission is transmitted from the USB device to the USB host, and the USB host determines whether to permit a connection based on the signal. The electronic unit further includes a power supply configured to supply power to the USB device, and an additional GND pattern different from a GND pattern of the USB cable is electrically connected to a GND of the USB port of at least one of the USB host and the USB device. An area of the additional GND pattern is 2000 mm2 or more.

Abstract: A bus control circuit configured to transfer access commands for performing exclusive access between a first bus specification and a second bus specification by converting from a first exclusive access command applying to the first bus specification which deals with exclusive access, into a second exclusive access command of the second bus specification which doesn't deal with the exclusive access.

Abstract: Embodiments of the present disclosure disclose a method and an apparatus for responding to a touch operation, a storage medium and a terminal. The method includes: when a plurality of touch points are detected on a touch screen of a terminal, determining whether the terminal is in a charging mode currently; when the terminal is in the charging mode, determining a trip point from the plurality of touch points; and preventing the trip point from being responsive and allowing touch points other than the trip point in the plurality of touch points to be responsive.

Abstract: A data transmission apparatus that transmits transmission data from a first memory to a second memory through a communication channel, the first memory storing data in units of a first data block of a first data size, and the communication channel having a width of a second data size, includes: a storage that stores the transmission data read from the first memory; and a transmission controller that transmits the transmission data stored in the storage from the first memory to the second memory in units of an integral multiple of the second data size, such that data transmission from the first memory to the second memory is efficiently performed.

Abstract: In one embodiment, power level management in accordance with the present description, is provided in a storage unit having both a disk storage drive, and another non-volatile, non-disk memory or storage such as a solid state drive, for storing metadata. The metadata storage provides direct access to the metadata stored in the non-disk storage even though the disk storage drive may be in a low power mode in which the data storage media disk of the disk storage drive is stopped or spinning at a reduced rate of rotation. As a result, power consumption and cooling requirements associated with disk storage drives, may be reduced in a low power level mode of storage unit operation for input/output operations limited to metadata stored in the metadata storage. Other features and aspects may be realized, depending upon the particular application.

Abstract: A docking board removably coupled to a processor board that does not function when not operatively coupled to the docking board. The docking board sends power to and receive a control signal from the processor board when operatively coupled to the processor board and does not send power and does not receive a control signal when not operatively coupled to the processor board. The docking board is removably coupled to an expansion board that performs a computer function that is not performed by the processor board and the docking board. The docking board sends power and a control signal to the expansion board when the docking board is operatively coupled to the processor board and the expansion board, and does not send power and does not send a control signal to the expansion board when the docking board is not operatively coupled to the processor board and the expansion board.

Abstract: In an example, a method includes, in initialising an operations support system providing a common access point to a plurality of data services, accessing a list of modules, each module relating to at least one of the plurality of data services to be accessed via the common access point. A list of at least one processed modules data file may also be accessed, wherein each processed modules data file comprises bundled modules. The processed modules data files may be requested and a first module from the list of modules which is not part of a processed modules data file may be identified. At least one processed modules data file and the first module may be loaded to provide the operations support system.