Abstract: A process, voltage, and temperature calibration system that shares a single calibration resistor among multiple calibration circuits. The use of single calibration resistor among several calibration circuits is accomplished through time division multiplexing. N-channel and P-channel field effect transistor calibration also share the same resistor. Turning on transistors in calibration circuits of the type not being calibrated creates a low impedance path from one terminal of the calibration resistor to a power supply. This biases the calibration resistor for the calibration circuit.

Abstract: An electrode component group for a corrosion measuring system for detecting corrosion of a metal embedded in a construction component of ion-conducting material has a rod-shaped base body having a first flange member at a first end of base body and a second flange member at a second end of base body. The base body is insertable into the construction component with the first end leading. A plurality of spacer rings is positioned on the base body between the first and second flange members. The metal electrode rings and sealing rings are arranged alternatingly between the spacer rings. Each one of the metal electrode rings have an electrical line connected to a measuring circuit external to the construction component. The electrical lines are guided inside the metal electrode rings to the second end of the base body. A device for reducing a spacing between the first and second flange members is provided.

Abstract: A detector circuit for automatic test equipment samples and tests differential signals. The detector circuit includes a pair of impedances connected in series between first and second legs of a differential input signal. A signal is formed at the junction of the two impedances that equals the common mode voltage of the differential signal. The common mode signal is coupled to the input of a window comparator, which compares the common mode signal with predetermined thresholds. The window comparator generates an output indicative of whether the common mode signal is above, within, or below the predetermined thresholds. Using this approach, the detector circuit can detect errors in differential signals caused by mismatched amplitudes or by timing skew between the first and second input signals. According to one feature, the detector circuit also includes a differential mode detector that receives the first and second input signals.

Abstract: An ignition secondary sensor is provided which is disposed in a high voltage path between an ignition coil and a spark plug for use with a detecting circuit for detecting ignition current and ion current flowing through a spark plug. The sensor comprises an ignition path connected in series with the high voltage path and having a pair of reverse current preventing diodes and a detection path connected to a spark plug side end portion of the ignition path and having a pair of current detecting diodes. A path portion of the detection path on the side of the current detecting diodes opposite to the ignition path and a path portion of the ignition path connecting between the reverse current preventing diodes are capacitively coupled. The detecting circuit is connected to the sensor for detecting the ignition current (ignition timing) on the basis of current flowing into the sensor therefrom and the ion current (combustion timing) on the basis of current flowing from the sensor thereinto.

Abstract: During the development of process parameters for fabricating an integrated circuit, a test circuit is provided on the wafer that provides rapid identification of process problems (i.e., before failure analysis), detects defects down to a part-per-million (PPM) level, and identifies the precise location of any defects, thereby facilitating rapid failure analysis during the development and refinement of IC fabrication processes used to fabricate an integrated circuit (IC). In a first embodiment, the test circuit includes parallel conductive paths that are selectively connected to a signal source by pass transistors. Open circuits are identified by sequentially connecting one end of the conductive paths to the signal source and measuring the current at the other end. In a second embodiment, the test circuit includes perpendicular sets of overlapping conductors. Short conductive segments extend in parallel with a first set of conductors that are electrically connected to a second set of conductors.

Abstract: A semiconductor device evaluation apparatus is provided with a test board. A print wiring is provided at a first surface of the test board on which a semiconductor device is mounted. A terminal of the semiconductor device is connected to the print wiring. A power circuit is provided at a second surface opposite to the first surface of the test board. The power circuit is connected to the print wiring and actuates the semiconductor device. The apparatus is also provided with a magnetic field detector arranged above the print wiring and detects a magnetic field generated from the print wiring. Further, the apparatus is provided with a current detector detecting a value of current carried through the print wiring based on the magnitude of the magnetic field detected by the magnetic field detector.

Abstract: A two-dimensional sensor includes a photoconductive layer whose conductivity increases at a light-irradiated spot, an insulating layer formed on the front surface of the photoconductive layer, an effect electrode formed on the back surface of the photoconductive layer, and a fence as a cell holder attached to the surface of the insulating layer for containing a cell, culture medium and a reference electrode. The sensor is placed in an incubator and a bias voltage is applied between the effect and reference electrodes. When a laser beam irradiates a spot of the back surface of the sensor, a signal is obtained from the effect electrode. This signal corresponds to a potential alteration due to the cell activity substantially at the laser-irradiated spot. The signal is processed in a computer. The beam spot size and location, corresponding to the size and the location of the measurement electrode, can be changed or adjusted easily by focusing or moving the laser beam.

Abstract: The method obtains a first C-V curve prior to irradiation with light and a second C-V curve after the irradiation with light. The method determines the amount of the intra-film impurity ions in an insulating film in the state prior to the irradiation with light, based on the first and the second C-V curves.

Abstract: A capacitive sensor for measuring characteristics of liquid or gaseous media has at least two outer carrier boards and a spacer plate that keeps the two outer boards at an exact dimensionally stable spacing from each other. A sensor capacitor is formed by a hollow space in the spacer plate flanked by two metal coatings forming capacitor plates on the inwardly facing surfaces of the outer boards. Two or more capacitors can be formed by stacking the desired number of boards and spacer plates. Ports are provided for the medium to flow into the hollow space or spaces preferably in the spacer plates. Further ports for pressure equalization inside and outside the sensor are formed either laterally in spacer plate margins or directly in the outer boards.

Abstract: The method and structure of a moisture measuring device that creates an electric field and then determines a moisture content of a specimen based on the effect the moisture of the specimen has on the electric field.

Abstract: There are provided a frequency analysis method permitting a frequency analysis to be performed at a high rate and a sweep type spectrum analyzer using such frequency analysis method.

Abstract: A semiconductor test system having a high repetition rate and small jitter clock generator for supplying the clock signal to a device under test (DUT). The semiconductor test system includes a clock generator for generating a reference clock signal, a frame processor for producing a clock signal of predetermined waveform based on the reference clock signal from the clock generator, a phase lock loop (PLL) circuit for generating a clock signal based on the clock signal from the frame processor where the frequency generated by the PLL circuit is higher than that of the clock signal from the frame processor, and a driver for directly receiving the clock signal from the PLL circuit to apply the clock signal to the DUT with a predetermined amplitude.

Abstract: Apparatus and method to detect corrosion in metal junctions. Corroded metal junctions are usually discovered by visual inspection. The present invention detects corrosion in metal junctions when it is not visually apparent. A corroded metal junction acts as a nonlinear device. It generates harmonics and other nonlinear products (such as intermodulation) of any signals applied to the junction. The presence of relatively high level harmonics and/or intermodulation products indicates directly that corrosion has occurred. To detect corrosion in a metal junction, one couples a fundamental frequency signal (f0) into the junction and tests for harmonics of that frequency, especially the third harmonic. Harmonic frequency signals that are relatively large (i.e., above the harmonics generated by the testing system) indicate the presence of corrosion. Measurements to determine if a metal junction is corroded are performed without disturbing the junction.

Abstract: A prober device is disclosed herein for making and maintaining a plurality of discrete electrical connections with an object having a plurality of conductive pads. The prober device includes an insulating substrate having a linear expansion coefficient that is less than or equal to about five times a linear expansion coefficient of the test object and a plurality of conductive probes attached thereto and having a pitch l that is substantially the same as or slightly smaller than a pitch l′ of the conductive pads. When mating the prober device to the object, the prober device is heated to compensate for a difference in the pitches of the conductive pads and of the probes. Correct positioning is permitted as a result of the difference between the linear expansion coefficients of the prober device and the test object.

Abstract: A test device (1) for testing a module (2) for a data carrier intended for contactless communication includes a carrier signal generator (14) which is arranged to generate a carrier signal (CS) whereby a test signal (TS) can be generated, a conductive connection being provided between the carrier signal generator (14) and a module (2) to be tested, which connection includes an impedance (31), preferably being a series resistor (31), which is connected directly ahead of a module terminal (5) of the module (2) to be tested, the test device (1) being provided with at least one detection device (34, 35) for determining an analog characteristic value (C, m) of a module (2) to be tested while utilizing the test signal (TS) appearing on an impedance terminal (32) of the impedance (31).

Abstract: Device for emission-reception of a stream of electromagnetic waves, in which an emission unit (1) and a reception unit (2) are each supplied with light energy passing through an optical guide (13). This light may be stopped by an optical gate (19). Otherwise, it reaches a micro-laser (4) that illuminates a photo-conducting sheet (5) on which an antenna (3) is located. The portions (6, 7) of the emitter antenna (3) at different potentials are then short circuited and a stream of electromagnetic waves is emitted. The wave stream passes through a medium to be studied and is returned to the receiving unit (2) in which it is sampled, recorded and analyzed to determine the composition of the medium through which it had passed. The wave stream has a wide frequency band and the opto-electronic device can be used to make a very compact system.

Abstract: An integrated circuit sample package is provided for checking electrical functionality and alignment of a checking device. The checking device includes a contactor and equipment for checking mechanical and electrical features of at least one integrated circuit device. The integrated circuit sample package substantially reproduces the external envelope of the integrated circuit device and is manufactured from an electrical conducting material that is resistant to mechanical wear. In one preferred embodiment, the integrated circuit sample package includes a body that substantially reproduces the external envelope of the body of the integrated circuit device, and offshoots that substantially reproduce the external envelope of the terminals of the integrated circuit device. A method for checking electrical functionality and alignment of a checking device is also provided.

Abstract: An IC card system has, at least, an IC card having a first set of terminals and an external unit having a second set of terminals. The IC card has a detector for detecting a contact condition between the first and second sets of terminals, a controller, and an internal circuit such as an EEPROM. If the detector determines that the contact condition is faulty, the controller completes a given process, and then, stops the operation of the internal circuit. If an access operation to the internal circuit is in progress when the detector finds contact fault, the controller does not stop immediately and continues to complete the access operation, to prevent the writing or reading of erroneous data. The present invention also provides an IC card for the IC card system and a semiconductor IC incorporated in the IC card.

Abstract: A digital-to-analog converter 41, capable of setting a voltage V41 of an offset value using information JS. At the time of an offset correction operation, the voltage V41 of the offset signal is sequentially varied to automatically set it to a value that is extremely close to a lower executable conversion limit Vbottom within the convertible range of the analog-to-digital converter. With this structure it is possible to provide a sensor circuit that is capable of preventing lowered precision with temperature variations.

Abstract: A hand-operated test head positioner for positioning the test head of a semiconductor device testing apparatus is provided which is easy to operate, highly safe in operation, and yet inexpensive. Two air cylinders are installed one at each of two opposed positions of the test head. The sum of driving forces of these air cylinders is set at a level approximately equivalent to the weight of the test head to act as a counterbalancer. Hand-operated jack mechanisms are disposed on the opposite side walls of the test head, respectively. The jack mechanisms comprise long lead screws rotatably supported, two movable screw members in threaded engagement with the respective lead screws, drive arms pivotally connected at one ends to the respective movable screw members, and driven arms having approximately the same shape and size as the drive arms and being pivotally connected to the respective drive arms, respectively.