Patents Examined by Glenn W. Brown
  • Patent number: 6252391
    Abstract: A high frequency probe is presented. The probe comprises a probe body having a coaxial resilient double ended probe element attached thereto by an adaptor. A locking pin is attached to the probe adaptor and extends parallel to the probe element, however, it is slightly shorter as the locking pin should not contact any pins of the device being probed. The locking pin serves to hold the probe in place. Alternatively, a high frequency differential probe is presented. The high frequency differential probe comprises a base having a first pair of opposing spring steel plates and a second adjacent pair of opposing spring steel plates connected thereto. The first pair of spring plates are also connected to a first probe adaptor and the second pair of spring plates are also connected to a second probe adaptor. A first probe body is mounted at an angle to the first adaptor and a second probe body is mounted at an angle to the second adaptor.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: June 26, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael F. McAllister, Klaus K. Kempter, Charles F. Pells, Stephan R. Richter, Gerhard Ruehle
  • Patent number: 6252388
    Abstract: A voltage sensor for measuring the voltage on high voltage lines is formed by an electrically isolating section of dielectric material that structures the electric field generated by a voltage difference between the two ends of the isolating section and provides screening of the electric field from other electric field sources external to the isolating section. At least one electric field sensor is provided to sense the electric field in the isolating section the output(s) of which are weighted and combined to provide an accurate measurement of the voltage between the two ends. The electric field sensors are located and their outputs are combined so that error in the voltage measurement due to the influence of external electric field sources is within an acceptable range.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: June 26, 2001
    Assignee: NxtPhase Corporation
    Inventors: Nicolas August Fleming Jaeger, Farnoosh Rahmatian, Patrick Pablo Chavez, Sudhakar Ellapragada Cherukupalli, Gregory Samuel Polovick
  • Patent number: 6252392
    Abstract: A probe station for probing a test device has a chuck assembly substantially enclosed by an environment control enclosure and laterally movable relative to such enclosure. The environment control enclosure includes a flexible wall assembly interconnected with the chuck assembly to enable such lateral movement thereof along mutually perpendicular directions while maintaining the integrity of the enclosure. The flexible wall assembly has flexible pleats formed therein extending along respective different lateral directions to enable such lateral movement.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: June 26, 2001
    Assignee: Cascade Microtech, Inc.
    Inventor: Ron A. Peters
  • Patent number: 6249114
    Abstract: A continuity inspection method and apparatus for continuity inspection of a printed circuit board that has a high-density wiring pattern, or for inspection of semiconductor components that have bump electrodes. The method and apparatus employ inspection probe having multiple contacts capable of making simultaneous contact with a plurality of terminals or bumps, which are disposed in mutual proximity on an electronic component or wiring board.
    Type: Grant
    Filed: August 24, 1998
    Date of Patent: June 19, 2001
    Assignee: NEC Corporation
    Inventor: Hiroshi Sakai
  • Patent number: 6246225
    Abstract: A self-contained unit intended primarily for tracing the circuit connection between an electrical outlet or lighting receptacle and its corresponding circuit-breaker. The preferred embodiment includes a housing, a male two prong electrical plug, and a sound-producing means. A second embodiment includes a male three prong electrical plug. A third embodiment incorporates a momentary switch which permits testing of a ground fault interrupt across either a hot wire and a neutral, or across a hot wire and the ground. Adapters are used to temporarily adapt bare wires or a lighting receptacle to a female plug so that the device may be used.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: June 12, 2001
    Inventor: John S. Schaefer
  • Patent number: 6246243
    Abstract: A programmable “semi-fusible” link system is used to trim one or more circuit parameters. Each semi-fusible link, typically a thin film resistor, has “intact” and “blown” states, with the link having a first, non-zero resistance when intact, and a second, higher but finite resistance when blown, which is accomplished by forcing a predetermined current through the link. Each link is connected to a respective active devices which, when turned on, provide the current needed to blow the link. The links are also connected in series with respective current sources, and to respective threshold detectors connected to monitor the current through their respective links. Each threshold detector provides a logic output which indicates whether its link is intact or blown based on the magnitude of the link current. A “disable” circuit may also be included which, when activated, prevents the further programming of any of the circuit's semi-fusible links.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: June 12, 2001
    Assignee: Analog Devices, Inc.
    Inventor: Jonathan Audy
  • Patent number: 6246244
    Abstract: A method for measuring axial deviation in a taut-wire alignment system (1) that includes a dynamically grounded resistive wire (2) extending along a longitudinal reference axis and adjacent to elements to be aligned (3). The method comprises applying an AC voltage signal to a measurement electrode provided with a reference electrode, the measurement electrode being arranged in a measurement plane in a holder attached to an element to be aligned (3); carrying out a measurement using a capacitive bridge that includes a first capacitor consisting of the measurement electrode and the wire, as well as a second capacitor, in order to provide a measurement signal representing an axial position of the measurement electrode relative to the taut wire (2) ; and processing the measurement signal to provide data indicating the axial deviation between the element to be aligned (3, 7) and a predetermined alignment position. The method is particularly suitable for aligning elements in linear colliders.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: June 12, 2001
    Assignee: Nanotec Solution
    Inventors: Patrick Leteurtre, Frédéric Ossart
  • Patent number: 6246247
    Abstract: A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly thereto (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereof, and an interposer disposed between the space transformer and the probe card. The space transformer and interposer are “stacked up” so that the orientation of the space transformer, hence the orientation of the tips of the probe elements, can be adjusted without changing the orientation of the probe card. Suitable mechanisms for adjusting the orientation of the space transformer, and for determining what adjustments to make, are disclosed.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: June 12, 2001
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: 6242928
    Abstract: The resistance of an air-fuel-ratio sensor element is determined from current detected before changing an applied voltage to the sensor and current detected when a predetermined period elapses after changing the applied voltage to the sensor. A resistance detector includes operational amplifiers, resistors and transistors. The applied voltage is changed by switching the transistors to more accurately detect a resistance value.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: June 5, 2001
    Assignee: Denso Corporation
    Inventor: Takayoshi Honda
  • Patent number: 6242927
    Abstract: A method and apparatus for measuring at least one parameter of material are disclosed herein. The method includes generating multiple frequency signals having frequencies selectable by control signals, combining the multiple frequency signals into a combined frequency signal having multiple frequency components, and applying the combined frequency signal as an excitation signal to a sensing element. The frequency response of the material is determined at each of the multiple frequencies using output signals from the sensing element, and a frequency analysis is performed to determine the parameters of the material. The sensing element may include a capaciflector sensor located non-intrusively along the surface of a conveyor. However, other sensing elements such as capacitive, resistive and inductive elements may be used. The parameters being measured may include mass flow rate and moisture content.
    Type: Grant
    Filed: February 23, 1998
    Date of Patent: June 5, 2001
    Assignee: Case Corporation
    Inventors: Brian T. Adams, Thomas Karlmann, George H. Hale, William L. Schubert
  • Patent number: 6242931
    Abstract: An interconnect for testing semiconductor components includes a thinned substrate, and first contacts on the substrate for electrically engaging second contacts on the components. The interconnect can be configured for use with a testing apparatus for testing discrete components such as dice or chip scale packages, or alternately for use with a testing apparatus for testing wafer sized components, such as wafers, panels and boards. The thinned substrate has a thickness that is substantially less than a thickness of the components being tested. The thinned substrate can flex upon application of a biasing force by the testing apparatus, permitting the first contacts to move in the z-direction to accommodate variations in the planarity of the second contacts. For fabricating the interconnect, the first contacts are formed on the substrate, and then covered with a protective mask.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: June 5, 2001
    Assignee: Micron Technology, Inc.
    Inventors: David R. Hembree, Derek Gochnour
  • Patent number: 6242933
    Abstract: A new probe socket is provided that allows for high speed and dependable contacting of points of contact on the Device Under Test. The new probe socket is aimed at a testing environment where semiconductor devices are mounted on device or package strips.
    Type: Grant
    Filed: October 4, 1999
    Date of Patent: June 5, 2001
    Assignee: ST Assembly Test Services
    Inventor: Liop-Jin Yap
  • Patent number: 6242901
    Abstract: The invention provides a true average, wide dynamic range microwave power sensor using a diode-stack-attenuator diode stack technology. The invention provides a diode stack microwave power sensor which includes an RF signals receiver having wide dynamic power ranges; a low power sensor path connected between the receiver and ground for sensing relatively low power RF input signals. The low power sensor path includes one or more stacked RF diodes in which a number of diode pairs may be coupled to ground through respective capacitors. An impedance network including attenuating resistors R1 and R2 are connected in series between the receiver and ground. A high power sensor path is connected in parallel between the attenuating resistors R1 and R2 and ground for sensing attenuated relatively high power RF input signals.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: June 5, 2001
    Assignee: Agilent Technologies Inc.
    Inventors: John C. Faick, Eric R. Ehlers, Ronald J. Hogan, Jr., Ajay A. Prabhu
  • Patent number: 6242920
    Abstract: A circuit for use in a DMM utilizes an auxiliary A/D converter to measure the battery voltage of the DMM and displays the result on the LCD display screen of the DMM. The user receives a numeric indication of the battery voltage measured, rather than a simple good/bad or bar graph indication. The voltage measured provides the user with a quantitative indication which allows the user to determine how close the battery is to being exhausted. Thus, the user can be made aware of a weakened state of the battery before operation of a backlight further drains the battery to an unacceptably low level.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: June 5, 2001
    Assignee: Tektronix, Inc.
    Inventors: Theodore G. Nelson, James R. Brooks
  • Patent number: 6239588
    Abstract: Magnetic shields for plastic molded electricity meter frames are positioned to substantially block external magnetic fields from adversely affecting operation of meter components. The shield can be utilized with either electromechanical or electronic energy meters. In an electromechanical watthour meter which employs an aluminum disk driven to rotate through a magnetic field produced by a retarding magnet, the meter frame includes an integrally formed retarding magnet shield and an integrally formed bearing shield. The shields are coextensive with the frame, and extend from an inner periphery of the frame toward the retarding magnet and the bearing, respectively. The shields are formed of a magnetically permeable powder, such as a ferrite powder mixed with the plastic material from which the meter frame is molded. The shields divert externally applied fields away from the magnetically sensitive components of the meter without adversely affecting meter accuracy.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: May 29, 2001
    Assignee: General Electric Company
    Inventor: Jerome Johnson Tiemann
  • Patent number: 6239607
    Abstract: A method for operating a data processing system to provide an estimate of the leakage current expected from an integrated circuit having a known test vector applied thereto. The method generates a graph having a first node connected to a terminal maintained at a first power supply potential and a second node connected to a terminal maintained at a second power supply potential, the first and second power supply potentials having a potential difference of VDD. Each edge represents a source-drain connected transistor connected between two nodes as a switch having a resistance that depends on whether the transistor is “on” or “off” when the test signals are present. Each node in the graph is assigned a value of 0 or 1, together with the strength of that value. The assignment process also verifies that the circuit is in a valid static state.
    Type: Grant
    Filed: October 16, 1998
    Date of Patent: May 29, 2001
    Assignee: Agilent Technologies, Inc.
    Inventors: Peter Maxwell, Jeff Rearick
  • Patent number: 6239609
    Abstract: A method for improving the accuracy of quiescent current testing by reducing reliance on absolute quiescent current test limits. Initially, the device under test is placed into a static DC state in a traditional manner. Quiescent current is then measured with the power supply to the device set to a nominal operating voltage. Next, a fixed voltage lower than the nominal power supply voltage is applied to the integrated circuit in order to reduce the quiescent current consumed by the device. An additional quiescent current measurement is taken. The difference in quiescent current between the first and second measurements is then calculated. Additional quiescent current measurement(s) are also taken at increasing lower supply voltages. The differences in quiescent currents between each of these measurements is also calculated. After a sufficient number of measurements have been gathered, the resulting difference values are examined to determine the “linearity” of the quiescent current reduction.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: May 29, 2001
    Assignee: LSI Logic Corporation
    Inventors: Emery O. Sugasawara, Ronnie V. Vasishta, Victer K. Chan
  • Patent number: 6236197
    Abstract: An apparatus for determining loss of reference voltage (indicating possible tampering) in a 2-element electronic meter that includes a processor for determining electrical power from voltage and current signals, and a display for indicating an operating status of the meter. To determine if the reference voltage of the meter in a 3-wire delta or network installation has been lost, a measurement of the phase angle difference between the two phases is made. If the phase difference is equal to a predetermined value, the meter indicates on the display that loss of reference voltage and possible tampering has taken place. The apparatus may further be adapted to determine a length of time that this condition has occurred such that the appropriate enforcement and billing agencies may be informed.
    Type: Grant
    Filed: May 13, 1999
    Date of Patent: May 22, 2001
    Assignee: ABB Power T&D Company Inc.
    Inventors: Scott T. Holdsclaw, Edward J. Beroset
  • Patent number: 6236227
    Abstract: A method for turn fault detection in a multi-phase alternating current machine includes obtaining instantaneous line-to-neutral voltages from each phase of the machine, calculating the sum of the line-to-neutral voltages, and using the sum to determine whether a turn fault exists. The line-to-neutral voltages can be filtered to reduce harmonics. In one embodiment, deviations in a time-averaged function of the sum are examined. The time-averaged function can be exponentially weighted. Each of the line-to-neutral voltages can be calibrated to remove inherent machine phase impedance imbalance prior to calculating the sum of the line-to-neutral voltages.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: May 22, 2001
    Assignee: General Electric Company
    Inventors: Gerald Burt Kliman, Thomas Gerard Habetler, Marcus Alex Cash
  • Patent number: 6236224
    Abstract: Before the integrated circuit is separated from the wafer, a switching element is energized and signals are transmitted between an internal signal line and an external signal line located in a scribe lane of the wafer. When the integrated circuit is diced, the connection between the switching element and the external signal line is interrupted at an interface. After the separation, the switching element is permanently disabled in order to disconnect the internal signal line from the interface.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: May 22, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventor: Helmut Schneider