Patents Examined by Glenn W. Brown
  • Patent number: 6320387
    Abstract: An apparatus for measuring triboelectric charge applied by a material to a flexible member is provided. The apparatus includes a frame and a drum. The drum is used for mounting the member to an external periphery thereof. The drum is rotatably mounted to the frame. The apparatus also includes a mechanism including a motor for rotating the drum, the mechanism operably associated with the drum. The apparatus also includes a support for supporting the material in intimate contact with the flexible member. The material and the member form a triboelectric charge on the external surface of the member. The material includes a material portion thereof in intimate contact with the member at a first member position on an external periphery of the member. The apparatus also includes a charge measuring device operably associated with the drum for measuring an electrical field emanating from the member.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: November 20, 2001
    Assignee: Xerox Corporation
    Inventors: Dennis A. Abramsohn, Lois A. Eckstrom, Diane M. Foley
  • Patent number: 6316929
    Abstract: A frequency measurement test circuit includes a frequency divider, and a detection circuit. The frequency divider frequency-divides an input to be measured. The detection circuit outputs a signal of level set on the basis of a relationship in magnitude between the frequency of the signal frequency-divided by the frequency divider and that of a reference clock signal.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: November 13, 2001
    Assignee: NEC Corporation
    Inventor: Michimasa Yamaguchi
  • Patent number: 6316944
    Abstract: The invention accurately determines propagation delay for a sawtooth pattern. Through measurement, the actual delays added per bend in the sawtooth pattern are determined and the values are then used in a CAD tool. The invention can add a known amount of propagation delay to a wire length by routing net wires close together without using a large amount of board space.
    Type: Grant
    Filed: April 29, 2000
    Date of Patent: November 13, 2001
    Assignee: Hewlett Packard Company
    Inventors: Christopher M. Barnette, Terrel L. Morris, Douglas B. Fail, Marvin D. Ross
  • Patent number: 6316950
    Abstract: Semiconductor devices are imaged using two-photon absorption. The method is similar to conventional optical beam induced imaging except that the light beams used have frequencies (photon energies) insufficient to excite electrons across the semiconductor bandgap. Rather the instantaneous intensity of the lower frequency light is increased, as by using a pulsed laser source, so that electron transitions occur by two-photon absorption predominately in the localized region where the beam is focused. The result is minimal absorption during passage through the substrate and maximal absorption in the component-rich active layer where the beam is focused. This enhances imaging of fine-detail semiconductor devices. Specifically, the quadratic dependence of free carrier generation on the excitation intensity both enhances the resolution and provides a three-dimensional sectioning capability.
    Type: Grant
    Filed: May 15, 1997
    Date of Patent: November 13, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Winfried Denk, Chunhui Xu
  • Patent number: 6313656
    Abstract: A method of testing leakage current at a contact-making point in an integrated circuit includes applying a test potential to the contact-making point through an output of an application device. The output of the application device is connected to a high impedance or is isolated from the contact-making point. The potential at the contact-making point is determined as a measure of the leakage current being produced.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: November 6, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventors: Thilo Schaffroth, Florian Schamberger, Helmut Schneider
  • Patent number: 6313645
    Abstract: In a method and apparatus for determining the volumetric proportion of water in snow and the density of snow, a probe consisting of at least three parallel, but differently spaced, electrical conductors is installed in an area so that the probe is surrounded by the snow, an electromagnetic signal is applied repeatedly to pairs of the conductors for determining different dielectricity coefficients, wherefrom the actual dielectricity coefficient is calculated based on probe-specific calibration data and the measuring steps are repeated with a different frequency for which the dielectricity coefficients of the water and ice are known and the volumetric parts of the snow, that is of the water, ice and air in the snow cover is calculated using the law of mass conservation.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: November 6, 2001
    Assignee: Forschungszenfrum Karlsruhe GmbH
    Inventors: Alexander Brandelik, Christof Hübner
  • Patent number: 6313644
    Abstract: An apparatus for measuring a voltage standing wave ratio of a base station. The apparatus comprises: a unit for measuring the voltage standing wave ratio of a transmitting terminal by coupling an input signal from the base station, and by comparing the difference of the coupled signal and a signal reflected from a transmitting antenna; and another unit for measuring the voltage standing wave ratio of a receiving terminal by comparing an input signal from a base-station test unit with the signal reflected from a receiving terminal.
    Type: Grant
    Filed: July 8, 1998
    Date of Patent: November 6, 2001
    Assignee: LG Information & Communications, Ltd.
    Inventors: Young Min Kim, Bo Jong Kim, Dae Won Kim
  • Patent number: 6313653
    Abstract: An IC chip testing apparatus provided with an IC socket to which an IC chip is brought into electrical contact, a printed circuit board with one terminal which is electrically connected to a terminal of a test head and with another terminal which is electrically connected to a terminal of the IC socket, and a heating element provided at the printed circuit board. The IC chip testing apparatus may be provided with a socket to which an IC chip to be tested is detachably mounted; a socket guide; a chamber opening to which the socket guide is attached so that an IC chip mounting opening of the socket faces inside a chamber which is maintained at a predetermined state less than ordinary temperature; a printed circuit board; and a heating board which is provided around the chamber opening.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: November 6, 2001
    Assignee: Advantest Corporation
    Inventors: Hiroyuki Takahashi, Akio Kojima, Toshiyuki Kiyokawa
  • Patent number: 6314549
    Abstract: The present invention provides novel power saving methods for programmable logic array (PLA) circuits. One method is to store the results of a previous PLA operation, and bypass a new operation if the inputs are the same as previous operation. Another method is to reset the PLA outputs when the correct results can be achieved by resetting output latches. A large PLA is divided into smaller sub-PLA's while individual sub-PLA's are controlled separately. It is therefore possible to save power by bypassing unrelated sub-PLA's. PLA's of the present invention consume less power than equivalent prior art PLA's by orders of magnitudes. For most cases, PLA's of the present invention also have better performance and better cost efficiency. The design procedures are completely controlled by user-friendly computer aid design tools. The regular structures of PLA and the simplicity in connections allow us to avoid RC effects of conductor lines.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: November 6, 2001
    Inventor: Jeng-Jye Shau
  • Patent number: 6313639
    Abstract: A method for identifying short circuits in a low-voltage network includes the step of determining a first envelope and a second envelope for a plurality of locus curves of a current steepness as a function of a current in a low voltage network, the first and second envelopes including all switching angles, the first envelope being determined for a lower power factor, the second envelope being determined for an upper power factor. Additionally a third envelope is determined taking into account rated-current switching operations between the lower power factor and the upper power factor. A resultant envelope is formed from a combination of the first, second, and third envelopes by overlaying the first, second, and third envelopes. The resultant envelope defines a tolerant locus curve criterion indicating a short circuit for values outside the tolerant locus curve criterion. A configuration for identifying short circuits is also provided.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: November 6, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventor: Gerd Griepentrog
  • Patent number: 6313647
    Abstract: Disclosed is anew technique for measuring the resistivity of ultra-thin carbon films (less than 200 Å). The technique involves using a probe with very smooth surface, a thin layer lubricant (20-30Å)that enables the intimate and stable electrical contact between probe and the thin film, and measurement of I-V curve to determine resistance. Resistivity measurements were conducted on carbon films doped with hydrogen and nitrogen at different mixture ratios and different thicknesses, and the results were compared with those obtained on a commercially available machine that uses a mercury probe. The advantages of the present technique include simple in use, less expensive and quick measurements with reasonably good accuracy.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: November 6, 2001
    Assignee: Seagate Technology LLC
    Inventors: Zhu Feng, Chiu-Shing Frank Poon, Tan Guo Liu, Vidya Gubbi, Chung Yuang Shih
  • Patent number: 6310487
    Abstract: The invention provides a semiconductor integrated circuit wherein a PMOS 111 having a high threshold voltage is installed between a VDD line 101 and a VDDV line 103, and a NMOS 121 having a high threshold voltage is installed between a VSS line 102 and a VSSV line 104. The semiconductor integrated circuit comprises a logic gate circuit supplied with a power source voltage via the VDDV line 103 and the VSSV line 104, respectively, and made up of PMOSes 131 to 133, and NMOSes 141 to 143. A substrate terminal of the PMOSes 131 to 133, respectively, is connected to a pad 163 to which a suitable voltage can be supplied from outside while a substrate terminal of the NMOSes 141 to 143, respectively, is connected to a pad 164 to which a suitable voltage can be supplied from outside. The semiconductor integrated circuit with such a configuration is capable of improving a failure detection ratio at testing.
    Type: Grant
    Filed: April 6, 1999
    Date of Patent: October 30, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Koichi Yokomizo
  • Patent number: 6310481
    Abstract: A microprocessor couples to a voltage sensor through an analog to digital converter. The voltage sensor is adapted to be coupled across terminals of a battery. A small current source is also provided and adapted to be coupled across the terminal to the battery. The current source is momentarily applied to the battery and the resulting change in voltage is monitored using the microprocessor. The microprocessor calculates battery conductance based upon the magnitude of the differential current and the change in voltage and thereby determines the condition of the battery.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: October 30, 2001
    Assignee: Midtronics, Inc.
    Inventor: Kevin I. Bertness
  • Patent number: 6307380
    Abstract: While a high-frequency pulse is introduced at one end of a parallel conductor which is simulated as in an impedance equivalent state, an impedance mismatch generator is mounted to an intermediate region of the parallel conductor. As the impedance mismatch generator has produced a reflected wave of the pulse, a duration before the reflected wave is received at the one end is measured and multiplied by the propagation speed of voltage to calculate the distance from the pulse introducing point at the one end of the parallel conductor to the impedance mismatch generator.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: October 23, 2001
    Assignee: Levex Corporation
    Inventors: Eiichi Hirai, Seiji Toda, Naomasa Oshie, Masayuki Miki
  • Patent number: 6307389
    Abstract: A test device for testing an electronic board assembly with an exposed surface area with electrical connection locations to be contacted for testing includes a probe (32, 45) and a drive system for positioning the probe in orthogonal X and Y directions parallel with the surface area. The drive system includes a probe drive (11) for positioning the probe to contact a selected sub-area of the surface area, the probe drive being movable in all movement coordinates independently of any other probe drives in said test device. The sub-area is selected to include component locations (34) on the board assembly. Several probe drives (11) and several probes can be used at one time, each drive having a probe (13). The probe drives are supported so that the probes (13) can be moved to contact sub-areas adjacent to each other. The probe is an elongated needle with a contact tip and is mounted for pivotal movement.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: October 23, 2001
    Assignee: Scorpion Technologies AG
    Inventors: Manfred Buks, Peter Schaller, Jens Krueger
  • Patent number: 6307383
    Abstract: An apparatus is disclosed for testing the integrity of inductive coils such as yokes, flyback transformers, and the like. The apparatus includes a compact housing which makes it portable and convenient for field use. The apparatus includes circuitry disposed in the housing for inducing current through the inductive coil being tested. An array of LED's is provided to give the operator a visual display which is indicative of the condition of the inductive coil. The apparatus also includes means for connecting a meter or oscilloscope to the circuit in order to examine the electrical signature from the inductive coil being tested.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: October 23, 2001
    Inventors: Elver B. Kephart, Jr., Nove J. Kephart, Sr.
  • Patent number: 6307393
    Abstract: A device for detection of defects in a solid-state image sensor, comprising a timing generator for generating first and second read pulses to read out signal charges of first and second fields respectively from photo sensing elements disposed in the pixels of the image sensor; a controller for controlling the timing of generation of the first and second read pulses; and a defect detector supplied with the signal charges of the first and second fields stored in the image sensor and serving to detect any defective pixel by detecting the level of the signal charge in each pixel.
    Type: Grant
    Filed: January 14, 1997
    Date of Patent: October 23, 2001
    Assignee: Sony Corporation
    Inventor: Masayuki Shimura
  • Patent number: 6307382
    Abstract: A device (16) for sensing current flowing in a generally flat plate structure (10) contains a magnetic head (18) and signal processing circuitry (20). The magnetic head (a) senses changes in current-induced magnetic flux as the head is positioned over the plate structure and (b) provides a head output signal. The signal processing circuitry processes the head output signal to produce a data signal indicative of how much current appears to flow in the plate structure below the head. A driving voltage, which typically varies in a periodic manner to produce a characteristic signature, is applied to a primary conductor in the plate structure. A location sensor, typically formed with a light source (100) and a light sensor (102), detects the position of the magnetic head relative to the plate structure. A gas-cushion mechanism (80-98) controls the height of the head above the plate structure.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: October 23, 2001
    Assignee: Candescent Technologies Corporation
    Inventor: John E. Field
  • Patent number: 6307392
    Abstract: One main surface of a substrate has formed on it an appropriate contact terminal having in one part thereof a protruding part. An end of a lead is mounted via a holding part that is provided between the substrate and a probe, the lead being disposed along the main surface of the substrate so as to peel away from the main surface.
    Type: Grant
    Filed: October 28, 1998
    Date of Patent: October 23, 2001
    Assignee: NEC Corporation
    Inventors: Koji Soejima, Naoji Senba
  • Patent number: 6304089
    Abstract: A combination of two trailing cable termination devices is provided for connection in parallel between the ground-check and ground conductors of the two arms of a Y-configured trailing cable supplying power to two loads, the combined output electrical characteristic of the parallel termination devices satisfying the requirements of a ground-check monitor located at the source of the power and the individual output electrical characteristics of the devices each failing to satisfy those requirements.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: October 16, 2001
    Inventors: Garry E. Paulson, Rodney J. Paydli, Michael P. Vangool, Joseph J. Dudiak