Patents Examined by Gopal C. Ray
  • Apparatus, method and program product for automatically distributing power to modules inserted in live chassis
    Patent number: 6976112
    Abstract: When a blade and/or interconnect device is inserted into the chassis of a powered or live server the procedure is known as hot-plugging. Before power is applied to the hot-plugged blade and/or interconnect device the fabric type of already installed blades and/or interconnect devices is correlated with fabric types of newly hot-plugged blade and/or interconnect device. Depending upon results of the correlation, power to the hot-plugged blade and/or interconnect device is allowed or denied.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: December 13, 2005
    Assignee: International Business Machines Corporation
    Inventors: Jeffery Michael Franke, Donald Eugene Johnson, Michael Scott Rollins, David Robert Woodham
  • Electrical circuit for a bus interface and/or a bus bridge for performing a function
    Patent number: 6973527
    Abstract: An electrical circuit for a bus interface and/or a bus bridge is described. The electrical circuit comprises a global master being coupled with a first bus and at least one function block being coupled with the global master. An address and/or data is transmitted from the first bus to the function block. The function block comprises a application specific functionality for carrying out a function in connection with the received address and/or data.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: December 6, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Bernhard Holzinger
  • Base system for bus connection with docking system and method for controlling the same
    Patent number: 6970965
    Abstract: A base system for bus connection with a docking system and a method for controlling the same. The base system can include a docking connection processing circuit and a docking switch. The docking connection processing circuit detects connection of at least one docking system to the base system, generates a bus cycle in the base system of a type different from that of a bus cycle used in the docking system and outputs a docking bus connection enable signal within a period of time for which the bus cycle of the different type is generated. The docking switch couples a bus of the docking system to a bus of the base system in response to the docking bus connection enable signal from the docking connection processing circuit. The base system is easily coupled with an external system for function expansion.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: November 29, 2005
    Assignee: LG Electronics Inc.
    Inventors: Seoung Cheol Kang, Do Gwang Rha
  • System of distributed microprocessor interfaces toward macro-cell based designs implemented as ASIC or FPGA bread boarding and relative common bus protocol
    Patent number: 6970966
    Abstract: A distributed interface between a microprocessor or a standard bus and user macro-cells belonging to an ASIC, or FPGA, or similar silicon devices includes a main module connected to the microprocessor bus on one side and to a COMMON-BUS inside the interface on which a cluster of peripheral modules is appended on the other side. Peripheral modules are also connected to the user macro-cells through as multiple point-to-point buses to transfer signals two directions. A set of hardware and firmware resources such as registers, counters, synchronizers, dual port memories (e.g. RAM, FIFO) either synchronous or asynchronous with respect to macro-cells clock is encompassed in each peripheral module. Subsets of the standard resources are diversely configured in each peripheral module in accordance with specific needs of the user macro-cells.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: November 29, 2005
    Assignee: Italtel S.p.A.
    Inventors: Riccardo Gemelli, Marco Pavesi, Giuseppe De Blasio
  • Linking addressable shadow port and protocol for serial bus networks
    Patent number: 6968408
    Abstract: Linking addressable shadow port (LASP) and protocol allows addressing the LASP and configuring the connection of multiple Secondary Test Access Ports (TAPs) of the LASP using a single protocol or protocol bypass inputs. Multiple LASP are cascaded and the connection of their secondary TAPs are configured using the LASP protocol or protocol bypass inputs.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: November 22, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Rakesh N. Joshi, Mark S. Gary, Kenneth L. Williams
  • System and method for arbitrating access between common access requests on a bus
    Patent number: 6968406
    Abstract: A system and method of arbitrating access on a bus includes a bus, a bus expander, a boot module, and a management module. The bus expander includes an access engine, a first bus interface, a second bus interface, and a plurality of general purpose input/output ports. The boot module couples with a first segment of the bus and communicatively couples to the bus expander via the first bus interface. The management module couples with a second bus segment of the bus and communicatively couples with the bus expander via the second bus interface. The boot module and the management module make one or more access requests for one or more devices interfaced with the general purpose input/output ports of the bus expander thereby allowing the modules to communicate with the devices. The access engine arbitrates the access requests made by the modules to prevent bus hang conditions.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: November 22, 2005
    Assignee: Dell Products L.P.
    Inventor: Cynthia M. Merkin
  • System and method for introducing proprietary signals into a standard backplane via physical separation
    Patent number: 6965959
    Abstract: A system and method for introducing user-defined (e.g., proprietary) signals into a standard backplane. A front side backplane portion is provided with a set of connector holes that are electrically separated from corresponding connector holes provided on the backplane's rear side portion. Thus, whereas the separated front side connector portion is operable with standard bus signals, the rear side connector portion can support an independent signal pathway to carry one or more user-defined signals.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: November 15, 2005
    Assignee: Alcatel
    Inventors: Ignacio A. Linares, Robert S. Gammenthaler, Jr., Gerald R. Dubois
  • KVM extension configuration including a USB-to-non-USB adapter to support transmission of USB signals from a host to KVM devices located outside of USB operating ranges
    Patent number: 6961798
    Abstract: A KVM extension configuration that includes a host connected to a transmitter for transmitting communication signals across an extension to a receiver where user interface devices are located. The host has a motherboard that supports USB communications. A USB adapter may be coupled to the transmitter that converts USB signals that the transmitter receives from the host to a non-USB format prior to transmission across the extension to the receiver where the user interface devices successfully communicate with the host. A transmitter core may be coupled to the transmitter that receives the non-USB signals from the USB adapter and transmits such signals to the receiver.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: November 1, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Patrick Lee Ferguson
  • System for configuring expandable buses in a multi-device storage container and related method
    Patent number: 6961792
    Abstract: A system and method for configuring expandable buses wherein a host supports a plurality of expandable buses are provided. A plurality of devices are arranged to form a plurality of groups. Each group forms a chain of devices on an expandable bus. Each chain includes an input connector. The chains are configured such that connecting an expandable bus of the host to the input connector for a particular chain causes that particular chain to be directly connected to that particular expandable bus of the host. The absence of connecting any expandable bus of the host to the input connector for a particular chain causes that particular chain to be directly connected to a different chain so as to be indirectly connected to one of the expandable buses of the host.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: November 1, 2005
    Assignee: Storage Technology Corporation
    Inventor: Philippe Le Graverand
  • Universal Serial Bus circuit which detects connection status to a USB host
    Patent number: 6957292
    Abstract: The invention relates to universal serial bus circuits utilized in USB devices and USB hubs. Specifically, the invention relates to circuitry used to detect whether the hub or device is connected td a USB host, i.e. to detect connection status of the device or hub. The present invention provides a USB circuit comprising a microprocessor which receives signaling concerning the connection status of the USB circuit to a USB host circuit, first and second data signal lines which transmit respective first and second data signals to the microprocessor, a USB host power supply signal line which receives USB host power signaling to indicate connection status, and wherein the USB circuit analyzes the USB power supply signal line and change the data signal transmittal down the first and second data lines according to the connection statas of USB circuit to the USB host circuit.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: October 18, 2005
    Assignee: Nokia Corporation
    Inventor: Richard Croyle
  • Transparent switch
    Patent number: 6954810
    Abstract: A transparent switch is able to emulate the arbitration and addressing steps for devices that are normally connected to a bus-type communications network. The switch is connected to the devices in a star-type arrangement, with each device connected to a separate port. The switch performs the arbitration and addressing communications with a transmitting device, selects the proper port as defined by the addressing communication, arbitrates with the receiving device, and then switches the communications to occur directly from the transmitting device to the receiving device.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: October 11, 2005
    Assignee: LSI Logic Corporation
    Inventor: William P. Delaney
  • Providing a burst mode data transfer proxy for bridging a bus
    Patent number: 6954818
    Abstract: A computer system component serves as a burst mode data transfer proxy for bridging a bus operable in burst transfer mode and a single transfer mode bus. FIFOs, associated with respective DMA channels, provide a shared area for assembling and disassembling bursts on behalf of subsystems on the single transfer mode bus. The component also performs DMA functions.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: October 11, 2005
    Assignee: Renesas Technology Corp.
    Inventor: David Kent
  • Microcomputer with universal serial bus interface circuit and method of controlling the same
    Patent number: 6954815
    Abstract: A microcomputer includes a universal serial bus (USB) interface circuit wherein a program is written from a host to the microcomputer at high speed by utilizing a USB cable for connecting the host to a peripheral device. Nonvolatile memory, such as flash ROM, for program storage has a first program area to which program data transmitted from a personal computer is to be written and a second program area storing a write control program. Program data stored temporarily in RAM is written to the first program area of the flash ROM through a USB interface circuit in accordance with the write control program.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: October 11, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Hideo Kondo
  • Techniques using integrated circuit chip capable of being coupled to storage system
    Patent number: 6950894
    Abstract: In one embodiment, a method is provided in which an integrated circuit that includes an integrated input/output (I/O) controller is coupled to a storage system. The integrated circuit is coupled to a host processor system bus via a dedicated communication path. The storage system is capable of being coupled to and de-coupled from at least one removable storage device, and of receiving from the integrated circuit, when the storage system is coupled to the integrated circuit, data and/or an I/O request. The method of the embodiment also includes coupling or de-coupling the at least one removable storage device to or from, respectively, the storage system. The storage system remains capable of receiving from the integrated circuit the data and/or I/O request while the at least one removable storage device is being coupled to or de-coupled from the storage system.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: September 27, 2005
    Assignee: Intel Corporation
    Inventors: Loo Shing Tan, King Heng Lock, Soon Chieh Lim
  • Data amplifier having reduced data lines and/or higher data rates
    Patent number: 6950898
    Abstract: A data amplifier configured to allow for fewer data lines and/or increased processing speeds. Specifically, multiple helper flip-flops are used to prefetch data in a data amplifier. The helper flip-flops are configured to latch one or two of the data bits from a 4-bit prefetch in an alternating periodic fashion, thereby necessitating fewer data lines. Alternatively, the number of data lines can be maintained and faster bus processing speeds may be realized.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: September 27, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Todd A. Merritt, Donald M. Morgan
  • Cluster component network appliance system and method for enhancing fault tolerance and hot-swapping
    Patent number: 6948021
    Abstract: Packaging a hot-swappable server module (server blade) in a computer network appliance with shared, hot-swappable power, network, and management modules to provide highly available computer capacity. Distributing power between hot-swappable modules using single DC input voltage.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: September 20, 2005
    Assignee: Racemi Systems
    Inventors: Joel Brian Derrico, Paul Jonathan Freet
  • Digital image transfer controller
    Patent number: 6948022
    Abstract: A data transfer device (10) converts the data stream input to it by IEEE 1394 isochronous transmission from an image processing device (20) connected to it into data in a color signal mode adapted to PCI transfer by means of a converter circuit (219), while controlling an address of PCI bridge circuit (216B) as bus master, transmits the image data from the converter circuit (219) to a graphic memory (221) by DMA transmission by way of a PCI bus (215) and writes the data in the graphic memory (221) by means of a graphic control circuit (220). It then reads the image data from the graphic memory (221) by means of the graphic control circuit (220) and transfers the data to an electronic device (30).
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: September 20, 2005
    Assignee: Sony Corporation
    Inventor: Norio Ishibashi
  • Method and apparatus for utilizing extended AV/C command frames including status inquiry, notify inquiry and control inquiry command types
    Patent number: 6944704
    Abstract: A modified AV/C command set includes status inquiry, notify inquiry and control inquiry commands. The status inquiry, notify inquiry and control inquiry commands include an opcode and any number of operands. Thus, the status inquiry, notify inquiry and control inquiry commands can include only an opcode. The status inquiry, notify inquiry and control inquiry commands are sent from a controller to a target device to determine if the target device supports a particular status, notify or control command, respectively. In response to a status inquiry, notify inquiry or control inquiry command, a target device sends a response to the controller notifying the controller as to whether or not the target device supports the particular command.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: September 13, 2005
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Jon Ebbe Brelin
  • Portable USB device built with rechargeable functional apparatus
    Patent number: 6944701
    Abstract: A portable USB device built with rechargeable functional apparatus is disclosed. The portable USB device has a USB connector for being inserted into a socket of a host device. A USB device module is powered by the +5V pin on the USB connector and activated to perform data exchange via the D+ and D? pins on the USB connector when the USB connector is coupled to the host device, so as to provide a first specific function to the host device. A charge circuit charges the rechargeable battery via the +5V pin when the USB connector is coupled to the host device. A functional apparatus is powered by the rechargeable battery so as to provide second specific function different from the first one when the USB connector is not coupled to the host device.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: September 13, 2005
    Assignees: C-One Technology Corporation, Pretec Electronics Corporation
    Inventors: Gordon Yu, Jung Ta Chang, Forli Wen
  • Programmable load transient compensator for reducing the transient response time to a load capable of operating at multiple power consumption levels
    Patent number: RE38891
    Abstract: A load transient compensator and method of operating the load transient compensator for reducing the transient response time to a load capable of operating at either of several consumption levels when the load changes its power consumption level . The load transient compensator has a comparator having an output connected to an input of an upper driver and of a lower driver with the output of each of the driver being connected to a gate of a power transistor. When the load is in sleep mode and is about to start being accessed, the upper driver is turned on to turn on its associated transistor to supply additional current to the load, regulated by the comparison circuit. When the load is in the power up mode and it is about to stop being accessed, the lower driver is turned on to turn on its associated transistor to drain current supplied to the load by a supply, regulated by the comparison circuit.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: November 22, 2005
    Assignee: STMicroelectronics, Inc.
    Inventor: Eric J. Danstrom