Abstract: A memory system includes a memory device, a write buffer for buffering first and second host data, a chip-kill cache for caching one among first and second chip-kill parity candidates for the first and second host data, respectively, a chip-kill buffer having a smaller bandwidth and a larger capacity than the chip-kill cache; a chip-kill manager for generating a first chip-kill parity by performing an XOR operation on the first host data and the first chip-kill parity candidate, and generating a second chip-kill parity by performing an XOR operation on the second host data and the second chip-kill parity candidate, and a processor for controlling the memory device to program the first host data and the first chip-kill parity into a first open block and to program the second host data and the second chip-kill parity into a second open block.

Abstract: A computer-implemented method for maintaining a storage volume in a virtual tape system includes writing one or more logical volumes associated with a first category and one or more logical volumes associated with a second category to a primary storage in a virtual tape system. The computer-implemented method further includes performing a first automatic removal process in order to free up space on the primary storage, wherein the first automatic removal process removes logical volumes associated with the first category in priority to logical volumes associated with the second category. The computer-implemented method further includes performing a second automatic removal process, wherein the second automatic removal process dynamically alters the priority of the first automatic removal process such that one or more virtual volumes associated with the second category are removed in priority to one or more virtual volumes associated with the first category.

Abstract: In accordance with one implementation, a method for adaptive in-field recalibration includes detecting a potential environmental disturbance for a first storage node in a mass storage system based on an indicator external to the first storage node, and initiating a recalibration of an operational parameter of the first storage node responsive to the detection.

Abstract: An illustrative pseudo-file-system driver uses deduplication functionality and resources in a storage management system to provide an application and/or a virtual machine with access to a locally-stored file system. From the perspective of the application/virtual machine, the file system appears to be of virtually unlimited capacity. The pseudo-file-system driver instantiates the file system in primary storage, e.g., configured on a local disk. The application/virtual machine requires no configured settings or limits for the file system's storage capacity, and may thus treat the file system as “infinite.” The pseudo-file-system driver intercepts write requests and may use the deduplication infrastructure in the storage management system to offload excess data from local primary storage to deduplicated secondary storage, based on a deduplication database.

Abstract: An integrated circuit includes a first communication interface for communicatively coupling the integrated circuit with a coherent data processing system, a second communication interface for communicatively coupling the integrated circuit with an accelerator unit including an accelerator functional unit and an effective address-based accelerator cache for buffering copies of data from the system memory of the coherent data processing system, and a real address-based directory inclusive of contents of the accelerator cache. The real address-based directory assigns entries based on real addresses utilized to identify storage locations in the system memory.

Abstract: Devices and techniques for managing flash memory are disclosed herein. A memory controller may receive a first program request comprising first host data to be written to the flash memory. The flash memory may comprise a number of storage units with each storage unit comprising a number of storage sub-units. If the first host data is less than a remainder threshold, the memory controller may generate a first program data unit comprising the first host data and first log data describing the flash memory. The memory controller may program the program data unit to the first storage unit of the flash memory, where the first log data is written to a first storage sub-unit of the number of storage sub-unit. The memory controller may also store an indication that the first storage sub-unit is invalid.

Abstract: An apparatus comprises a processing device configured to determine that a first data structure comprises an indication that a first logical page is an orphan and to obtain the first logical page based at least in part on the determination. The processing device is configured to identify a pointer to a second logical page from a second data structure of the first logical page and to determine a data offset that corresponds to the pointer. The processing device is configured to determine a snapshot group that corresponds to the first logical page and to identify a candidate logical page based at least in part on the data offset, the snapshot group and the pointer. The processing device is configured to determine that the candidate logical page is a match for the first logical page and to link the candidate logical page and the first logical page together.

Abstract: Provided are a computer program product, system, and method for determining tracks to release in a source volume being copied to a target volume. A consistency group is formed of tracks in the source volume to copy to the target volume. A volume table providing information on the tracks allocated to the source volume is copied to a volume table copy in a memory providing a state of the tracks in the source volume as of a consistency group time. A determination is made of tracks in the source volume to release for tracks that are indicated in the volume table copy as available to release excluding tracks in the source volume that are written after the consistency group time. Space allocated to the determined tracks is released.

Abstract: One embodiment provides a method comprising maintaining, on a storage unit, mapping data between a first set of logical addresses (e.g., logical block addresses or LBAs) viewed by a host and a first set of physical addresses (e.g., physical block addresses or PBAs) and a second set of physical addresses of the storage unit. A first logical address (e.g., LBA) of the first set of logical addresses corresponds to a first physical address (e.g., PBA) of the first set of physical addresses that maintains current data for the first logical address. The first logical address further corresponds to a second physical address (e.g., PBA) of the second set of physical addresses that maintains prior data for the first logical address. The method further comprises receiving, at the storage unit, a command from the host to perform a multi-device operation involving the first logical address. The operation is performed atomically.

Abstract: A tape drive system as a Network Attached Storage (NAS) device and a method for operating the tape drive system. A tape drive is connected to a native connector disposed in a wall of a housing. The native connector enables an external connection to the tape drive. A single board computer is operated in a dimension of a credit card. The single board computer includes at least one integrated communication interface selected from Wi-Fi, Ethernet, USB, and combinations thereof. Data is transferred to and from the tape drive via the at least one integrated communication interface, wherein if the at least one integrated communication interface includes Ethernet and/or USB, then a connector related to the Ethernet and/or USB is provided in a wall of the housing. The tape drive, the single board computer, the native connector and the related connector are provided in the housing.

Abstract: A memory module operable to communicate data with a memory controller via a N-bit wide memory bus comprises memory devices arranged in a plurality of N-bit wide ranks. The memory module further comprises logic configurable to receive a set of input address and control signals associated with a read or write memory command and output registered address and control signals and data buffer control signals. The memory module further comprises circuitry coupled between the memory bus and corresponding data pins of memory devices in each of the plurality of N-bit wide ranks. The circuitry is configurable to enable registered transfers of N-bit wide data signals associated with the memory read or write command between the N-bit wide memory bus and the memory devices in response to the data buffer control signals and in accordance with an overall CAS latency of the memory module, which is greater than an actual operational CAS latency of the memory devices.

Abstract: A cache coherent system includes a directory with more than one snoop filter, each of which stores information in a different set of snoop filter entries. Each snoop filter is associated with a subset of all caching agents within the system. Each snoop filter uses an algorithm chosen for best performance on the caching agents associated with the snoop filter. The number of snoop filter entries in each snoop filter is primarily chosen based on the caching capacity of just the caching agents associated with the snoop filter. The type of information stored in each snoop filter entry of each snoop filter is chosen to meet the desired filtering function of the specific snoop filter.

Abstract: Cloning of virtual-machine images can be managed. For example, a computing device can copy a segment of a virtual-machine image stored in a second storage device to a first storage device in response to receiving a first read request for the segment from a virtual machine. The first storage device may be capable of responding to read requests from the virtual machine with less latency than the second storage device. The computing device can also update a log to indicate that the segment is stored on the first storage device. Thereafter, the computing device can receive a second read request for the segment. In response, the computing device can determine that the segment is stored in the first storage device using the log, and provide the segment by obtaining the segment from the first storage device.

Abstract: Embodiments of the present invention relate to a device includes both a transferring and receiving interface. The device may include a direction indicator, for example an arrow, indicating a direction of data transfer. The device may also include a switch, such as a button, to initiate data transfer. The device may also include a counter, display, or light that indicates the amount data transferred and serves as a user interface. The device may also include a power source, such as a battery, to power the device during data transfer.

Abstract: Provided are a computer program product, system, and method for determining cores to assign to cache hostile tasks. A computer system has a plurality of cores. Each core is comprised of a plurality of processing units and at least one cache memory shared by the processing units on the core to cache data from a memory. A task is processed to determine one of the cores on which to dispatch the task. A determination is made as to whether the processed task is classified as cache hostile. A task is classified as cache hostile when the task accesses more than a threshold number of memory address ranges in the memory. The processed task is dispatched to at least one of the cores assigned to process cache hostile tasks.

Abstract: Example apparatus and methods concern selective adaptive predictive data placement to improve the operating and/or electrical efficiency of a data storage apparatus. A future input/output operation is predicted from a current input/output operation, the state of the data storage apparatus, relationships between data currently being processed and data previously processed, environmental factors, or other factors. The apparatus and methods may improve data storage efficiency by selectively pre-fetching data, relocating data on the data storage apparatus or within a plurality of data storage apparatus, speculatively producing erasure codes or other error correction codes, speculatively deduplicating data, or other adaptive functions. Relocation and pre-fetching may be configured to achieve different policies focused on electrical efficiency, operating efficiency, use spreading, or other considerations.

Abstract: A request is received to perform a point in time copy operation from a source volume to a space efficient target volume. A controller copies data stored in a group of data storage units, from the source volume to a non-volatile storage, to preserve the point in time copy operation. A background process asynchronously copies the data from the non-volatile storage to the space efficient target volume to commit a physical point in time copy of the data from the source volume to the target volume.

Abstract: The present application relates generally to a parallel processing device. The parallel processing device can include a plurality of processing elements, a memory subsystem, and an interconnect system. The memory subsystem can include a plurality of memory slices, at least one of which is associated with one of the plurality of processing elements and comprises a plurality of random access memory (RAM) tiles, each tile having individual read and write ports. The interconnect system is configured to couple the plurality of processing elements and the memory subsystem. The interconnect system includes a local interconnect and a global interconnect.

Abstract: Systems and methods are described for fully replacing an online first RAID group of data storage devices with a second RAID group of data storage devices, whereby the data is read in parallel from multiple devices in the first group and written in parallel to multiple devices in the second group. Sub-chunks of data chunks not currently storing any data may be bypassed from copying, as well as sub-chunks still storing data that is no longer in-use by a client. The data may be copied as-is rather than from and to the same logical block address on each respective group. A similar process may be applied for shrinking the number of storage devices allocating to a storage pool.

Abstract: A request is received to perform a point in time copy operation from a source volume to a space efficient target volume. A controller copies data stored in a group of data storage units, from the source volume to a non-volatile storage, to preserve the point in time copy operation. A background process asynchronously copies the data from the non-volatile storage to the space efficient target volume to commit a physical point in time copy of the data from the source volume to the target volume.