Patents Examined by Henry Choe
  • Patent number: 11522499
    Abstract: A multiple-path amplifier (e.g., a Doherty amplifier) includes first and second transistors (e.g., main and peaking transistors) with first and second output terminals, respectively, all of which is integrally-formed with a semiconductor die. A signal path through the second transistor extends in a direction from a control terminal of the second transistor to the second output terminal, where the second output terminal corresponds to or is closely electrically coupled to a combining node. The amplifier also includes an integrated phase delay circuit that is configured to apply an overall phase delay (e.g., 90 degrees) to a signal carried between the first and second output terminals. The integrated phase delay circuit includes delay circuit wirebonds coupled between the first and second output terminals, and the delay circuit wirebonds extend in a third direction that is angularly offset from (e.g., perpendicular to) the second direction.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: December 6, 2022
    Assignee: NXP USA, Inc.
    Inventors: Xavier Hue, Margaret A. Szymanowski, Xin Fu
  • Patent number: 11519972
    Abstract: A method for performing predictive maintenance of an amplifier module is described. At least one parameter of at least one amplifier module is acquired via a measurement data acquisition unit. The at least one parameter acquired is analyzed via a measurement data analyzing unit so as to predict the probability and/or time of default of the at least one amplifier module. Further, a system is described.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: December 6, 2022
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Raimon Goeritz
  • Patent number: 11515840
    Abstract: The present disclosure is to improve the power added efficiency of a power amplifier at high output power. The power amplifier includes: a first capacitor with a radio frequency signal input to one end thereof; a first transistor whose base is connected to the other end of the first capacitor to amplify the radio frequency signal; a bias circuit for supplying bias to the base of the first transistor; and a second capacitor with one end connected to the base of the first transistor and the other end connected to the emitter of the first transistor.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: November 29, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Watanabe, Satoshi Tanaka, Norio Hayashi, Kazuma Sugiura
  • Patent number: 11515842
    Abstract: Doherty power amplifiers and devices are described with a low voltage driver stage in a carrier-path and a high voltage driver stage in a peaking-path. In an embodiment a Doherty power amplifier has a carrier-path driver stage transistor configured to operate using a first bias voltage at the driver stage output, and a final stage transistor configured to operate using a second bias voltage at the final stage output. A peaking-path driver stage transistor is configured to operate using a third bias voltage at the driver stage output, and a final stage transistor electrically coupled to the driver stage output of the peaking-path driver stage transistor is configured to operate using a fourth bias voltage at the final stage output, wherein the third bias voltage is at least twice as large as the first bias voltage.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: November 29, 2022
    Assignee: NXP USA, Inc.
    Inventors: Lu Wang, Elie A Maalouf
  • Patent number: 11509269
    Abstract: An amplifier circuit includes an amplifier configured to receive a radio frequency (RF) input signal from an input node, a bias circuit comprising a reference transistor coupled between a reference current source and ground, and a bias transistor coupled to the reference transistor and configured to generate a main bias current to bias the amplifier, an input power sense circuit coupled to the input node, and an additional transistor coupled to the input power sense circuit and to the bias transistor, the additional transistor configured to generate an additional bias current to bias the amplifier, the additional bias current responsive to a power level of the RF input signal.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: November 22, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Jisun Ryu, Yan Kit Gary Hau, Guoqing Fu, Xinwei Wang, Xiangdong Zhang, Chenliang Du
  • Patent number: 11509273
    Abstract: Apparatus and methods for power amplifier distortion networks are disclosed. In one aspect, there is provided a power amplifier system including a power amplifier configured to amplify a radio frequency input signal. The power amplifier including an input configured to receive the radio frequency input signal and an output configured to generate an amplified radio frequency signal. The power amplifier system further includes a distortion network electrically coupled to either the input or the output of the power amplifier. The distortion network including a plurality of channelized resistors. The channelized resistors connected in series to either an input or an output of the power amplifier.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: November 22, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventor: Douglas M. Johnson
  • Patent number: 11502653
    Abstract: A power amplifier module can be formed that includes metamaterial matching circuits. This power amplifier module can be included as part of a front-end module of a wireless device. The front-end module can replace a passive duplexer with an active duplexer that uses the power amplifier module in combination with a low noise amplifier circuit that can include a metamaterial matching circuit. The combination of PA and LNA circuits that utilize metamaterials can provide the functionality of a duplexer without including a stand-alone or passive duplexer. Thus, in certain cases, the front-end module can provide duplexer functionality without including a separate duplexer. Advantageously, in certain cases, the size of the front-end module can be reduced by eliminating the passive duplexer. Further, the loss introduced into the signal path by the passive duplexer is eliminated improving the performance of the communication system that includes the active duplexer.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: November 15, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventor: Hanseung Lee
  • Patent number: 11496097
    Abstract: Apparatus and methods for power amplifiers with positive envelope feedback are provided herein. In certain implementations, a power amplifier system includes a power amplification stage that amplifies a radio frequency signal, at least one envelope detector that generates one or more detection signals indicating an output signal envelope of the power amplification stage, and a wideband feedback circuit that provides positive envelope feedback to a bias of the power amplification stage based on the one or more detection signals. The power amplifier system further includes a supply modulator that controls a voltage level of a supply voltage of the power amplification stage based on the one or more detection signals such that the supply voltage is modulated with the output signal envelope through positive envelope feedback.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: November 8, 2022
    Inventors: Smarjeet Sharma, Nicolas Gerard Constantin
  • Patent number: 11489495
    Abstract: Methods and apparatuses for controlling gain of a single stage cascode FET amplifier are presented. According to one aspect, a series-connected resistor and capacitor is coupled to a gate of a cascode FET transistor of the amplifier, the capacitor providing a short at frequencies of operation of the amplifier. According to another aspect, values of the resistor can be used to control gain of the amplifier. According to yet another aspect, the resistor is a variable resistor whose value can be controlled/adjusted to provide different gains of the amplifier according to a linear function of the resistor value. An input matching network coupled to an input of the amplifier can be used to compensate for different noise figure degradations from different values of the resistor.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: November 1, 2022
    Assignee: pSemi Corporation
    Inventors: David Kovac, Joseph Golat
  • Patent number: 11489502
    Abstract: A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: November 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Bei-Shing Lien, Jaw-Juinn Horng
  • Patent number: 11476816
    Abstract: An amplifier device and a duplexer circuit are provided. The amplifier device includes a first differential amplifier circuit and a controller. The first differential amplifier circuit includes first and second radio frequency (RF) input terminals, first and second transistors, first and second adjustable capacitor circuits, and first and second RF output terminals. The controller adjusts capacitance values of the first adjustable capacitor circuit of the first differential amplifier circuit and the second adjustable capacitor circuit of the first differential amplifier circuit according to at least one of a characteristic related to a first RF input signal of the first differential amplifier circuit, a characteristic related to the second RF input signal of the first differential amplifier circuit, a matching deviation between the first transistor and the second transistor of the first differential amplifier circuit, and a characteristic of the amplifier device.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: October 18, 2022
    Assignee: RichWave Technology Corp.
    Inventors: Yu-Chun Donald Lie, Chuan-Chen Chao
  • Patent number: 11476819
    Abstract: Disclosed herein are methods for use in operating signal amplifiers that provide impedance adjustments for different gain modes. The impedance adjustments are configured to result in a constant real impedance for an input signal at the amplifier. Some of the disclosed methods adjust impedance using switchable inductors to compensate for changes in impedance with changing gain modes. Some of the disclosed methods adjust a device size to compensate for changes in impedance with changing gain modes. By providing impedance adjustments, the amplifiers reduce losses and improve performance by improving impedance matching over a range of gain modes.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: October 18, 2022
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventor: Junhyung Lee
  • Patent number: 11476579
    Abstract: A wideband RF choke circuit includes an input, first and second nodes, and a splitting means coupled between the input, first node, and second node. A first all-pass filter and a first line AC blocker are coupled between the input and the splitting means. Second and third all-pass filters, and second and third line AC blockers, are coupled between the splitting means and the first and second nodes, respectively. A first RF choke has a first end, coupled to the first all-pass filter, and a second end. A second RF choke has a first end, coupled to the second end of the first RF choke, and a second end coupled to the second all-pass filter. A third RF choke has a first end, coupled to the second end of the first RF choke, and a second end coupled to the third all-pass filter.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: October 18, 2022
    Inventor: Kang Lin
  • Patent number: 11469720
    Abstract: A split-steer amplifier with an invertible phase output, includes a first transistor having its base coupled to a positive node of an input port, its emitter coupled to ground, and collector connected to a positive intermediate node; a second transistor having its base coupled to a negative node of the input port, its emitter coupled to ground, and collector connected to a negative intermediate node; and multiple output ports each having a transistor arrangement operable to couple a positive node of that output port to the positive intermediate node and a negative node of that output port to the negative intermediate node, operable to couple the positive node of that output port to the negative intermediate node and the negative node of that output port to the positive intermediate node, and operable to decouple the positive node and the negative node of that output port from the intermediate nodes.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: October 11, 2022
    Assignee: AyDee Kay LLC
    Inventors: Tom Heller, Yanir Schwartz, Oded Katz
  • Patent number: 11469715
    Abstract: A power amplifier circuit includes first and second bias circuits configured to provide first and second biases, respectively, a first transistor having an emitter connected to a reference potential, a base configured to receive the first bias via a first resistor and receive a radio-frequency input signal via a first capacitor, and a collector configured to output an amplified radio-frequency signal, a second transistor having a base connected to the reference potential via a second capacitor and configured to receive the second bias via a second resistor, an emitter configured to receive the radio-frequency signal, and a collector connected to a power supply potential via a third inductor and configured to output a radio-frequency output signal, and an impedance circuit having a first end connected to an output section of the second bias circuit and configured to apply an alternating-current signal to a path extending from the second bias circuit.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: October 11, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Jun Enomoto, Kazuo Watanabe, Satoshi Tanaka, Yusuke Tanaka, Makoto Itou
  • Patent number: 11469716
    Abstract: In a limiting circuit that limits an output voltage of an operational amplifier, the signal quality of the output voltage is improved. The limiting circuit includes a short-circuit transistor and a gate voltage supply unit. In the limiting circuit, the short-circuit transistor short-circuits a path between an input terminal and an output terminal of the operational amplifier in a case where a voltage between the input terminal of the operational amplifier and the gate is higher than a predetermined threshold voltage. Furthermore, in the limiting circuit, the gate voltage supply unit supplies a voltage to the gate, the voltage depending on the threshold voltage and the output voltage of the output terminal.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: October 11, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Dan Luo, Koichi Misui
  • Patent number: 11469722
    Abstract: Systems and apparatuses are disclosed that include a modular power amplifier having a power amplifier subsystem with a first 90 degree hybrid block configured to receive an RF signal and output a split RF signal with components having a 90 degree phase shift, a second 90 degree hybrid block configured to receive and combine the split RF signal by removing the 90 degree phase shift, a high-power amplifier configured to amplify at least one of the components of the split RF signal. The modular power amplifier also includes a power distribution module configured to regulate an amount of power input to the high-power amplifier and a power sequencer configured to control the timing of power delivery by the power distribution module. Three-dimensional power amplifiers having a first high-power amplifier and a second high-power amplifier having different orientations causing a reduction in electromagnetic interference are also disclosed.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: October 11, 2022
    Assignee: Epirus, Inc.
    Inventors: Denpol Kultran, Yiu Man So, Albert Montemuro, Jacob Zinn Echoff, Michelle Marasigan, Michael John Hiatt, Jason Reis Chaves, Michael Alex Borisov, Jar Jueh Lee, Harry Bourne Marr, Jr.
  • Patent number: 11469725
    Abstract: Apparatus and methods for power amplifier output matching is disclosed. In one aspect, there is provided an output matching circuit including an input configured to receive an amplified radio frequency signal from a power amplifier, a first output, and a second output. The output matching circuit further includes a first matching circuit electrically connected between the input of the output matching circuit and the first output, the first matching circuit configured to suppress harmonics of a fundamental frequency of the amplified radio frequency signal when the amplified radio frequency signal is within a first band. The output matching circuit further includes a second matching circuit electrically connected between the input of the output matching circuit and the second output, the second matching circuit configured to suppress harmonics of the fundamental frequency of the amplified radio frequency signal when the amplified radio frequency signal is within a second band different from the first band.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: October 11, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Yuan Cao, Yu-Jui Lin, Russ Alan Reisner
  • Patent number: 11469726
    Abstract: A dual-drive power amplifier (PA) where the PA core includes a differential pair of transistors M1 and M2 that are driven by a coupling network having two transmission-line couplers, where a first transmission line section of a coupler is configured to transmit an input signal Vin through to drive a gate of the opposite transistor, while the second transmission line section is grounded at one end and coupled with the first transmission line section such that a coupled portion ?Vin of the input signal Vin drives the source terminal of a corresponding transistor. The arrangement of the coupling network allows the source terminals to be driven below ground potential. Embodiments disclosed here further provide an input matching network, a driver, an inter-stage matching network, and an output network for practical implementation of the PA core.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: October 11, 2022
    Assignee: Georgia Tech Research Corporation
    Inventors: Edgar Felipe Garay, Hua Wang
  • Patent number: 11469711
    Abstract: A power amplifier circuit includes a transistor having a base to which a radio frequency signal is input and a collector to which a power supply voltage that varies in accordance with an envelope of amplitude of the radio frequency signal is supplied and from which an amplified signal obtained by amplifying the radio frequency signal is output; a first termination circuit provided at a stage subsequent to the transistor and configured to attenuate a harmonic component of the amplified signal; and a second termination circuit provided at the stage subsequent to the transistor and configured to attenuate a harmonic component of the amplified signal. The first termination circuit and the second termination circuit have a property of resonating for a radio frequency signal having a frequency between a frequency of a second harmonic component and a frequency of a third harmonic component.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: October 11, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Mitsunori Samata