Abstract: Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.

Abstract: A power amplifier circuit has an input node from which an input signal, which is a high-frequency signal, is inputted and an output node to which the input signal is amplified by a differential amplifier circuit to be outputted as an output signal. The power amplifier circuit includes a balun transformer (second balun transformer) including an input-side winding that has a substantially center to which a power-supply voltage is supplied and that is connected between differential outputs of the differential amplifier circuit, and an output-side winding that is coupled to the input-side winding via an electromagnetic field and that has one end connected to a reference potential; and a capacitive element (capacitor) provided between another end (node) of the output-side winding and the output node.

Abstract: Apparatus and methods for an improved-efficiency Doherty amplifier are described. The Doherty amplifier may include a two-stage peaking amplifier that transitions from an “off” state to an “on” state later and more rapidly than a single-stage peaking amplifier used in a conventional Doherty amplifier. The improved Doherty amplifier may operate at higher gain values than a conventional Doherty amplifier, with no appreciable reduction in signal bandwidth.

Abstract: A power amplifier circuit includes a first amplification path including a first power amplifier, a second amplification path including a second power amplifier, a first switching circuit configured to electrically connect either the first amplification path or the second amplification path and a first output terminal to each other, a second switching circuit configured to electrically connect an input terminal and any one of a plurality of second output terminals to each other, and a matching circuit configured to electrically connect the first output terminal and the input terminal to each other and achieve impedance matching between the first output terminal and the input terminal.

Abstract: First switches are respectively connected between multiple input terminals and an inverting input of an operational amplifier. Second switches and feedback resistors are respectively sequentially series-connected between an output of the operational amplifier and nodes between the multiple input terminals and the first switches. Third switches are respectively connected between nodes between the second switches and the feedback resistors and an output terminal of an amplification circuit with an analog multiplexer.

Abstract: The present disclosure relates to systems and methods for operating transceiver circuitry to transmit or receive signals on various frequency ranges. To do so, a transmitter or a receiver of the transceiver circuitry is selectively coupled to or uncoupled from an antenna of the transceiver circuitry. Additionally, radio frequency filters may be individually or collectively coupled to and/or uncoupled from the antenna to filter different frequencies in the transmitting or receiving signals.

Abstract: A receiver includes an amplifier that receives a transmission signal and amplifies a first voltage difference between the transmission signal and a reference signal to generate a first output signal and a second output signal at a first node and a second node. An equalizer is provided, which is connected to the first node and the second node and receives the transmission signal. The equalizer compensates a common-mode offset between the first output signal and the second output signal based on a second voltage difference between an average voltage level of the transmission signal and the reference signal.

Abstract: A distortion compensation device includes: a first distortion compensation circuit having a first distortion compensation characteristic for compensating for a first distortion occurring in an output of an amplifier, the first distortion compensation circuit being configured to compensate for the first distortion; a second distortion compensation circuit having a second distortion compensation characteristic for compensating for a second distortion occurring in the output of the amplifier, the second distortion compensation circuit being configured to compensate for the second distortion; and an update unit configured to update the second distortion compensation characteristic.

Abstract: A differential amplifier circuit generates a first current and a second current having a current difference obtained by amplifying a voltage difference between an input voltage and a reference voltage. An output stage supplies current proportional to the first current to an output node. A current conversion circuit discharges current proportional to the second current from the output node. After connecting the output node to a ground node in response to a reset signal, a latch circuit disconnects the output node from the ground node after reset cancellation. Thereafter, when voltage at the output node rises from the ground voltage in a case where a level relationship between the input voltage and the reference voltage is reversed from a reset cancellation time point, the latch circuit fixes the voltage at the output node to a power supply voltage by a positive feedback latch operation.

Abstract: A power amplifier system includes: a drive stage configured to amplify an RF input signal and implemented in a substrate containing silicon; a power stage including a carrier amplifier configured to amplify a base signal from the RF input signal as amplified by the drive stage, and a peaking amplifier configured to amplify a peak signal from the RF input signal as amplified by the drive stage, the power stage being implemented in a substrate containing gallium arsenide; and a phase compensation circuit configured to change a phase of the RF input signal, wherein either the carrier amplifier or the peaking amplifier is connected to the phase compensation circuit.

Abstract: A circuit includes an operational amplifier, a plurality of input capacitors, a plurality of output capacitors, a plurality of sampling switches, a plurality of holding switches, a plurality of combined switches. The input capacitors include a first input capacitor and a second input capacitor. The output capacitors include a first output capacitor and a second output capacitor. The sampling switches include a first sampling switch, a second sampling switch, a third sampling switch and a fourth sampling switch. The holding switches include a first holding switch and a second holding switch. The combined switches include a first combined switch and a second combined switch.

Abstract: A split-steer amplifier with an invertible phase output, includes a first transistor having its base coupled to a positive node of an input port, its emitter coupled to ground, and collector connected to a positive intermediate node; a second transistor having its base coupled to a negative node of the input port, its emitter coupled to ground, and collector connected to a negative intermediate node; and multiple output ports each having a transistor arrangement operable to couple a positive node of that output port to the positive intermediate node and a negative node of that output port to the negative intermediate node, operable to couple the positive node of that output port to the negative intermediate node and the negative node of that output port to the positive intermediate node, and operable to decouple the positive node and the negative node of that output port from the intermediate nodes.

Abstract: A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.

Abstract: A power amplifier circuit includes an amplifier that receives an input signal with an alternating current and outputs an output signal obtained by amplifying power of the input signal to a first node; an inductive element that is connected between the first node and a second node; and a variable capacitor that is connected between the second node and a reference potential, and whose electrostatic capacitance increases as power of the output signal increases.

Abstract: Power amplifier apparatuses and techniques for optimizing the design of power amplifiers are disclosed. In one aspect, a method for optimizing a power amplifier includes selecting a circuit topology for the power amplifier. The circuit topology includes one or more photoconductive switches and an impedance matching network including one or more parameter values representative of the impedance matching network or the photoconductive switches that can be adjusted. The method further includes selecting one or more optimization goals for the impedance matching network and the one or more photoconductive switches, and adjusting the one or more parameter values according to the one or more optimization goals. The one or more optimization goals include an efficiency at a particular power output.

Abstract: Packaged RF transistor amplifiers are provided that include a flat no-lead overmold package that includes a die pad, a plurality of terminal pads and an overmold encapsulation that at least partially covers the die pad and the terminal pads and an RF transistor amplifier die mounted on the die pad and at least partially covered by the overmold encapsulation. These packaged RF transistor amplifiers may have an output power density of at least 3.0 W/mm2.

Abstract: Integrated Doherty power amplifiers are provided herein. In certain implementations, a Doherty power amplifier includes a carrier amplification stage that generates a carrier signal, a peaking amplification stage that generates a peaking signal, and an antenna structure that combines the carrier signal and the peaking signal. The antenna structure radiates a transmit wave in which the carrier signal and the peaking signal are combined with a phase shift.

Abstract: Methods and apparatuses for controlling gain of a single stage cascode FET amplifier are presented. According to one aspect, a series-connected resistor and capacitor is coupled to a gate of a cascode FET transistor of the amplifier, the capacitor providing a short at frequencies of operation of the amplifier. According to another aspect, values of the resistor can be used to control gain of the amplifier. According to yet another aspect, the resistor is a variable resistor whose value can be controlled/adjusted to provide different gains of the amplifier according to a linear function of the resistor value. An input matching network coupled to an input of the amplifier can be used to compensate for different noise figure degradations from different values of the resistor.

Abstract: A high-speed transimpedance amplifier with bandwidth extension feature over full temperature range and bandwidth extension method belong to the field of integrated circuit. The present invention solves the problem existed in boosting core amplifier bandwidth technology over full temperature range. The present invention includes a preamplifier TIA, a phase splitting stage PS, a pre-driver stage Pre-Drive, an output buffer BUFF and an offset cancelation circuit OC. The preamplifier TIA adopts the gate-drain voltage cancelation technology to expand the bandwidth, so that its ?3 dB bandwidth is greater than twice the closed-loop bandwidth of the first-order TIA. The pre-driver stage Pre-Drive is used to drive the output buffer BUFF. By adjusting the source-level negative feedback capacitance value of the pre-driver stage Pre-Drive circuit to generate a high-frequency gain that varies with temperature, the preamplifier TIA bandwidth differences under different temperature conditions are compensated.

Abstract: A circuit for generating a radio frequency signal is provided. The circuit includes an amplifier configured to generate a radio frequency signal based on a baseband signal. Further, the circuit includes a power supply configured to generate a variable supply voltage based on a control signal indicating a desired supply voltage, and to supply the variable supply voltage to the amplifier. The circuit further includes an envelope tracking circuit configured to generate the control signal based on a bandwidth of the baseband signal, and to supply the control signal to the power supply.