Abstract: An optical storage system for coupling to at least a plurality of peripheral devices. The optical storage system includes a data read subsystem to read out data stored in an optical storage medium, a data process subsystem to generate address information and data information according to the read out data, and an interface controller to generate output data according to the address information and the data information and to transfer the output data to one of the peripheral devices. A number of bits of the output data being transferred in parallel is configurable according to a parallel bit number. The data information and the address information are transferred via the same pins.

Abstract: A computer implemented method, data processing system, and computer usable program code are provided for using identifier virtualization to extend the virtualization capabilities of protocols. A determination is made as to whether a logical entity requires a unique identifier in order to extend a virtualization capability of a protocol. A unique name is assigned that is associated with the logical entity. The unique identifier is requested from a fabric using the unique name. The logical entity is notified that the unique identifier has been established for the logical entity in response to receiving the unique identifier from the fabric. The unique identifier identifies the logical entity within or attached to the fabric.

Abstract: According to various illustrative embodiments of the present invention, a method for adaptive cluster input/output control includes starting a nonessential input/output operation using a first controller in a first node of a cluster, informing at least a second controller in a second node of the cluster about starting the nonessential input/output operation, and increasing the nonessential input/output operation by a predetermined utilization percentage. The method also includes waiting for a predetermined amount of time, determining whether the nonessential input/output operation has been completed, and determining whether the at least the second controller in the second node has substantially decreased performance.

Abstract: An apparatus for identifying a type of a peripheral connected to an information processing apparatus includes a peripheral-information reading unit that reads information relating to the peripheral from the information processing apparatus using at least one of systems whose application order is predetermined; a peripheral-information storing unit that stores in advance specification information of a peripheral to be connected to the information processing apparatus; and a peripheral-type identifying unit that collates the information read by the peripheral-information reading unit with the specification information stored in the peripheral-information storing unit to identify the type of the peripheral connected to the information processing apparatus.

Abstract: A buffer, a method, and a computer program product for DMA transfers are provided that are designed to save memory space within a local memory of a processor. The buffer is a return buffer with a portion reserved for DMA lists. A DMA controller accomplishes DMA transfers by: reading address elements from a DMA list located in the DMA list portion; reading the corresponding data from system memory; and copying the corresponding data to the return buffer portion. This buffer saves space because when the buffer begins to fill up the corresponding return data can overwrite the data in the DMA list. Accordingly, the DMA list overlays on top of the return buffer, such that the return data can destruct the DMA list and the extra storage space for the DMA list is saved.

Abstract: A method, device, and system are provided for the automatically assigning identification numbers or enclosure IDs to enclosures in a data storage system. Each enclosure is assigned a unique enclosure ID that can be used to reference the enclosure in the data storage system. The enclosure IDs are generated and assigned to enclosures based on the network topology. Specifically, each enclosure is assigned an enclosure ID that not only uniquely identifies the enclosure but the enclosure ID can be used to determine the location of the enclosure in the data storage system.

Abstract: An apparatus generally having an internal memory and an external transfer circuit is disclosed. The internal memory may be disposed on a chip and may contain at least one first buffer for storing a subset of at least one reference frame (i) suitable for motion compensation and (ii) stored in an external memory off the chip. A size of the at least one first buffer generally exceeds one row of blocks in the reference frame. The external transfer circuit may be disposed on the chip and configured to transfer the subset from the external memory to the internal memory.

Abstract: A data storage system includes a host, diplex logic receiving a first, low frequency signal and a second, high frequency signal from the host and injecting the first signal onto a cable and injecting the second signal onto the cable and a first disk array enclosure coupled to the cable to receive the first signal and the second signal. The first disk array enclosure includes a diplexer which receives the first and second signals from the cable and transmits the second signal to a drive array, a microcontroller that receives the first signal from the diplexer, detects a voltage level of the first signal and generates a voltage control signal indicative of the voltage level of the first signal and a switch device that receives the voltage control signal from the microcontroller and sets an operating voltage of the diplexer based on the voltage control signal.

Abstract: In one embodiment of the invention, a method for providing a multi-mode port in a network device, includes: setting a first mode on the port, wherein the network device can perform serial communication on the port; and setting a second mode on the port, wherein the network device can perform network communication on the port. In another embodiment of the invention, an apparatus for enabling a multi-mode port in a network device, includes an adapter configured for attachment to and detachment from a connector of a port in the network device; wherein the network device can perform serial communication on the port in a first mode; and wherein the network device can perform network communication on the port in a second mode.

Abstract: An interface unit may comprise a buffer configured to store requests that are to be transmitted on an interconnect and a control unit coupled to the buffer. In one embodiment, the control unit is coupled to receive a retry response from the interconnect during a response phase of a first transaction for a first request stored in the buffer. The control unit is configured to record an identifier supplied on the interconnect with the retry response that identifies a second transaction that is in progress on the interconnect. The control unit is configured to inhibit reinitiation of the first transaction at least until detecting a second transmission of the identifier. In another embodiment, the control unit is configured to assert a retry response during a response phase of a first transaction responsive to a snoop hit of the first transaction on a first request stored in the buffer for which a second transaction is in progress on the interconnect.

Abstract: An image forming apparatus, includes a memory and a processor. The memory stores a maintenance ID of an exchangeable part that can be attached to and detached from the main body of the apparatus, and storing information with regard to the exchangeable part. The processor reads out the maintenance ID of the exchangeable part from the memory, encrypts information relating to the exchangeable part stored in the memory and decrypts information encrypted by the processor. The processor also identifies whether decrypting information is necessary based on the maintenance ID read out by the ID reading unit or not.

Abstract: Methods, apparatus, and computer program products are disclosed for option ROM characterization by establishing an isolating execution environment for an expansion adapter of a computer, the adapter having an option ROM containing initialization code for the adapter, executing the initialization code for the expansion adapter in the isolating execution environment, identifying operating characteristics of the option ROM, including characteristics of the option ROM unavailable prior to execution of the initialization code in the isolating execution environment, and allocating virtual memory address space in a normal execution environment of the computer to the option ROM of the expansion adapter in dependence upon the identified operating characteristics of the option ROM.

Abstract: An Interchangeable Standard Port or Stack Port (ISPSP) uses a standard physical connector such as an RJ-45 or SFP. The ISPSP automatically detects whether it is connected to a standard port, such as a 1000BaseT, or whether it is connected to another ISPSP stacking port. This automatic detection can be done through hardware or software. Once the auto-detection is complete the routing platform will automatically configure the ISPSP port for standard 1 Gbps bit rate and framing, or for stacking, e.g., 2.5 Gbps bit rate, and framing.

Abstract: In a multi-queue memory system, a plurality of read count pointers (one for each queue) are stored in a read address file, and used to generate empty flags. A read count pointer associated with a first queue is retrieved from the read address file, and it is determined whether the first queue should be available for a re-read operation. If so, the retrieved read count pointer is stored as a first read mark value. The read count pointer is incremented in response to each read operation performed from the first queue, thereby creating an adjusted read count pointer. If a re-read operation is to be performed from the first queue, the first read mark value is stored in the read address file. Otherwise, the adjusted first read count pointer is stored in the read address file. Similar operations are performed on the write side of the multi-queue memory system.

Abstract: An I/O controller to which an I/O device is connected includes a DMA controller (DMAC) and an access control unit (ACU). The DMAC executes DMA transfer in accordance with data transfer control information set in a control/status register by a user process. The ACU limits execution of DMA transfer by the DMAC based on access control information set in a control/status register by a privileged process, and disables the DMAC from accessing any memory area other than the memory area that can be accessed by the user process.

Abstract: The present invention is related to an interface design for multimedia data transmitting, which can provide a working interface in a data storing device or a communication device, using the working interface can provide the connecting facility between a multimedia device and computer system and improve the traditional high speed differential signals to portable digital data processing device.

Abstract: In a communications channel coupled to multiple duplicated subsystems, a method, interposer and program product are provided for verifying integrity of subsystem responses. Within the communications channel, a first checksum is calculated with receipt of a first response from a first subsystem responsive to a common request, and a second checksum is calculated for a second response of a second subsystem received responsive to the common request. The first checksum and the second checksum are compared, and if matching, only one of the first response and the second response is forwarded from the communications channel as the response to the common request, with the other of the first response and the second response being discarded by the communications channel.

Abstract: An apparatus and method are disclosed for managing component identifiers in a data storage system. The apparatus includes a recognition module, a receiving module, a comparison module, and an update module. The recognition module recognizes newly installed components. The receiving module receives a component identifier stored on the newly installed component. The comparison module compares the identifier of the newly installed component with one or more component identifiers stored in a computer system memory. The update module updates the one or more component identifiers stored in the system memory based upon the identifier of the newly installed component.

Abstract: A system and method for protecting register write operations, especially register write operations performed in a USB PHY. A USB transmitter/receiver, operable to receive a register write command from a USB LINK device, may monitor the write sequence initiated by the register write command to determine if/when the register write sequence has been interrupted. In monitoring the register write sequence, the USB transmitter/receiver is operable to discard the register write command if a DIR signal issued by the USB transmitter/receiver is asserted during the register write sequence and/or if an STP signal received by the USB transmitter/receiver is asserted during the register write sequence, where STP may be part of a normal register write operation. The USB transmitter/receiver is further operable to allow the register write sequence to complete if the STP signal and the DIR signal are not asserted during a predetermined period of the register write sequence.

Abstract: This invention discloses a data access device for using in computer of power off status, which comprises a power multiplexer, a DC to DC converter, a serial bus signal to storage interface signal controller, a data storage interface signal multiplexer, and a controller. Therefore, if controller detects an external device wants to access data storage device of computer at power off, it will control power multiplexer to retrieve the standby power of the power device and process power transformation to provide a required power for driving the storage device, and by using serial bus signal to storage interface signal controller, external device can access the data from storage device at power off.