Abstract: A system includes a cross-point memory array and a decoder circuit coupled to the cross-point memory array. The decoder circuit includes a predecoder having predecode logic to generate a control signal and a level shifter circuit to generate a voltage signal. The decoder circuit further includes a post-decoder coupled to the predecoder, the post-decoder including a first stage and a second stage coupled to the first stage, the control signal to control the first stage and the second stage to route the voltage signal through the first stage and the second stage to a selected conductive array line of a plurality of conductive array lines coupled to a memory array.
Abstract: A semiconductor memory device includes: a weak cell controller for programming weak cell information, outputting the weak cell information in response to an initialization signal or a write end signal, and outputting a read end signal whenever the weak cell information is outputted; a memory cell array region that includes memory cells for storing data in response to a row active signal and a column selection signal, and includes a first cell region for storing the weak cell information; an information transfer control circuit for generating a column address based on a column counting signal generated by using the read end signal, and generating a row address whenever the column counting signal reaches a predetermined value in response to the initialization signal; a row circuit for enabling the row active signal; and a column circuit for outputting the column selection signal by decoding the column address.
Abstract: A reconfigurable semiconductor memory apparatus may include a memory cell array including a plurality of sub arrays. The reconfigurable semiconductor memory apparatus may include an information storage unit configured to store status information for each sub array, and a reset address according to the status information.
Abstract: In one embodiment, an integrated circuit includes at least one logic circuit supplied by a first supply voltage and at least one memory circuit coupled to the logic circuit and supplied by a second supply voltage. The memory circuit is configured to be read and written responsive to the logic circuit even if the first supply voltage is less than the second supply voltage during use. In another embodiment, a method includes a logic circuit reading a memory cell, the logic circuit supplied by a first supply voltage; and the memory cell responding to the read using signals that are referenced to the first supply voltage, wherein the memory cell is supplied with a second supply voltage that is greater than the first supply voltage during use.
Type:
Grant
Filed:
April 20, 2016
Date of Patent:
June 6, 2017
Assignee:
Apple Inc.
Inventors:
Brian J. Campbell, Vincent R. von Kaenel, Daniel C. Murray, Gregory S. Scott, Sribalan Santhanam
Abstract: An elongated flexible medical device is inserted into a patient's body via a natural orifice, and advanced through the natural orifice to a location proximate innervated tissue that influences renal sympathetic nerve activity. The medical device can be advanced into a body organ and to a location within the organ proximate the innervated tissue. The organ may comprise an organ of the gastrointestinal tract or urinary tract. The medical device may be advanced through and beyond an access hole in a wall of the organ, and situated at a location proximate the innervated tissue. One or both of imaging and ablation energy is delivered from a distal end of the medical device to the innervated tissue. Innervated renal tissue can be ablated using various forms of energy, including RF energy, ultrasound energy, optical energy, and thermal energy.
Type:
Grant
Filed:
September 23, 2011
Date of Patent:
June 6, 2017
Assignee:
Boston Scientific Scimed, Inc.
Inventors:
David J. Sogard, Scott Smith, Mark L. Jenson
Abstract: The invention relates to a device and to a method for visual assistance during the electrophysiological use of a catheter in the heart, enabling electroanatomic 3D mapping data relating to an area of the heart to be treated to be visualized during the use of the catheter. Before the catheter is used, 3D image data of a body region containing the area to be treated is detected by means of a method for tomographic 3D imaging. The area to be treated or significant parts thereof are extracted from said 3D image data, in order to obtain selected 3D image data. The electroanatomic 3D mapping data and the selected 3D image data obtained are then classed in terms of position and dimension, and are adjacently visualized, for example, during the catheter ablation. The inventive method and associated device enable the orientation of the operator to be improved during the use of a catheter in the heart.
Type:
Grant
Filed:
August 24, 2004
Date of Patent:
June 6, 2017
Assignee:
BIOSENSE WEBSTER (ISRAEL) LTD.
Inventors:
Kristine Fuimaono, Gal Hayam, Yuval Karmi, Reinmar Killmann, Assaf Preiss, Norbert Rahn, Frank Sauer, Chenyang Xu
Abstract: A method and apparatus for memory subsystem calibration in which periodic calibrations of a data strobe delay and reference voltage are scheduled. After a first calibration, a reference score is determined based on a parameter of an eye opening. On a next scheduled calibration thereafter, the data strobe delay is calibrated at the most recent value of the reference voltage. A score is then determined, and compared to the reference score. If the score is within a specified range of the reference score, then no calibration of the reference voltage is performed on the current cycle. Otherwise, the reference voltage is calibrated as well.
Abstract: A system for treating at least one sensory capacity of a person with the help of a stimulation device comprises an electronic converter of a sensory signal into an electronic signal for controlling at least one transducer for emitting signals that are images of the sensory signal. The stimulation device for direct ultrasound stimulation of the sensory cortex of a brain comprises at least one support that is implantable in a skull and that includes at least one internal wall and at least one ultrasound transducer carried by the support. Means for emitting focused ultrasound waves through the internal wall of the support towards a determined zone of the sensory cortex of the patient's brain in order to generate modulation of the brain activity in the cortex are provided. The ultrasound transducer is driven by the electronic converter to emit focused ultrasound signals that are images of the sensory signal.
Type:
Grant
Filed:
July 24, 2012
Date of Patent:
June 6, 2017
Assignee:
UNIVERSITE PIERRE ET MARIE CURIE (PARIS 6)
Abstract: A resistive random access memory device includes: a first control line, a second control line, a RRAM cell, a first programmable current source and a first programmable voltage source. The RRAM cell is coupled between the first control line and the second control line, and has a programmable resistive element. The first programmable current source is coupled to the first control line, and for selectively providing a configuration current to the RRAM cell. The first programmable voltage source is coupled to the first control line, and for selectively providing a configuration voltage to the RRAM cell. Additionally, a state of the programmable resistive element of the RRAM cell is configured according to the configuration current and the configuration voltage. Under architecture of the RRAM cell of the present invention, a reading circuit for the RRAM device can be implemented with a simple inverter instead of a complicated current sensing amplifier.
Type:
Grant
Filed:
January 27, 2015
Date of Patent:
June 6, 2017
Assignee:
Brocere Electronics company limited
Inventors:
Chih-Hao Lai, Chih-Kai Huang, Jou-Hung Wang
Abstract: A novel semiconductor device where multilevel data can be written and read. The semiconductor device includes first to fifth transistors, a capacitor, a bit line, and a power supply line. Write operation is performed in such a manner that first data is supplied to a gate of the fifth transistor through the first transistor; the first transistor is turned off; second data is supplied to a second electrode of the capacitor through the second transistor to convert the first data into third data; and the second electrode of the capacitor are made electrically floating. The second electrode of the capacitor is initialized to GND through the third transistor. Read operation is performed by charging or discharging the bit line through the fourth transistor and the fifth transistor. The first to third transistors are preferably oxide semiconductor transistors.
Type:
Grant
Filed:
May 20, 2016
Date of Patent:
June 6, 2017
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
Abstract: Therapy methods using pulsed cavitational ultrasound therapy can include the subprocesses of initiation, maintenance, therapy, and feedback of the histotripsy process, which involves the creation and maintenance of ensembles of microbubbles and the use of feedback in order to optimize the process based on observed spatial-temporal bubble cloud dynamics. The methods provide for the subdivision or erosion of tissue, liquification of tissue, and/or the enhanced delivery of therapeutic agents. Various feedback mechanisms allow variation of ultrasound parameters and provide control over the pulsed cavitational process, permitting the process to be tuned for a number of applications. Such applications can include specific tissue erosion, bulk tissue homogenization, and delivery of therapeutic agents across barriers.
Type:
Grant
Filed:
September 22, 2011
Date of Patent:
May 9, 2017
Assignee:
THE REGENTS OF THE UNIVERSITY OF MICHIGAN
Inventors:
Charles A. Cain, Zhen Xu, J. Brian Fowlkes, Timothy L. Hall, William W. Roberts
Abstract: Methods of managing data of a storage device responsive to temperature can include measuring a temperature of the storage device, changing a duration of a refresh interval of the buffer memory responsive to the measured temperatures, changing a number of refresh bursts during the refresh interval responsive to the measured temperature, and refreshing data of the buffer memory based on the refresh interval and the number of the refresh bursts that are changed responsive to temperature.
Abstract: A voltage self-boosting circuit for generating a boosted voltage for driving a word line write in a memory array for a memory write operation is provided. A voltage generation circuit(s) is configured to generate a read voltage for a memory read operation and a write voltage for a memory write operation based on a predefined supply voltage. For the memory write operation, a delay circuit delays the delay circuit enable signal by a predetermined delay to generate the output voltage control signal. Accordingly, the voltage generation circuit(s) generates boosted voltage that drives the write voltage to a selected word line(s). For the memory read operation, the voltage generation circuit(s) does not generate the boosted voltage and thus drives the read voltage to the selected word line(s). Hence, it is possible to reduce power consumption and timing delay during the memory read operation or the memory write operation.
Type:
Grant
Filed:
October 10, 2016
Date of Patent:
April 25, 2017
Assignee:
QUALCOMM Incorporated
Inventors:
Sungryul Kim, Jung Pill Kim, Hyunsuk Shin
Abstract: Methods and apparatus (100) are described for modifying unwanted tissue for cosmetic reasons. The methods provide a non-invasive manner to perform body contouring by destroying adipose tissue while simultaneously causing collagen contraction in a single procedure. Adipose tissue destroyed during the medical procedure may be removed from a treatment volume during the wound healing process, allowing the treatment volume to gradually shrink (22). The gradual shrinkage may promote better skin tone in the treatment area. The procedure may involve multiple treatments to the same treatment area or location.
Type:
Grant
Filed:
March 4, 2010
Date of Patent:
April 18, 2017
Assignee:
LIPOSONIX, INC.
Inventors:
Tanar Ulric, Charles S. Desilets, Blake Little
Abstract: Various examples are directed to systems and methods comprising receiving a control signal at a control circuit of a surgical device. The control circuit may comprise a first circuit portion coupled to at least one switch operable between an open state and a closed state. The first circuit portion may be configured to communicate with a surgical generator over a conductor pair to receive the control signal and may comprise at least one resistor coupled to the at least one switch. Methods may also comprise determining the state of the at least one switch based on the value of the resistor.
Type:
Grant
Filed:
September 28, 2015
Date of Patent:
April 18, 2017
Assignee:
Ethicon Endo-Surgery, LLC
Inventors:
Douglas J. Turner, Jeffrey L. Aldridge, Vincent P. Battaglia, Jr.
Abstract: A computer readable memory includes a circuit layer, a multilayer memory stacked over the circuit layer to form a memory box, the memory box comprising a bottom surface interfacing with the circuit layer and four side surfaces, and a first switching crossbar array disposed on a first side of the memory box. A plurality of vias connects the circuit layer to the first switching crossbar layer. The first switching crossbar array accepts signals from the plurality of vias and selectively connects a crossbar in the multilayer memory to the circuit layer. A method for addressing multilayer memory is also provided.
Type:
Grant
Filed:
January 18, 2013
Date of Patent:
April 11, 2017
Assignee:
Hewlett Packard Enterprise Development LP
Abstract: A data programming method includes setting a plurality of first type physical erasing units as a current writing area and recording a current writing data amount. The method also includes calculating a data amount threshold according to the first type physical erasing units. The method still includes receiving data. The method further includes: if the current writing data amount is less than the data amount threshold, programming the data to at least one of the first type physical erasing units using a first programming mode; and if the current writing data amount is not less than the data amount threshold, setting a plurality of second type physical erasing units as the current writing area and programming the data to at least one physical erasing unit of the second type physical erasing units using a second programming mode.
Abstract: In an exemplary embodiment, the method includes: determining whether a used capacity of first physical units initially configured to be programmed based on a first programming mode reaches a preset capacity and whether specific data stored in the first physical units matches a preset condition; and if the used capacity of the first physical units reaches the preset capacity and the specific data stored in the first physical units matches the preset condition, selecting at least one physical unit from second physical units initially configured to be programmed based on a second programming mode, and programming the selected physical unit based on the first programming mode. Accordingly, the writing speed decreased by the fully written buffer area may be improved.
Abstract: To generate an analog current without restriction by a power supply voltage. A semiconductor device includes a first node, a second node, a first- to an n-th-stage power storage element (n is an integer greater than or equal to 2), and a first- to an n-th-stage switch. The capacities of the first- to the n-th-stage power storage element are different from one another. The first- to the n-th-stage power storage element are electrically connected in parallel between the first node and the second node. A first terminal of a k-th stage power storage element (k is an integer greater than or equal to 1 and less than or equal to n) is electrically connected to the first input node via a k-th stage switch. The on/off states of the first- to the n-th-stage switch are controlled by a first to an n-th signal.
Type:
Grant
Filed:
July 31, 2015
Date of Patent:
March 14, 2017
Assignee:
SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Abstract: An ultrasound catheter assembly having a rotatable transducer assembly is disclosed. The ultrasound catheter assembly includes an elongate flexible shaft having a lumen and a proximal end and a distal end. The catheter assembly further includes a drive member that engages the transducer assembly at a distal end of the catheter. Rotation of the drive member in a first direction causes the transducer assembly to rotate in an oscillatory fashion in a second direction.
Type:
Grant
Filed:
October 29, 2012
Date of Patent:
March 7, 2017
Assignee:
Volcano Corporation
Inventors:
Stephen Charles Davies, Norman Hugh Hossack