Abstract: An wideband amplifier circuit such as a transimpedance amplifier achieves improved amplifier and/or system performance, such as a reduced input impedance. The transimpedance amplifier may use a complementary common gate stage that receives an input signal and generates current to a current summing stage. In one instance, an input current is received by a complimentary common gate stage that includes a first common gate transistor and a second common gate transistor, each having different polarities, in which the first terminals of each of the transistors are configured to receive the input current. Each of the transistors generates an output current to a current summing stage that generates an output voltage at an output terminal. The output voltage may be based on the combined currents from the first common gate transistor and second common gate transistor.

Abstract: A PA power supply, which includes a first ET power supply, power supply control circuitry, a first PMOS switching element, and a second PMOS switching element, is disclosed. During a first operating mode, the power supply control circuitry selects an OFF state of the first PMOS switching element, selects an ON state of the second PMOS switching element, and adjusts a voltage of a first switch control signal to maintain the OFF state of the first PMOS switching element using a voltage at a source of the first PMOS switching element and a voltage at a drain of the first PMOS switching element; the PA power supply provides a first PA power supply signal; and the first ET power supply provides a first ET power supply signal, such that the first PA power supply signal is based on the first ET power supply signal.

Abstract: According an embodiment, a Doherty amplifier includes a carrier amplifier, a peak amplifier, a first line and a second line. The carrier amplifier amplifies a signal and outputs a first output signal. The peak amplifier amplifies the signal and outputs a second output signal. The first line is connected to the carrier amplifier. The second line includes a first end connected to the peak amplifier and a second end connected to the first line. A characteristic impedance of the first end is lower than a characteristic impedance of the second end.

Abstract: A multiple-stage RF amplifier and a packaged amplifier device include driver and final-stage transistors, each having a control terminal, a first current-carrying terminal, and a second current-carrying terminal. The control terminal of the final-stage transistor is electrically coupled to the first current-carrying terminal of the driver transistor. The amplifier further includes an inter-stage circuit coupled between the first current carrying terminal of the driver transistor and a voltage reference node. The inter-stage circuit includes a first inductance, a first capacitor, and a second capacitor. The first inductance and the first capacitor are coupled in series between the first current carrying terminal and the voltage reference node, with an intermediate node between the first inductance and the first capacitor. The second capacitor has a first terminal electrically coupled to the intermediate node and a second terminal electrically coupled to the voltage reference node.

Abstract: A power amplifier circuit includes a main amplifier circuit having a main amplifier for amplifying an input signal in one of a full-power mode and at least a back-off mode. A first peak amplifier circuit is in parallel with the main amplifier circuit. The first peak amplifier circuit has a peak amplifier in series with a transmission line. The peak amplifier is configured to be activated in the full-power mode and to be de-activated in at least the back-off mode. A combining node is connected to an output of the main amplifier circuit and an output of the transmission line. In some embodiments, a matching network is connected at the output of the combining node. In some embodiments, the transmission line is selected so the first peak amplifier circuit appears substantially as an open circuit to the combining node.

Abstract: Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain “droop” due to self-heating using a Sample and Hold (S&H) circuit. The S&H circuit samples and holds an initial temperature of the PA at commencement of a pulse. Thereafter, the S&H circuit generates a continuous measurement that corresponds to the temperature of the PA during the remainder of the pulse. A Gain Control signal is generated that is a function of the difference between the initial temperature and the operating temperature of the PA as the PA self-heats for the duration of the pulse. The Gain Control signal is applied to one or more adjustable or tunable circuits within a PA to offset the Gain droop of the PA.

Abstract: An amplifier is configured to amplify an RF signal as between an input terminal and an output terminal across a wideband frequency range. A first LC network is connected to the input terminal and has first and second reactive components. A first switching device is connected between the first and second reactive components and couples both the first and second reactive components to the input terminal in an ON state, and disconnects the second reactive component from the input terminal in an OFF state. A second LC network is connected to the output terminal and has third and fourth reactive components. A second switching device is connected between the third and fourth reactive components and couples both the third and fourth reactive components to the output terminal in an ON state and disconnects the fourth reactive component from the output terminal in an OFF state.

Abstract: A power amplifier module includes a first bipolar transistor configured to amplify a radio frequency signal and output an amplified signal and a second bipolar transistor. A base of the second bipolar transistor is supplied with a control voltage for controlling attenuation of the radio frequency signal, and a collector the second bipolar transistor is supplied with a source voltage. The power amplifier module also includes a first resistor, where one end of the first resistor is connected to a supply path of the radio frequency signal to the first bipolar transistor, and a capacitor, where one end of the capacitor is connected to the other end of the first resistor and the other end of the capacitor is connected to the collector of the second bipolar transistor.

Abstract: A power amplifier (PA) cell is coupled to an input signal source, and includes a transistor coupled to the load; a first inductor coupled to a gate of the transistor; and a second inductor coupled to a source of the transistor, wherein the first inductor and the second inductor each includes a first conductive coil and a second conductive coil, respectively, having first and second inductance values, respectively, such that the PA cell includes a terminal between the gate of the transistor and the input signal source, and the terminal is impedance matched with the input signal source.

Abstract: A Class D amplifier is described herein that includes an outer loop, an inner loop, and a notch filter. The notch filter can be located between an output of the outer loop and an input of the inner loop. Alternatively or in addition, the notch filter can be located within the outer loop of the Class D amplifier. Ripple content can initially be present at an input to the inner loop of the Class D amplifier, causing nonlinearity in the inner loop and distortion in the audio output signal. The notch filter can filter the ripple content at the input to the inner loop, thereby reducing the nonlinearity present in the inner loop and the distortion in the audio output signal.

Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.

Abstract: An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

Abstract: According to an embodiment, a high-frequency semiconductor amplifier circuit includes an input terminal and an output terminal. A gate of a first transistor is connected to the input terminal. A drain of the first transistor is connected to the output terminal. A second transistor is connected between a source of the first transistor and a reference potential terminal. A bias generation circuit has an input control signal terminal, a bias voltage terminal connected to the gate of the first transistor, a control voltage terminal connected to a gate of the second transistor, and an intermediate voltage terminal connected to the drain of the first transistor. The bias generation circuit supplies a control voltage, a bias voltage, and a first voltage according to the input control signal.

Abstract: One aspect of the present disclosure relates to a method for operating an amplifier, the amplifier including a variable resistor coupled between a source of a first input transistor and a source of a second input transistors, and a variable capacitor coupled between the source of the first input transistor and the source of the second input transistor. The method includes adjusting a resistance of the variable resistor to adjust a low-frequency gain of the amplifier, and adjusting a capacitance of the variable capacitor in an opposite direction as the adjustment to the resistance of the variable resistor.

Abstract: In an embodiment an amplifier circuit comprises an amplifying element configured to amplify a radiofrequency input signal; a bias modulator configured to provide a bias voltage to the amplifying element, the bias voltage depending on a bias control signal; and a tuneable matching network configured to modulate the load to which the output of the amplifying element is applied.

Abstract: A rail balancing circuit is described herein for use with a power supply, the RBC comprising: a circuit adapted to respond to over-voltage and under-voltage conditions in the power supply that comprises a positive rail voltage source and a negative rail voltage source, such that any deviation from a balanced condition between the positive rail voltage source and the negative rail voltage source is substantially instantaneously corrected to bring both the positive and negative rail voltage sources back to the balanced condition.

Abstract: An audio reproduction apparatus is shown and includes an amplifier with a power amplification stage having transistors in a push-pull arrangement. A bias generator biases the transistors with a standing current. A processor receives a data stream comprising digital samples of an analog audio signal and analyzes the peak level of each group. It then determines the appropriate standing currents to maintain Class A operation of the power amplification stage given the peak levels of each of the groups. A digital to analog converter produces an analog input signal for the input stage of the amplifier from the data stream. A feedforward path between the processor and the bias generator allows the standing current to be adjusted prior to the arrival of the analog input signal in the power amplification stage.

Abstract: A low noise amplifier (LNA) reduces matching and switch noise. The LNA includes a main radio frequency signal path, an auxiliary radio frequency signal path and a phase shifter. The main path includes a first transistor and an inductor. The inductor is positioned between an input port of the LNA and the first transistor. The first transistor receives an input radio frequency signal via the inductor and provides a first amplified signal based on the input radio frequency signal. The auxiliary radio frequency signal path provides a second amplified signal for a noise cancellation mode based on the input radio frequency signal. The phase shifter applies a phase shift to an output signal of the LNA based on the first amplified signal and the second amplified signal.

Abstract: Apparatus and methods for power amplifier biasing are disclosed herein. In certain implementations, a power amplifier system includes a power amplifier bias circuit and a power amplifier. The power amplifier bias circuit includes a reference current source that generates a reference current, a bipolar reference transistor, and a transimpedance amplifier that amplifies a difference between a collector current of the bipolar reference transistor and the reference current, and that provides a base bias voltage to a base of the bipolar reference transistor. The power amplifier generates a radio frequency output signal at an output based on amplifying a radio frequency input signal received at an input. The power amplifier includes a bipolar power amplifier transistor including a base biased by the base bias voltage such that the power amplifier has a substantially flat gain response versus time.

Abstract: Systems, methods and apparatuses for efficient control of a pass device driven into its triode region of operation are described. Output drive capability of an operational amplifier driving the pass device is boosted during a transition of the pass device from operating in a triode region to operating in a saturation region. An exemplary implementation of an LDO controlling pass devices for providing burst RF power to a power amplifier is described. An alternative configuration that boosts the driving capability of the operational amplifier using an asymmetrical mirroring circuit is also described.