Abstract: A power amplification device includes a power amplifier core stage and a power amplifier driver stage. The power amplifier driver stage receives a radio frequency signal to be amplified by the power amplification device. The power amplifier driver stage includes a first source follower input transistor and a first current source transistor. A source of the first source follower input transistor is coupled to a drain of the first current source transistor. The source of the first source follower input transistor is directly coupled to the power amplifier core stage to drive the power amplifier core stage. An input match and passive voltage gain device is coupled to the power amplifier driver stage to generate a voltage gain at an input of the power amplifier driver stage. A first bias source is configured to generate a first bias signal to bias the power amplifier driver stage.

Abstract: A circuit including a power amplifier having a control terminal configured to control an output level of the power amplifier, a bias circuit in communication with the control terminal, the bias circuit including a tunable plurality of diodes in series configured to supply a bias voltage to the control terminal, and a control circuit in communication with the bias circuit configured to tune the plurality of diodes in series to create the bias voltage in response to a supply voltage of the amplifier.

Abstract: A power supply for use with Class D amplifiers in energy efficient applications is described herein. The power supply reduces the effects of off side charging and improves cross regulation. The topology of the power supply can be designed to minimize quiescent mode losses through resonant switching of some or all active switches. Additionally, the power supply can be implemented without external resonant inductors, the power supply can be implemented with smaller capacitors that have longer lifetime ratings, the switching losses present in a power factor correction stage of the power supply can be reduced, and/or a modified power factor correction choke can be utilized to reduce energy loss.

Abstract: Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.

Abstract: A method can be used to measure a load driven by a switching amplifier having a differential input, an LC output demodulator filter and a feedback network between the amplifier output and the differential input. The amplifier is AC driven in a differential and in a common mode by applying a common. The feedback network provides feedback towards the differential input from downstream the LC demodulator filter by computing the impedance of the load as a function of the differential mode output current and the common mode output current. The feedback network provides feedback towards the differential input from upstream the LC demodulator filter by measuring the impedance value of the inductor of the LC demodulator filter, and computing the impedance of the load as a function of the differential mode output current, the common mode output current and the impedance value of the inductor of the LC demodulator filter.

Abstract: A power amplifier is described. The power amplifier including at least a first amplifier stage, and at least a first tunable matching network. The first tunable matching network is configured to couple between a first impedance and a second impedance. The first matching network including at least one first set of metal oxide semiconductor variable capacitor arrays.

Abstract: A method may include processing a first signal derived from an input signal with a first path to generate a first path voltage at a first path output, processing a second signal derived from the input signal with a second path to generate a second path voltage at a second path output, the second path comprising a linear amplifier having at least one transistor for driving the second path voltage, generating the first signal and the second signal with a signal splitter, such that the second signal comprises information of the input signal absent from the first signal, and such that the second path voltage is of a sufficient magnitude such that the at least one transistor operates in a saturation region of the at least one transistor throughout a dynamic range of a load voltage equal to the difference of the first path voltage and the second path voltage.

Abstract: A method and apparatus for high-speed clipping and recovery in an amplifier circuit is disclosed. In one embodiment, a circuit includes an amplifier configured to amplify an incoming signal. The amplifier includes inverting and non-inverting inputs, and is configured to provide a differential output. An output limiting circuit is coupled across the differential output, and is configured to limit an amplitude of an output signal provided on the differential output responsive to an input signal exceeding a first amplitude threshold. An input limiting circuit is coupled between the inverting input and the non-inverting input of the amplifier. Responsive to the input signal exceeding a second amplitude threshold (greater than the first), the input limiting circuit is configured to limit the amplitude of the output signal.

Abstract: In accordance with embodiments of the present disclosure, a method may include receiving a digital input signal at a first integrated circuit from a second integrated circuit, receiving a supply voltage at the first integrated circuit from the second integrated circuit, generating an analog output signal from the digital input signal, predicting a distortion of the analog output signal based on the digital input signal and the supply voltage, and controlling a gain applied to at least one of the digital input signal and the analog output signal based on the predicting.

Abstract: A power amplification module includes a first input terminal that receives a first transmit signal in a first frequency band, a second input terminal that receives a second transmit signal in a second frequency band having a narrower transmit/receive frequency interval than the first frequency band, a first amplification circuit that receives and amplifies the first transmit signal to produce a first amplified signal and outputs the first amplified signal, a second amplification circuit that receives and amplifies the second transmit signal to produce a second amplified signal and outputs the second amplified signal, a third amplification circuit that receives and amplifies the first or second amplified signal to produce an output signal and outputs the output signal, and an attenuation circuit located between the second input terminal and the second amplification circuit and configured to attenuate a receive frequency band component of the second frequency band.

Abstract: A differential amplification circuit includes: a first transistor and a second transistor of a differential pair; first and second loads; current sources; and a resistor circuit, wherein the resistor circuit includes: a coarse adjustment part and a fine adjustment part, one of the coarse adjustment part and the fine adjustment part includes a first lateral adjustment part and a second lateral adjustment part which have the same configuration, the first lateral adjustment part and the second lateral adjustment part are connected symmetrically to both sides of a central adjustment part, and the central adjustment part has a circuit configuration symmetrical with respect to two connection nodes with the first lateral adjustment part and the second lateral adjustment part.

Abstract: Provided is an amplification circuit that amplifies an input signal and outputs an amplified signal. The amplification circuit includes: an amplification element that outputs the amplified signal from an output terminal thereof; an inductor having one end to which a power supply voltage is supplied and another end that is connected to the output terminal of the amplification element; a variable resistor that is connected in parallel with the inductor; and a resistance value adjusting circuit that adjusts a resistance value of the variable resistor in accordance with the temperature.

Abstract: A reconfigurable load modulation amplifier having a first power amplifier (PA) configured to be supplied by a first drain voltage and a second PA coupled in parallel with the first PA, wherein the second PA is configured to be supplied by a second drain voltage is disclosed. The reconfigurable load modulation amplifier includes a quadrature coupler configured to combine power from both the first PA and the second PA for output through an output port. Also included is control circuitry configured to set at least one of the first drain voltage and the second drain voltage such that the first drain voltage is different than the second drain voltage. In at least one embodiment, the control circuitry is further configured to dynamically adjust at least one of the first drain voltage and the second drain voltage such that the first drain voltage is different than the second drain voltage.

Abstract: An RF amplifier comprising an input-transistor having an input-transistor-base terminal, an input-transistor-collector terminal and an input-transistor-emitter terminal; a degeneration-component connected between the input-transistor-emitter terminal and a ground terminal; and a protection-transistor having a protection-transistor-base terminal, a protection-transistor-collector terminal and a protection-transistor-emitter terminal. The input-transistor-base terminal is connected to the protection-transistor-emitter terminal, and the protection-transistor-base terminal is connected to the input-transistor-emitter.

Abstract: An amplifier with adjustable gain including a plurality of differential amplifiers and an output stage circuit is provided. Each of the differential amplifiers has at least one differential pair, two current terminals of each of the differential pairs are coupled by a connection structure, and the connection structure provides a negative feedback resistance. The differential amplifiers commonly receive a differential input signal pair, and output terminals of the differential amplifiers are coupled together. The output stage circuit inverts a voltage on the output terminals of the differential amplifiers to generate an output voltage. A direct current gain of the amplifier with adjustable gain is determined by adjusting at least one of working numbers of the differential amplifiers and the differential pairs.

Abstract: Apparatus are provided for amplifier systems and related circuits are provided. An exemplary circuit includes a main amplifier arrangement, first impedance matching circuitry coupled between the output of the main amplifier arrangement and a first output of the circuit, a peaking amplifier arrangement, and second impedance matching circuitry coupled between the output of the peaking amplifier arrangement and a second output of the circuit. In one exemplary embodiment, the first impedance matching circuitry and the second impedance matching circuitry have different circuit topologies and different physical topologies.

Abstract: A power amplifier circuit includes an input that receives a first input signal having a first phase and a second input signal having a second phase, a first transistor that includes a source that is supplied with a first voltage, and a gate that receives the first input signal, a second transistor that includes a source that is supplied with the first voltage, and a gate that receives the second input signal, a first neutralizing circuit that neutralizes a parasitic element, a second neutralizing circuit that neutralizes a parasitic element, N third transistors, N being an integer equal to or higher that 1, N fourth transistors, and an output that is connected between a drain of the N-th third transistor and a drain of the N-th fourth transistor and outputs a first output signal having a third phase and a second output signal having a fourth phase.

Abstract: Circuits, devices and methods related to multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.

Abstract: Described is a phase-switched phase-switched, impedance modulation amplifier (PSIM). The PSIM has an input that can be coupled to a source and an output that can be coupled to a load. The PSIM includes one or more phase-switched reactive elements and a controller. The controller provides a control signal to each of the one or more phase-switched reactive elements. In response to one or more control signals provided thereto, each phase-switched reactive element provides a corresponding selected reactance value such that an impedance presented to an input or output port of an RF amplifier may be varied.

Abstract: Apparatus and methods for biasing of power amplifiers are disclosed. In one embodiment, a mobile device includes a transceiver that generates a radio frequency signal and a power amplifier enable signal, a power amplifier that provides amplification to the radio frequency signal and that is biased by a bias signal, and a bias circuit that receives the power amplifier enable signal and generates the bias signal. The bias circuit includes a gain correction circuit that generates a correction current in response to activation of the power amplifier enable signal, and a primary biasing circuit that generates the bias signal based on the correction current and the power amplifier enable signal.