Patents Examined by Hieu Nguyen
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Patent number: 9813036Abstract: Radio frequency (RF) amplification devices and methods of amplifying RF signals are disclosed. In one embodiment, an RF amplification device includes a control circuit and a Doherty amplifier configured to amplify an RF signal. The Doherty amplifier includes a main RF amplification circuit and a peaking RF amplification circuit. The control circuit is configured to activate the peaking RF amplification circuit in response to the RF signal reaching a threshold level. In this manner, the activation of the peaking RF amplification circuit can be precisely controlled.Type: GrantFiled: December 14, 2012Date of Patent: November 7, 2017Assignee: Qorvo US, Inc.Inventors: Andrew F. Folkmann, Ramon Antonio Beltran Lizarraga
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Patent number: 9813027Abstract: Devices and methods related to embedded sensors for dynamic error vector magnitude corrections. In some embodiments, a power amplifier (PA) can include a PA die and an amplification stage implemented on the PA die. The amplification stage can include an array of amplification transistors, with the array being configured to receive and amplify a radio-frequency (RF) signal. The PA can further include a sensor implemented on the PA die. The sensor can be positioned relative to the array of amplification transistors to allow sensing of an operating condition representative of at least some of the amplification transistors. The sensor can be substantially isolated from the RF signal.Type: GrantFiled: December 28, 2014Date of Patent: November 7, 2017Assignee: Skyworks Solutions, Inc.Inventors: Anthony Francis Quaglietta, Mark M. Doherty, Lui Lam
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Patent number: 9806684Abstract: An apparatus and method are disclosed for providing output signal swings that are greater than the supply voltage in a class-D amplifier. The amplifier circuit boosts the voltage across the amplifier load, such as a loudspeaker, by using capacitors to “charge pump” the voltage across the load and thus increase the voltage temporarily. This is done by using two or more output bridges rather than one, and connecting the bridges through the capacitors. For signals of less than the supply voltage, only an inner bridge, similar to a full bridge of the prior art, operates. For signals above the supply voltage, an outer bridge charges capacitors, which are then used to ‘boost’ the voltage on the bridge output for the short period of the Class-D switching period. Thus, only relatively small value boosting capacitors are needed, as they do not need to supply charge for very long.Type: GrantFiled: September 10, 2016Date of Patent: October 31, 2017Assignee: ESS Technology, Inc.Inventors: Peter John Frith, Yongsheng Xu, A. Martin Mallinson, Robert Lynn Blair
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Patent number: 9806686Abstract: The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a variable gain amplifier that includes a first transistor and a second transistor whose gate terminals are coupled to a first input terminal. A first drain terminal of the first transistor and a first source terminal of the second transistor is coupled to a voltage gain control switch. There are other embodiments as well.Type: GrantFiled: September 22, 2016Date of Patent: October 31, 2017Assignee: INPHI CORPORATIONInventor: Guojun Ren
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Patent number: 9806675Abstract: Various embodiments of the present invention relate to a power amplification device and method, wherein the power amplification device can comprise: a power amplifier; a switch mode converter for controlling a bias of the power amplifier; a comparator for providing a switching signal to the switch mode converter according to an envelope signal; and a control unit for determining whether a switching frequency of the switch mode converter is within a specific band and applying an offset to the switching frequency so as to deviate from the specific band if the switching frequency of the switch mode converter is within the specific band. Various other embodiments can be carried out.Type: GrantFiled: September 29, 2014Date of Patent: October 31, 2017Assignee: Samsung Electronics Co., Ltd.Inventor: Dong-Il Yang
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Patent number: 9800213Abstract: The embodiments described herein provide an amplifier device that utilizes bonding pad capacitance in an impedance matching network. In one specific embodiment, the amplifier device comprises: an amplifier formed on a semiconductor die, the amplifier including an amplifier input and an amplifier output, the amplifier configured to generate an amplified radio frequency (RF) signal at the amplifier output; and an impedance matching network coupled to the amplifier, the impedance matching network including a capacitor, where the capacitor includes a first plate, a second plate, and dielectric material between the first and second plates, where the first plate includes or is directly electrically coupled to a bond pad on the semiconductor die.Type: GrantFiled: June 20, 2016Date of Patent: October 24, 2017Assignee: NXP USA, INC.Inventors: Ibrahim Khalil, Ebrahim M. Al Seragi, Jeffrey K. Jones
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Patent number: 9793860Abstract: Radio frequency (RF) amplification devices are disclosed along with methods of providing power to an RF signal. In one embodiment, an RF amplification device includes an RF amplification circuit and a voltage regulation circuit. The RF amplification circuit includes a plurality of RF amplifier stages coupled in cascade. The voltage regulation circuit is coupled to provide a regulated voltage to a driver RF amplifier stage. The voltage regulation circuit is configured to generate the regulated voltage so that the maximum output power of the RF amplification circuit is provided approximately at a first power level while the supply voltage is above a threshold voltage level. The first power level should be within the physical capabilities of the RF amplification circuit, and thus, the RF amplification circuit is prevented from being damaged once the supply voltage is above the threshold voltage level.Type: GrantFiled: September 5, 2014Date of Patent: October 17, 2017Assignee: Qorvo US, Inc.Inventors: David Q. Ngo, Michael B. Thomas, Praveen Varma Nadimpalli
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Patent number: 9787255Abstract: The invention relates to a sequential broadband Doherty power amplifier with adjustable output power back-off The sequential broadband Doherty power amplifier has at least one input (I1, I2; RFin) for receiving at least one broadband HF signal, wherein the broadband HF signal or broadband HF signals (RFin) have at least an average power level (carrier/average) and a peak envelope power level (peak), with the average power level and the peak envelope power level defining a crest factor, and a first amplifier branch for amplifying the input signal, with the first amplifier branch providing the amplification substantially for the low and at least the average power level, at least one second amplifier branch for amplifying the input signal, wherein the second amplifier branch substantially provides the amplification for the peak envelope power level, wherein the output of the first amplifier branch is connected via an impedance inverter (ZT) to the output of the second amplifier branch, the junction (CN) being coType: GrantFiled: October 1, 2014Date of Patent: October 10, 2017Assignee: RWTH AACHENInventors: Renato Negra, Xuan Anh Nghiem
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Patent number: 9787260Abstract: Power amplifier having staggered cascode layout for enhanced thermal ruggedness. In some embodiments, a radio-frequency (RF) amplifier such as a power amplifier (PA) can be configured to receive and amplify an RF signal. The PA can include an array of cascoded devices connected electrically parallel between an input node and an output node. Each cascoded device can include a common emitter transistor and a common base transistor arranged in a cascode configuration. The array can be configured such that the common base transistors are positioned in a staggered orientation relative to each other.Type: GrantFiled: February 13, 2016Date of Patent: October 10, 2017Assignee: Skyworks Solutions, Inc.Inventor: Philip John Lehtola
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Patent number: 9787256Abstract: An amplifier circuit having an improved inter-stage matching network and improved performance. In one embodiment, an RF signal source having an output impedance ZSOURCE is approximately impedance matched through an inductive tuning circuit to a power amplifier having an input impedance ZPA. The inductive tuning circuit includes a tunable capacitor element C1 and inductive elements L1, L2, which may be fabricated as stacked conductor coils. Since the capacitance of C1 is tunable, impedance matching is available over a broad range of RF frequencies. Also provided are DC isolation between the RF signal source and the power amplifier, coupling of a voltage source to the output of the RF signal source through L1, and coupling of a bias voltage to the input of the power amplifier through L2.Type: GrantFiled: June 16, 2016Date of Patent: October 10, 2017Assignee: Peregrine Semiconductor CorporationInventor: Neil Calanca
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Patent number: 9774298Abstract: According to one embodiment, a high-frequency amplifier includes an active element and an output matching circuit. The active element is provided on a substrate. The active element is configured to amplify a signal having a frequency band. The active element includes a cell region. The output matching circuit is connected to the active element. The output matching circuit includes a wire, a transmission line and an output terminal. The wire includes an input end and an output end. The input end of the wire is connected to an output part of the cell region of the active element. The transmission line is provided on the substrate. The transmission line includes an input part and an output part. The input part of the transmission line is connected to the output end of the wire. The output terminal is provided on the substrate.Type: GrantFiled: February 10, 2016Date of Patent: September 26, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Kenta Kuroda, Kazutaka Takagi
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Patent number: 9768743Abstract: A circuit includes a reference voltage circuit, a filter circuit configured to receive an output of the reference voltage circuit, and a voltage follower configured to receive an output of the filter circuit and generate a bias voltage. The filter circuit is configured to combine signals on a reference ground with the output of the reference voltage circuit. A method of providing a bias voltage includes generating a reference voltage using a reference voltage circuit, filtering the reference voltage to generate a second voltage using a filter circuit, and generating the bias voltage according to the second voltage using a voltage follower circuit. Filtering the reference voltage includes combining a fluctuation of the reference ground with the reference voltage.Type: GrantFiled: June 3, 2015Date of Patent: September 19, 2017Assignee: Marvell International Ltd.Inventors: Sai-Wang Tam, Philip Godoy, Ming He, Renaldi Winoto
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Patent number: 9768689Abstract: Thermal levels in an inductor of a boost converter may be managed by implementing peak current limits for the boost converter. For example, an inductor may be allowed to conduct above a certain peak current limit for a certain period of time before the current is reduced by a controller to a low current limit. The controller may hold the low current limit in place for a certain period of time, after which the current through the inductor is allowed to again exceed the low current limit. However, if the high current limit is again exceeded or sustained for a certain period of time, the low current limit may be again imposed by the controller.Type: GrantFiled: February 18, 2014Date of Patent: September 19, 2017Assignee: CIRRUS LOGIC, INC.Inventors: Ullas Pazhayaveetil, Jeffrey May, Gautham D. Kamath, Michael Kost
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Patent number: 9768741Abstract: A method for improving circuit stability is disclosed. In the method of the present invention, the circuit is analyzed to find the frequency band in which the input impedance at a target node behaves as a negative resistance, and then find the signal path of the frequency band in the matching circuit in front of the target node and add an attenuator in the signal path. This prevents the circuit from oscillation and improves the stability of the circuit. Furthermore, the signal on the main signal path will not be attenuated and the performance of the circuit will be maintained.Type: GrantFiled: January 7, 2016Date of Patent: September 19, 2017Assignee: Airoha Technology Corp.Inventor: Chun-Hsiung Chang
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Patent number: 9768747Abstract: Methods and systems for accurate gain adjustment of a transimpedance amplifier using a dual replica and servo loop is disclosed and may include, in a transimpedance amplifier (TIA) circuit comprising a first TIA, a second TIA, and a third TIA, each comprising a configurable feedback impedance, and a control loop, where the control loop comprises a gain stage with inputs coupled to outputs of the first and second TIAs and an output coupled to the configurable feedback impedance of the second and third TIAs: configuring a gain level of the first TIA by configuring its feedback impedance, configuring a gain level of the third TIA by configuring a reference current applied to an input of the first TIA, and amplifying a received electrical signal to generate an output voltage utilizing the third TIA. The reference current may generate a reference voltage at one of the inputs of the gain stage.Type: GrantFiled: January 18, 2016Date of Patent: September 19, 2017Assignee: Luxtera, Inc.Inventors: Stefan Barabas, Joseph Balardeta, Simon Pang, Scott Denton
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Patent number: 9762189Abstract: Systems and methods are provided for dynamically biasing power amplifiers. In particular, dynamic biasing of a power amplifier may be controlled, with the controlling comprising receiving an input signal that is to be amplified; processing the input signal; generating based on said processing of the input signal input signal, a plurality of control signals comprising at least one biasing control signal; and applying the plurality of control signals to one or more control elements that are used in driving and/or control of the power amplifier. The one or more control elements may comprise at least one biasing component that adjusts biasing applied to power amplifier.Type: GrantFiled: January 23, 2015Date of Patent: September 12, 2017Assignee: MAXLINEAR, INC.Inventors: Rahul Bhatia, Timothy Gallagher, Raja Pullela, Sridhar Ramesh
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Patent number: 9748907Abstract: An output impedance-matching network for an RF power amplifier die includes a harmonic-prevention circuit that functions like a short circuit at a fundamental frequency of the amplifier and an open circuit at a second harmonic frequency of the amplifier. In certain implementations, the harmonic-prevention circuit has one or more parallel, reactive (LC) legs that resonate at the fundamental frequency and a parallel, reactive (capacitive) leg that causes the harmonic-prevention circuit to resonate at the second harmonic frequency. The harmonic-prevention circuit improves power transfer and efficiency of the RF power amplifier.Type: GrantFiled: April 27, 2016Date of Patent: August 29, 2017Assignee: NXP USA, INC.Inventors: Wenming Li, Yunfei Wang, Qi Wu
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Patent number: 9748904Abstract: A high frequency signal amplifying circuitry of an embodiment includes a first splitter, a first amplifier, a second amplifier, a loop oscillation suppressor, and a combiner. The first amplifier includes a second splitter, a first carrier amplifier, a first peak amplifier, and a first combiner. The second amplifier includes a third splitter, a second carrier amplifier, a second peak amplifier, and a second combiner. The second carrier amplifier being adjacent to an associated the first carrier amplifier or the second peak amplifier being adjacent to an associated the first peak amplifier. The loop oscillation suppressor located between the second carrier amplifier and the associated first carrier amplifier or the second peak amplifier and the associated first peak amplifier.Type: GrantFiled: December 18, 2015Date of Patent: August 29, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Kazutaka Takagi, Naotaka Tomita
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Patent number: 9748903Abstract: A device includes an amplifier having a first path and a second path and a first variable attenuator connected to the first path. The device includes a controller coupled to the first variable attenuator. The controller is configured to determine a magnitude of an input signal to the amplifier. When the magnitude of the input signal is below a threshold, the controller is configured to set an attenuation of the first variable attenuator to a first attenuation value. When the magnitude of the input signal is above the threshold, the controller is configured to set the attenuation of the first variable attenuator to a second attenuation value. The second attenuation value is less than the first attenuation value.Type: GrantFiled: August 7, 2015Date of Patent: August 29, 2017Assignee: NXP USA, INC.Inventors: Joseph Staudinger, Ramanujam Srinidhi Embar
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Patent number: 9748902Abstract: In various embodiments, a semiconductor package includes a carrier amplifier connected to a first output of a power divider, and a first output matching network connected to the carrier amplifier and an output combining node. The first output matching network exhibits a phase delay during operation of the carrier amplifier. The semiconductor package includes a phase advance network connected to the first output matching network. The phase advance network is configured to offset at least a portion of the phase delay of the first output matching network. The semiconductor package includes a peaking amplifier connected to a second output of the power divider and the output combining node, and a second output matching network connected to the peaking amplifier.Type: GrantFiled: May 15, 2015Date of Patent: August 29, 2017Assignee: NXP USA, INC.Inventors: Maruf Ahmed, Joseph Staudinger