Patents Examined by Hieu P Nguyen
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Patent number: 11349440Abstract: Embodiments relate to a circuit implementation for extending the bandwidth of an amplifier. The extended bandwidth amplifier includes an amplifier coupled between an input node and an output node of the extended bandwidth amplifier. The amplifier has an input capacitance and an output capacitance. The extended bandwidth amplifier additionally includes a first digitally-trimmable negative-capacitance capacitor coupled between the input node of the extended bandwidth amplifier and a power supply terminal. The digitally-trimmable negative-capacitance capacitor includes a first branch, a second branch, and a controller. The first branch includes a first capacitor having a first negative capacitance, and a first switch. The second branch includes a second capacitor having a second negative capacitance, and a second switch. The controller is configured to turn on the first switch and the second switch based on the input capacitance of the amplifier.Type: GrantFiled: September 25, 2020Date of Patent: May 31, 2022Assignee: Apple Inc.Inventors: Aly Ismail, Amr O Haggag
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Patent number: 11336237Abstract: Examples disclosed herein relate to a vector modulator architecture, having an input splitter network configured to receive a radio frequency (RF) input signal and generate a plurality of quadrature signals at different phases, a variable gain amplifier (VGA) stage coupled to the input splitter network and configured to apply a first gain to one or more of the plurality of quadrature signals, a power combiner coupled to the VGA stage and configured to combine the plurality of quadrature signals into a combined RF signal, and a power amplifier (PA) stage coupled to the power combiner and configured to apply a second gain to the combined RF signal and generate an output RF signal. Other examples disclosed herein relate to an antenna system for autonomous vehicles and a radar system for use in an autonomous driving vehicle.Type: GrantFiled: September 18, 2019Date of Patent: May 17, 2022Inventor: Asmita Dani
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Patent number: 11329617Abstract: Class-D amplifiers and modulators therefor provide control of the DC operating point of the outputs of the amplifiers. The modulators generate a sum and difference signal using combiners and introduce the sum signal to a reference input of the quantizer, while the quantization input of the quantizer receives the difference signal. A difference mode loop filter circuit may filter the difference signal and a common mode loop filter may filter the sum signal. Outputs of the quantizer operate a pair of switching circuits to provide either a differential output with the sum signal set to a constant voltage and the difference signal provided by the signal to be reproduced, or a pair of single-ended outputs with the individual input signals used to generate the sum and difference signal, and selection of a differential or dual single-ended operating mode may be performed by a control circuit that reconfigures the combiners.Type: GrantFiled: January 19, 2021Date of Patent: May 10, 2022Assignee: CIRRUS LOGIC, INC.Inventors: Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
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Patent number: 11329610Abstract: The present invention generally relates to a structure and method of audio amplifier with power feedback, including a power amplifying unit, a loud-speaker, a current sensing unit, a voltage sensing unit and a multiplying unit. The power amplifying unit includes an input side and an output side, the input side inputs an audio voltage signal, and the loudspeaker is electrically connected to an output side of the power amplifying unit. The current sensing unit is electrically connected to the output side of the power amplifying unit and senses the output current of the power amplifying unit and then converts it into a current control voltage signal. The voltage sensing unit is electrically connected to the output side of the power amplifying unit, and senses the output voltage of the power amplifying unit to form an output sensing voltage signal.Type: GrantFiled: November 7, 2019Date of Patent: May 10, 2022Inventor: Chung-Fu Chou
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Patent number: 11329612Abstract: An interface cell for circuit adjustment can be structured to adjust parameters of a circuit of an integrated circuit. The interface cell can be implemented in a small area on a die for the integrated circuit. The interface cell can be arranged for circuit adjustment, such as post package trim of the circuit. The interface cell can include a control device and a low voltage circuit. The control device can be implemented as a single device, or a device having a limited number of additional components, that interfaces a high voltage domain to a low voltage domain of the low voltage circuit. The control device can be enabled to provide the signals to the low voltage circuit of the interface cell to adjust parameters of the circuit and can be disabled to isolate the circuit from the interface cell after providing the signals to the low voltage circuit.Type: GrantFiled: November 27, 2019Date of Patent: May 10, 2022Assignee: Analog Devices International Unlimited CompanyInventors: Jeffry Alan Cox, John Kenneth Fiorenza, Greg L. Disanto
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Patent number: 11323078Abstract: A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.Type: GrantFiled: August 6, 2020Date of Patent: May 3, 2022Assignee: pSemi CorporationInventors: Dan William Nobbe, David Halchin, Jeffrey A. Dykstra, Michael P. Gaynor, David Kovac, Kelly Michael Mekechuk, Gary Frederick Kaatz, Chris Olson
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Patent number: 11323083Abstract: An amplifier circuit has: a first amplifier circuit, including a chopper circuit amplifying a first differential signal input between first and second input terminals to output a second differential signal; and a second amplifier circuit amplifying the second differential signal to output a single-ended signal. The second amplifier circuit includes: a first circuit including first and second transistors, the first circuit being connected to the first amplifier circuit so that the second differential signal input into gates of these transistors, the first circuit converting the second differential signal to a current flowing into a first node connected to the first transistor and a current flowing into a second node connected to the second transistor; and a second circuit negatively feeding back a voltage at the second node so that the difference in voltage between these nodes is reduced. The second amplifier circuit outputs the single-ended signal from the first node.Type: GrantFiled: September 23, 2020Date of Patent: May 3, 2022Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventor: Yusuke Tokunaga
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Patent number: 11323082Abstract: A class-D amplifier configured to adjust at least one input signal to at least one output signal. The class-D amplifier comprises: a loop filter, configured to receive the input signal; a PWM circuit, configured to generate at least one PWM signal; a summing circuit, coupled between an output of the loop filter and an input of the PWM circuit; an output circuit operating at a supply voltage, configured to generate the output signal responding to the PWM signal; and a supply voltage filter, configured to monitor the supply voltage to generate a filtered signal to the summing circuit. The summing circuit is configured to sum the output of the loop filter and the filtered signal to adjust a common-mode level of the input of the PWM circuit.Type: GrantFiled: August 10, 2020Date of Patent: May 3, 2022Assignee: Elite Semiconductor Microelectronics Technology Inc.Inventors: Yang-Jing Huang, Shao-Ming Sun, Jhe-Jia Jhang
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Patent number: 11316477Abstract: Described are concepts, systems, circuits and techniques directed toward methods and apparatus for generating one or more pulse width modulated (PWM) waveforms with the ability to dynamically control pulse width and phase with respect to a reference signal.Type: GrantFiled: July 17, 2020Date of Patent: April 26, 2022Assignee: Massachusetts Institute of TechnologyInventors: Alexander Sergeev Jurkov, David J. Perreault
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Patent number: 11316483Abstract: Provided is an input voltage endurance protection architecture applied to a high-voltage operational amplifier with high input amplitude and high linearity. The input voltage endurance protection architecture includes three parts: a main operational amplifier, an auxiliary operational amplifier and an input stage voltage endurance protection circuit. The main operational amplifier is a high-voltage general-purpose operational amplifier, the auxiliary operational amplifier is a single-stage differential amplifier, and the single-stage differential operational amplifier is connected to a degeneration resistor Rbias. In addition, the auxiliary operational amplifier has a same connection method as the main operational amplifier at a positive input terminal and a negative input terminal, and both the positive input terminal and the negative input terminal are protected by an input stage voltage endurance protection circuit and receive and process input signals simultaneously.Type: GrantFiled: December 9, 2019Date of Patent: April 26, 2022Assignee: 3PEAK INC.Inventor: Qingfeng Liu
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Patent number: 11309855Abstract: A circuit has an input and a two-wire output. The circuit is designed for use with HTPE transducers and comprised of four stages. The first stage is a charge amplifier based on operational amplifier, the second stage is a 1-pole passive low-pass filter, the third stage is an active 2-pole low-pass filter based on two JFETs, and the fourth stage is an emitter follower comprising two bipolar junction transistors connected to each other in Darlington configuration.Type: GrantFiled: February 23, 2020Date of Patent: April 19, 2022Assignee: Meggitt (Orange County), Inc.Inventors: Felix A. Levinzon, Margie Mattingly
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Patent number: 11309853Abstract: A class-D amplifier includes a first differential modulator circuit, a first driver circuit including a first high-side switch and a first low-side switch. An input of the first driver circuit may be coupled to a first output of the first differential modulator circuit so that the first differential modulator circuit controls the first driver circuit. The class-D amplifier may also include a second driver circuit including a second high-side switch and a second low-side switch coupling the second and control logic that selects between a single-ended operating state and a differential operating state of the class-D amplifier circuit. The control logic may selectively determine the input of the second driver circuit in conformity with a current operating state of the class-D amplifier circuit so that the first differential modulator circuit controls the second driver circuit when the differential operating state is selected.Type: GrantFiled: January 29, 2021Date of Patent: April 19, 2022Assignee: CIRRUS LOGIC, INC.Inventors: Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
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Patent number: 11303257Abstract: A current sensor integrated circuit to sense a current through a resistor includes a substrate, a tub disposed in the substrate, an analog front end disposed in the tub and comprising an amplifier having inputs coupled across the resistor and a charging circuit configured to bias the analog front end and the tub to a bias voltage that is a predetermined offset voltage greater than a common mode voltage associated with the resistor. In embodiments, the analog front end is biased to a first bias voltage and the tub is biased to a second, different bias voltage.Type: GrantFiled: March 27, 2019Date of Patent: April 12, 2022Assignee: Allegro MicroSystems, LLCInventors: Steven Daubert, David J. Haas, Craig S. Petrie, Milan Valenta, Roman Prochazka, Richard Stary, Sina Haji Alizad
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Patent number: 11303252Abstract: Systems, methods, and apparatuses for improving reliability and/or reducing the likelihood of breakdown of an amplifier or a component thereof. A system can include a sensing circuit electrically coupled to a transistor of the amplifier and configured to sense an AC voltage associated with the transistor. A protection circuit can be electrically coupled to the sensing circuit and the amplifier and can be configured to supply a DC voltage to the transistor of the amplifier based on the AC voltage sensed by the sensing circuit.Type: GrantFiled: September 25, 2019Date of Patent: April 12, 2022Assignee: Analog Devices International Unlimited CompanyInventor: Mohamed Moussa Ramadan Esmael
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Patent number: 11303249Abstract: A consecutive Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier, a power splitter, a peak amplifier, and a phase compensator. The carrier amplifier receives a radio frequency signal with interposing any signal splitters. The power splitter splits an output of the carrier amplifier into first and second split signals. The phase compensator transfers the second split signal to the peak amplifier. The first split signal is combined with the output of the peak amplifier.Type: GrantFiled: September 8, 2020Date of Patent: April 12, 2022Assignee: Sumitomo Electric Device Innovations, Inc.Inventors: Andrey Grebennikov, James Wong, Naoki Watanabe
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Patent number: 11296663Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated.Type: GrantFiled: May 1, 2020Date of Patent: April 5, 2022Assignee: Cirrus Logic, Inc.Inventors: Ramin Zanbaghi, Cory J. Peterson, Anand Ilango, Eric Kimball
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Patent number: 11296659Abstract: A bi-directional amplifier (BDA) comprises a first pair of amplifier transistors and a second pair of amplifier transistors, wherein the first pair of amplifier transistors are cross-coupled with the second pair of amplifier transistors, and wherein the first pair of amplifier transistors and the second pair of amplifier transistors each comprise a differential common-emitter (CE) pair (or common-source (CS) pair) with equal transistor size or different transistor size. The BDA further comprises a plurality of blocking capacitors to decouple the collector and the base biases of the first pair of amplifier transistors and the second pair of amplifier transistors. Alternatively or additionally, the BDA further comprises two input/output baluns, through which a common voltage bias is applied to the collectors of each of the differential CE pairs (or drains of CS pairs in some implementations). The baluns enable single-ended measurement and characterization.Type: GrantFiled: March 20, 2019Date of Patent: April 5, 2022Assignee: Georgia Tech Research CorporationInventors: Yunyi Gong, Moon-Kyu Cho, John D. Cressler, Ickhyun Song
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Patent number: 11296657Abstract: A digital predistorter comprising a first predistorter for generating out-of-band and inter-band distortion components for compensating for the static nonlinearity of a nonlinear element, and a second predistorter cascaded with the first predistorter, the second predistorter compensating for the in-band distortion of the nonlinear device wherein the cascade of the first predistorter and the second predistorter compensate for in-band, out-of-band and inter-band distortions when the cascade of the first, the second predistorter and the nonlinear element are driven with multiband signals.Type: GrantFiled: February 15, 2018Date of Patent: April 5, 2022Inventors: Fadhel Ghannouchi, Andrew Kwan, Mayada Younes, Mohamed Helaoui
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Patent number: 11290064Abstract: An amplifier for a receiver circuit is disclosed. The amplifier has an input node (Vin) and an output node (Vout). It comprises a tunable tank circuit connected to the output node (Vout), a feedback circuit path connected between the output node (Vout) and the input node (Vin), and a tunable capacitor connected between an internal node of the feedback circuit path and a reference-voltage node. A receiver circuit and a communication apparatus is disclosed as well.Type: GrantFiled: April 28, 2020Date of Patent: March 29, 2022Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (publ)Inventor: Fenghao Mu
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Patent number: 11290061Abstract: An amplifier circuit including an input amplifier, an output amplifier and a diode device is provided. The output amplifier includes a PMOSFET and an NMOSFET. The PMOSFET has a gate electrode serving as a first input end and a drain coupled to an output end. The NMOSFET has a gate electrode serving as a second input end and a drain coupled to the output end. The output amplifier outputs an output voltage at the output end, and is coupled to the input amplifier via at least one of the first and second input ends. The diode device is coupled between the output end and the at least one of the first and second input ends of the output amplifier. When a voltage difference between the output end and the at least one of the first and second input ends of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced.Type: GrantFiled: July 15, 2020Date of Patent: March 29, 2022Assignee: Novatek Microelectronics Corp.Inventors: Chia-Wei Su, Ju-Lin Huang, Keko-Chun Liang