Abstract: A differential to single-ended buffer amplifier with a swing suppression resistor in the differential amplification architecture is shown. The differential to single-ended buffer amplifier has a positive input terminal, a negative input terminal, a differential to single-ended operational amplifier (DISO op amp), and a swing suppression resistor. The DISO op amp has a non-inverting input terminal and an inverting input terminal respectively coupled to the positive input terminal and the negative input terminal, and it has a single-ended output terminal that outputs the output signal of the differential to single-ended buffer amplifier. The swing suppression resistor is connected between the negative input terminal of the differential to single-ended buffer amplifier and the non-inverting input terminal of the DISO op amp.

Abstract: Provided are an input matching circuit, at least one amplifying transistor that receives a signal from the input matching circuit, a first dummy transistor that receives a signal from the input matching circuit, a second dummy transistor that receives a signal from the input matching circuit, and an output matching circuit that outputs an output of the amplifying transistor, the amplifying transistor being arranged between the first dummy transistor and the second dummy transistor, the amplifying transistor, the first dummy transistor, and the second dummy transistor being provided in a row along the input matching circuit.

Abstract: An amplifier system may include a first stage having a plurality of inputs configured to receive a differential pulse-width modulation input signal and generate an intermediate signal based on the differential pulse-width modulation input signal, a quantizer configured to generate a modulated signal based on the intermediate signal, a single-ended class-D output stage configured to generate a single-ended output signal as a function of the differential pulse-width modulation input signal, a feedback network configured to feed back the single-ended output signal to a first input of the plurality of inputs and to feed back a ground voltage to a second input of the plurality of inputs, a plurality of buffers, each particular buffer configured to receive a respective component of the differential pulse-width modulation input signal and generate a respective buffered component, and an input network coupled between the plurality of buffers and the first stage.

Abstract: A switch circuit provides a first output signal and a second output signal for switching between ternary modulation and quaternary modulation for a target device. A first output signal is provided from one of a first signal, a second signal and a ground signal according to an input signal and a duty signal, wherein the first signal is generated through performing a one-bit left-shift operation for the input signal, and the second signal is generated through adding the input signal and the duty signal. A second output signal is provided from one of a third signal, a fourth signal and the ground signal according to the input signal and the duty signal, wherein the third signal is generated through subtracting the input signal from the duty signal, and the fourth signal is generated through performing a two's-complement transformation and the one-bit left-shift operation for the input signal.

Abstract: A receiving circuit may include a first amplifying circuit, a second amplifying circuit, a third amplifying circuit, and a feedback circuit. The first amplifying circuit amplifies a first input signal and a second input signal to generate a first amplified signal and a second amplified signal, respectively. The second amplifying circuit amplifies the first amplified signal and the second amplified signal to generate a first preliminary output signal and a second preliminary output signal, respectively. The third amplifying circuit amplifies the first preliminary output signal and the second preliminary output signal to generate a first output signal and a second output signal, respectively. The feedback circuit changes voltage levels of the first amplified signal and the second amplified signal based on a current control signal, the first output signal, and the second output signal.

Abstract: A radio-frequency circuit includes: an amplifier; a matching circuit connected to an output side of the amplifier; and a power splitter connected to an output side of the matching circuit. The power splitter includes a differential inductor and a resistor element. The differential inductor includes an input node (ni), a first line, and a second line. The input node (ni) is connected to the matching circuit. The first line and the second line are respectively wound into coil form and connected to the input node (ni). The resistor element forms a connection between a node (n1) on an output side of the first line and a node (n2) on an output side of the second line. The first line and the second line are wound in opposite directions and have the same coil axis.

Abstract: A power management integrated circuit (PMIC) can improve the ramp up speed of a boost converter with the inclusion of a controllable switch that may modify the connection of an output capacitor to reduce the ramp time as the output voltage is ramping to a desired boost setpoint. The switch may be controlled using jump start logic to switch a first plate or terminal of the output capacitor from a ground connection to a voltage supply connection. Once a threshold voltage is reached, the first plate of the capacitor may be switched from the supply voltage to ground. In certain cases, by switching the connection of the output capacitor between ground and a supply voltage based on one or more threshold voltages or a boost setpoint, the time to ramp from an initial voltage to a desired boost setpoint may be reduced.

Abstract: The various embodiments described herein include methods, devices, and systems for fabricating and operating superconducting circuitry. In one aspect, an amplification circuit includes: (1) a superconducting component; (2) an amplifier coupled in parallel with the superconducting component such that the superconducting component is in a feedback loop of the amplifier; (3) a voltage source coupled to a first input of the amplifier; (4) one or more resistors coupled to a second input of the amplifier; and (5) an output terminal coupled to an output of the amplifier.

Abstract: Input unit to which a voltage is applied, current output unit that outputs a high level current or a low level current in response to the voltage applied to input unit, and stochastic circuit unit that, in response to the voltage applied to input unit, changes a probability that the high level current or the low level current is output from current output unit, in accordance with a sigmoid function used in a mathematical model of a neural activity are included.

Abstract: An amplifier includes a transistor, an input circuit coupled between an amplifier input and a transistor input terminal, and an output circuit coupled between a transistor output and a transistor output terminal. The input circuit includes an input-side harmonic termination circuit with a first inductor and a first capacitance in series between the transistor input terminal and ground. The output circuit includes a second inductor, an output-side harmonic termination circuit, and a shunt-L circuit. The second inductor is coupled between the transistor output terminal and the amplifier output. The output-side harmonic termination circuit includes a third inductor and a second capacitance in series between the amplifier output and ground. The shunt-L circuit includes a fourth inductor and a third capacitance connected in series between the amplifier output and ground.

Abstract: A digitally modulated polar power amplifier uses a thin-oxide amplifying transistor with a protection diode. The polar power includes a driver amplifier in a driver stage that can receive a phase-modulated signal with a constant envelope and amplify the signal for the output stage, which includes only a single thin-oxide transistor, leading to improved efficiency over systems that require a thick-oxide transistor. A protection diode can be added between the output of the polar power amplifier and the supply voltage to limit the output to the sum of the supply voltage plus the forward voltage of the diode. Amplitude modulation can be achieved through dynamically turning on and off the digital power amplifier via an amplitude control word (acw) input signal.

Abstract: A neural-signal amplifier includes an amplifier, a switched-capacitor circuit-input unit, a switched-capacitor feedback-circuit unit, and a switched-capacitor circuit-output unit. Each of the switched-capacitor circuit-input unit, the switched-capacitor feedback-circuit unit, and the switched-capacitor circuit-output unit includes a plurality of differential switches, a plurality of common mode switches, and a plurality of capacitors. By controlling the switches to turn on or performing the switched-capacitor operation, the neural-signal amplifier is controlled to suppress the DC drift and reconstruct the DC input of the common-mode power supply.

Abstract: Equalizing an input signal according to a receiver equalizer peaking circuit having a capacitor FET (CFET) providing a capacitive value and a resistor FET (RFET) providing a resistive value, generating a capacitor control voltage at a gate of the CFET using a capacitor controller DAC based on a first reference voltage, and a RFET control voltage at a gate of the RFET using a resistor controller DAC based on a second reference voltage, generating the first reference voltage using a replica input FET, the first reference voltage varying according to a threshold voltage (Vt) of an input FET, providing the first reference voltage to the capacitor controller DAC, generating the second reference voltage using a replica RFET, the second reference voltage varying with respect to the first reference voltage and a Vt of the replica of the RFET, and providing the second reference voltage to the resistor controller DAC.

Abstract: An audio processor circuit includes a storage circuit, a digital-to-analog converter circuit, and an amplifier circuit. The storage circuit is configured to store digital audio data from an electrical device. The digital-to-analog converter circuit is configured to convert the digital audio data from the storage circuit into an analog audio signal. The amplifier circuit is configured to provide an output audio signal to an audio playing circuit according to the analog audio signal. If a total data volume of the digital audio data stored in the storage circuit is not a multiple of a throughput or the total data volume of the digital audio data stored in the storage circuit is equal to or greater than an upper limit value, the amplifier circuit is turned off such that the amplifier circuit stops providing the output audio signal to the audio playing circuit.

Abstract: Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain “droop” due to self-heating using a Sample and Hold (S&H) circuit. The S&H circuit samples and holds an initial temperature of the PA at commencement of a pulse. Thereafter, the S&H circuit generates a continuous measurement that corresponds to the temperature of the PA during the remainder of the pulse. A Gain Control signal is generated that is a function of the difference between the initial temperature and the operating temperature of the PA as the PA self-heats for the duration of the pulse. The Gain Control signal is applied to one or more adjustable or tunable circuits within a PA to offset the Gain droop of the PA.

Abstract: A class-D amplifier with low pop-click noise is shown. A loop filter, a control signal generator, a first power driver, and a first feedback circuit are provided within the class-D amplifier to establish a first loop for signal amplification. The class-D amplifier further has a settling circuit and a pre-charging circuit. The settling circuit is configured to be combined with the loop filer and the control signal generator to establish a second loop to settle the loop filter and the control signal generator before the first loop is enabled. The pre-charging circuit is configured to pre-charge a positive output terminal and a negative output terminal of the first power driver.

Abstract: An output stage circuit comprising a bias voltage generator, a first amplifier circuit and a second amplifier circuit is provided. The bias voltage generator is coupled to an output terminal of the output stage circuit to generate a bias voltage according to an output voltage of the output terminal. The first amplifier circuit is coupled to the output terminal, a first power supply terminal and the bias voltage generator, receives a first pre-driving signal, a first predetermined voltage and the bias voltage, and determines whether to transmit a first voltage to serve as the output voltage. The second amplifier circuit is coupled to the output terminal, a second power supply terminal and the bias voltage generator, receives a second pre-driving signal, a second predetermined voltage and the bias voltage, and determines whether to transmit a second voltage to serve as the output voltage.

Abstract: The present invention is a system and method for providing a charge detector that utilizes small feedback capacitors in a low-noise, high-gain, system that combines a differential topology in a solid-state amplifier implemented in a complementary metal-oxide semiconductor (CMOS) process with active reset, thereby achieving high dynamic range and robust operations. A custom optoelectronic system is used to measure gain, and while operating at a sampling frequency of 10 kHz, the active reset extends the dynamic range of the charge detector.

Abstract: A circuit having an input and an output, the circuit comprising: a first amplifier having a first input, a second input and an output coupled to the output of the circuit; a first capacitor having a first terminal coupled to the first input of the first amplifier and a second terminal coupled to the output of the first amplifier; a first resistor having a first terminal coupled to the first input of the first amplifier and a second terminal; a buffer having an output coupled to the second terminal of the first resistor and an input; a second resistor having a first terminal coupled to the output of the first amplifier and a second terminal coupled to the input of the buffer; a second capacitor coupled between the input of the buffer and ground; and a third resistor coupled between the input of the buffer and the input of the circuit.

Abstract: A multi-voltage generation circuit and related envelope tracking (ET) amplifier apparatus is provided. In one aspect, a multi-voltage generation circuit is configured to generate a number of ET target voltages based on an analog voltage signal. In another aspect, a multi-amplifier ET circuit can be configured to include a number of amplifier circuits for amplifying concurrently a radio frequency (RF) signal based on a number of ET voltages. The multi-amplifier ET circuit also includes a number of driver circuits configured to generate the ET voltages base on a number of ET target voltages. In this regard, the multi-voltage generation circuit can be provided in the multi-amplifier ET circuit to generate the ET target voltages based on the analog voltage signal that corresponds to the RF signal. In examples discussed herein, the driver circuits are co-located with the amplifier circuits to help improve efficiency and maintain linearity in the amplifier circuits.