Abstract: An audio amplifier system is described herein, comprising: an amplifier adapted to amplify an audio signal and comprising an output enable/disable input, the amplifier further adapted to receive an output enable signal at the output enable/disable input that enables/disables an output of the amplifier; a Zobel network connected to the output of the audio amplifier and comprising a Zobel capacitor and a Zobel resistor arranged such that they form a high pass frequency filter function and wherein the Zobel network is adapted to be substantially resistive when a frequency of an audio signal output from the audio amplifier is within a first frequency range; a mirroring resistor connected in parallel to the Zobel resistor and adapted to mirror a power that is dissipated in the Zobel resistor, and wherein a printed circuit board upon which the mirroring resistor is located is adapted to conduct heat generated by the mirroring resistor; a negative temperature coefficient (NTC) resistor located in close proximity to

Abstract: A power amplifier includes a transistor, a temperature sensor and a filter. The transistor is used to receive a bias signal and amplify a radio frequency (RF) signal. The temperature sensor is arranged in proximity to the transistor, and is used to detect a temperature of the transistor to provide a voltage signal at a control node accordingly. The filter is coupled to the temperature sensor and is used to filter the voltage signal to generate a filtered voltage. The bias signal is adjusted according to the filtered voltage.

Abstract: A negative feedback inductor and a gate inductor are formed in different wiring layers of a substrate so as to be at least partially overlapped with each other in a plan view. When the lower wiring layer is thinner and the upper wiring layer is thicker, the negative feedback inductor Lc is formed in the lower wiring layer that is thinner.

Abstract: Fast envelope tracking systems are provided herein. In certain embodiments, an envelope tracking system for a power amplifier includes a switching regulator and a differential error amplifier configured to operate in combination with one another to generate a power amplifier supply voltage for the power amplifier based on an envelope of a radio frequency (RF) signal amplified by the power amplifier. The envelope tracking system further includes a differential envelope amplifier configured to amplify a differential envelope signal to generate a single-ended envelope signal that changes in relation to the envelope of the RF signal. Additionally, the differential error amplifier generates an output current operable to adjust a voltage level of the power amplifier supply voltage based on comparing the single-ended envelope signal to a reference signal.

Abstract: A class-D amplifier with good signal-to-noise ratio (SNR) performance is shown. The class-D amplifier includes a loop filter, a pulse-width modulation signal generator, a gate driver, a power driver, and a feedback circuit, which are configured to establish a closed amplification loop. The feedback circuit is configured to establish a feedback path. The class-D amplifier further includes a feedback breaker. The feedback breaker breaks the feedback path in response to conditions in which there no-signal information in the class-D amplifier.

Abstract: Superconducting output amplifiers (OAs) including compound direct current-superconducting quantum interference devices (DC-SQUIDs) having both inputs driven by an input signal having the same phase and related methods are described. An example superconducting OA includes: (1) a first compound DC-SQUID having a first DC-SQUID and a second DC-SQUID, and (2) a second compound DC-SQUID having a third DC-SQUID and a fourth DC-SQUID. The superconducting OA includes a first driver configured to receive a single flux quantum (SFQ) pulse train and amplify a first set of SFQ pulses associated with the SFQ pulse train to generate a first signal for driving the first DC-SQUID and the second DC-SQUID. The superconducting OA further includes a second driver configured to receive the SFQ pulse train and amplify a second set of SFQ pulses associated with the SFQ pulse train to generate a second signal for driving the third DC-SQUID and the fourth DC-SQUID.

Abstract: In some embodiments, an amplifier system can include an amplifier circuit having first and second amplifiers configured to amplify respective first and second portions of an input signal. Each of the first and second amplifiers can include a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the amplifier circuit and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers. The amplifier system can further include a supply circuit configured to provide a non-envelope tracking supply voltage to the output transistor of the cascode stage of the at least one of the first and second amplifiers.

Abstract: Example embodiments relate to push-pull class E amplifiers. One example push-pull class E amplifier includes an input configured for receiving a signal to be amplified. The push-pull class E amplifier also includes an output configured for outputting the signal after amplification. Additionally, the push-pull class E amplifier includes a printed circuit board having a first dielectric layer and a second dielectric layer. Further, the push-pull class E amplifier includes a first amplifying unit and a second amplifying unit. Yet further, the push-pull class E amplifier includes a balun, a capacitive unit, a first line segment, a second line segment, a third line segment, and a fourth line segment. The first line segment and the second line segment are arranged on the first dielectric layer. A combined length of the third line segment and the fourth line segment corresponds to a quarter wavelength of an operational frequency of the amplifier.

Abstract: A power control system for audio power amplifiers, especially in the automotive segment, dynamically controlling the output voltage through the reading of the input and output currents, and other parameters, automatically adjusting the amplifier to the load and to the operation conditions, allowing that the amplifier always operates within the safe operation range.

Abstract: An exemplary system and method is disclosed employing a floating inverter amplifier comprising an inverter-based circuit comprising an input configured to be switchable between a floating reservoir capacitor during a first phase of operation and to a device power source during a second phase of operation. In some embodiments, the floating inverter amplifier is further configured for current reuse and dynamic bias. In other embodiments, the floating inverter amplifier is further configured with a dynamic cascode mechanism that does not need any additional bias voltage. The dynamic cascode mechanism may be used in combination with 2-step fast-settling operation to provide high-gain and high-speed noise suppression operation.

Abstract: A power control method for a charging system includes: detecting a power signal and an input voltage of the power signal; determining a charging protocol supported by the power signal; and determining whether to conduct a power switching circuit or not according to the input voltage of the power signal and the charging protocol supported by the power signal to provide power for an amplifier chip of the charging system.

Abstract: A temperature detector is used to detect a temperature of a circuit under test, and includes a temperature coefficient component, a multiplier, an impedance component and a node. The temperature coefficient component is arranged in proximity to the circuit under test. A control terminal of the multiplier is coupled to a second terminal of the temperature coefficient component. The impedance component is coupled between the second terminal of the temperature coefficient component and the control terminal of the multiplier, or between a second terminal of the multiplier and a third voltage terminal. The node is formed between the second terminal of the temperature coefficient component and the control terminal of the multiplier. A voltage at the node and an amplified detection current flowing to a first terminal of the multiplier are positively correlated to the temperature of the circuit under test.

Abstract: A power amplifier module includes a first transistor that amplifies and outputs a signal, a second transistor that supplies a bias current to a base of the first transistor, and a ballast resistor circuit that is disposed between the base and an emitter of the second transistor and that includes first and second resistive elements and a switching element. The first resistive element is arranged in series on a line connecting the base and the emitter. The first and second resistive elements are series-connected or parallel-connected. When the second resistive element is series-connected to the first transistor, the switching element is parallel-connected to the second resistive element. When the second resistive element is parallel-connected to the first transistor, the switching element is series-connected to the second resistive element. The switching element is switched on/off based on a collector current of the second transistor.

Abstract: Superconducting output amplifiers with interstage filters and related methods are described. An example superconducting output amplifier includes a first superconducting output amplifier stage and a second superconducting output amplifier stage. The superconducting output amplifier may further include a first terminal for receiving a first single flux quantum (SFQ) pulse train and coupling the SFQ pulse train to each of the first superconducting output amplifier stage and the second superconducting output amplifier stage. The superconducting output amplifier may further include an interstage filter comprising a damped Josephson junction (JJ) coupled between the first superconducting output amplifier stage and the second superconducting output amplifier stage, where the interstage filter is arranged to reduce distortion in an output voltage waveform generated by the superconducting output amplifier in response to at least the first SFQ pulse train.

Abstract: An active balun circuit includes first and second transistors having emitters electrically coupled to each other and configured to output differential signals and a circuit element coupled between the connection point of the emitter of the first transistor and the emitter of the second transistor and a reference potential. The impedance of the circuit element at a particular frequency of the input signal appears significantly larger than impedances at other frequencies. An input signal from an input terminal is inputted to the base of the first transistor. The reference potential is applied to the base of the second transistor. A supply voltage is applied to the collector of the first transistor and the collector of the second transistor. A signal from the collector of the first transistor and a signal from the collector of the second transistor are outputted as the differential signals.

Abstract: Various techniques are provided to reduce common mode disturbance associated with an amplifier, such as a class D amplifier. In one example, an amplifier includes a power stage configured to generate first and second PWM signals. The amplifier further includes an integration stage comprising input nodes configured to receive an input differential analog signal. The integration stage is configured to generate an output differential analog signal in response to the PWM signals and the input differential analog signal. The amplifier further includes an active compensation circuit configured to provide a compensation signal to the integration stage to reduce disturbances at the input nodes associated with the PWM signals switching between a common mode and a differential mode. Additional devices, systems, and methods are also provided.

Abstract: A receiver includes an amplification block supporting carrier aggregation (CA). The amplification block includes a first amplifier circuit configured to receive a radio frequency (RF) input signal at a block node from an outside source, amplify the RF input signal, and output the amplified RF input signal as a first RF output signal. The first amplifier circuit includes a first amplifier configured to receive the RF input signal through a first input node to amplify the RF input signal, and a first feedback circuit coupled between the first input node and a first internal amplification node of the first amplifier to provide feedback to the first amplifier.

Abstract: In a distributed amplifier, a plurality of cascode amplifiers connected in parallel between an input side transmission line and an output side transmission line are provided, a transmission line is connected to an input terminal of an output transistor of each of the amplifiers, and a bias potential is applied from a bias circuit to the input terminal of the output transistor via the transmission line.

Abstract: This application describes time-encoding modulator circuitry (200), and in particular a PWM modulator suitable for use for a class-D amplifier. A forward signal path receives a digital input signal (Din) and outputs an output PWM signal (Sout) and includes a first PWM modulator (101). A feedback path provides feedback to an input of the first PWM modulator (101). The feedback path includes an ADC (203) which receive a first PWM signal (Sa) derived from the output PWM signal. The ADC (203) includes a second PWM modulator (401) which generates a second PWM signal (Sb) based on the first PWM signal. A controller (201) controls the second PWM modulator such that a PWM carrier of the second PWM signal is phase and frequency matched to a PWM carrier of the output PWM signal.

Abstract: Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.