Patents Examined by Hoa B. Trinh
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Patent number: 6454786Abstract: Novel methods and devices which provide enhanced mixing and application of two liquid components to form a biomaterial with minimized aerosols is achieved using air flow rates below about 1.25 liters/minute in combination with a ratio of air flow to total liquid flow of from about 150:1 up to about 1500:1. Preferably the air flow is below about 1 liter/minute and the ratio of air flow to total liquid flow is from about 200:1 to about 1200:1. The parameters are ideally suited for the spray application of components which form a surgical sealant, e.g., a fibrin sealant. Also a part of the present invention are novel application methods for biomaterial, e.g., surgical sealant, components at liquid flows below 1.9 ml/minute, novel methods involving the mixing of such components on the exit surface of a spray tip or nozzle, novel spray tips and biomaterial applicators and methods for making such applicators.Type: GrantFiled: November 14, 1997Date of Patent: September 24, 2002Assignee: Bristol-Myers Squibb CompanyInventors: Niels Erik Holm, Steven Linnebjerg, Richard Cornwell
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Patent number: 6455408Abstract: A semiconductor device including a semiconductor integrated circuit chip having a semiconductor substrate, a plurality of chip pads positioned on a surface of the substrate, a passivation layer formed on the substrate and having openings to expose the chip pads. A first polymer layer is formed on the passivation layer, a patterned first under barrier metal (UBM) layer formed on the chip pads and the first polymer layer, a plurality of redistribution pattern formed on the first UBM, with each redistribution pattern having a concave pattern in a bump pad area. A second polymer layer is formed on the first polymer layer and the redistribution pattern, the second polymer layer having openings for exposing the bump pad areas, a second under barrier metal (UBM) formed on the bump pads. A plurality of solder bumps is formed on the second UBM and electrically connected to the redistribution pattern in the bump pad area.Type: GrantFiled: September 28, 2000Date of Patent: September 24, 2002Assignee: Samsung Electronics Co., Ltd.Inventors: Chan Seung Hwang, Seung Ouk Jung
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Patent number: 6451036Abstract: An elongate tubular body extends between a rotatable cutter and a control. The cutter is connected to the control with a rotatable element. A vacuum is applied through an annular passage defined between the tubular body and the rotatable element. The cutter has at least one radial projection which cooperates with at least one stationary element on the tubular body to cut material drawn into the tubular body. Material that has been processed by the cutter is aspirated through the tubular body for disposal.Type: GrantFiled: June 12, 2000Date of Patent: September 17, 2002Assignee: Endicor Medical, Inc.Inventors: Harold A. Heitzmann, John S. Honeycutt, Paul Taylor
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Patent number: 6451033Abstract: Connectors are provided for making connections between tubular conduits in medical procedures such as those involving treatment of a patient's circulatory system. The connectors are variously configured for making end-to-side or end-to-end connections of tubular conduits. One of the tubular conduits may be a graft conduit, which can be artificial conduit, natural conduit, or a combination of both. The connectors for making end-to-side connections can be generally T-shaped or L-shaped. Various portions of the connectors can attach to the inside or outside of the associated conduit, depending on the connector configuration that is selected.Type: GrantFiled: August 2, 2001Date of Patent: September 17, 2002Assignee: St. Jude Medical ATG, Inc.Inventors: Todd Allen Berg, Thomas J. Bachinski, Alex Alden Peterson, Gregory Alan Boldenow
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Patent number: 6451682Abstract: This invention provides a filming method for covering the surface of the insulating film of a semiconductor substrate with a copper interconnect film free from pores. The surface of the insulating film 2 of a semiconductor substrate 1 is filmed with a copper or copper alloy 3 by any one of plating, CVD and PVD, and the whole body is then heated under a high-pressure gas atmosphere to cover the surface with an interconnect film 4 free from pores.Type: GrantFiled: October 28, 1999Date of Patent: September 17, 2002Assignee: Ulvac, Inc.Inventors: Takao Fujikawa, Makoto Kadoguchi, Kohei Suzuki, Yasushi Mizusawa, Tomoyasu Kondou, Yoji Taguchi
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Patent number: 6448626Abstract: A semiconductor memory device having a plurality of laser fuses is provided. In the semiconductor memory device, the plurality of laser fuses include a first region including the ends of one side of the plurality of laser fuses, a second region including the ends of the other side of the plurality of laser fuses, and a fusing region in which the plurality of laser fuses are fused. Since the laser fuses included in the fusing region are inclined so as to have a predetermined angle with the parts thereof included in the first and the second regions, the overall area and width of the fusing region are reduced.Type: GrantFiled: September 28, 2000Date of Patent: September 10, 2002Assignee: Samsung Electronics Co., Ltd.Inventor: Hong-il Yoon
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Patent number: 6445037Abstract: A trench DMOS transistor cell includes a substrate of a first conductivity type and a body region located on the substrate, which has a second conductivity type. At least one trench extends through the body region and the substrate. An insulating layer lines the trench and a conductive electrode is placed in the trench overlying the insulating layer. A source region of the first conductivity type is located in the body region adjacent to the trench. The source region includes a first layer and a second layer disposed over the first layer. The first layer has a lower dopant concentration of the first conductivity type relative to the dopant concentration of the second layer.Type: GrantFiled: September 28, 2000Date of Patent: September 3, 2002Assignee: General Semiconductor, Inc.Inventors: Fwu-Iuan Hshieh, Koon Chong So, Yan Man Tsui
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Patent number: 6440868Abstract: A semiconductor structure and method for making the same provides a metal gate on a silicon substrate. The gate includes a high dielectric constant on the substrate, and a chemical vapor deposited layer of amorphous silicon on the high k gate dielectric. The metal is then deposited on the CVD amorphous silicon layer. An annealing process forms silicide in the gate, with a layer of silicon remaining unreacted. The work function of the metal gate is substantially the same as a polysilicon gate due to the presence of the CVD amorphous silicon layer.Type: GrantFiled: October 19, 2000Date of Patent: August 27, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Paul R. Besser, Qi Xiang, Matthew S. Buynoski
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Patent number: 6440163Abstract: A connector for use in providing an anastomotic connection between two tubular body fluid conduits in a patient. The connector is preferably a single, integral, plastically deformable structure that can be cut from a tube. The connector has axial spaced portions that include members that are radially outwardly deflectable from other portions of the connector. The connector is annularly enlargeable so that it can be initially delivered and installed in the patient in a relatively small annular size and then annularly enlarged to provide the completed anastomosis. The radially outwardly deflected members of the first and second portions respectively engage the two body fluid conduits connected at the anastomosis and hold those two conduits together in fluid-tight engagement. Apparatus for use in delivering and deploying a connector is also disclosed.Type: GrantFiled: September 17, 2001Date of Patent: August 27, 2002Assignee: St. Jude Medical ATG, Inc.Inventors: William J. Swanson, Mark D. Wahlberg, Jason A. Galdonik, Todd Allen Berg, Scott P. Thome
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Patent number: 6440867Abstract: A semiconductor structure and method for making the same provides a metal gate on a silicon substrate. The gate includes a high dielectric constant on the substrate, and a physical vapor deposited (PVD) layer of amorphous silicon on the high k gate dielectric. The metal is then formed on the PVD amorphous silicon layer. An annealing process forms silicide in the gate, with a layer of silicon remaining unreacted. The work function of the metal gate is substantially the same as a polysilicon gate due to the presence of the PVD amorphous silicon layer.Type: GrantFiled: October 19, 2000Date of Patent: August 27, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Paul R. Besser, Qi Xiang, Matthew S. Buynoski
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Patent number: 6440153Abstract: A system including an adaptor and a syringe is used for facilitating hemostasis of a biopsy tract or other puncture wound by delivery of an absorbable sponge in a hydrated state into the wound. The adaptor includes a tapered lumen for hydrating and compressing the relatively large absorbable sponge for delivery through a relatively small cannula, such as a biopsy needle. The hydrated absorbable sponge is injected through the biopsy needle into the biopsy tract by fluid. Alternatively, the sponge may be delivered to the biopsy needle by injection of fluid and then delivered to the biopsy tract by a plunger or stylet. The implanted absorbable sponge facilitates hemostasis at the biopsy site or other puncture wound and minimizes the chance of internal bleeding. The absorbable sponge material is absorbed by the body over time.Type: GrantFiled: September 14, 2001Date of Patent: August 27, 2002Assignee: Sub-Q, Inc.Inventors: Andrew H. Cragg, Rodney Brenneman, Mark Ashby
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Patent number: 6436840Abstract: A semiconductor structure and method for making the same provides a metal gate on a silicon substrate. The gate includes a high dielectric constant on the substrate, and a chemical vapor deposited layer of amorphous silicon on the high k gate dielectric. A barrier is then deposited on the CVD amorphous silicon layer. A metal is then formed on the barrier. The work function of the metal gate is substantially the same as a polysilicon gate due to the presence of the CVD amorphous silicon layer. The work function is preserved by the barrier during subsequent high temperature processing, due to the barrier which prevents interaction between the CVD amorphous silicon layer and the metal, which could otherwise form silicide and change the work function.Type: GrantFiled: October 19, 2000Date of Patent: August 20, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Paul R. Besser, Matthew S. Buynoski, Qi Xiang
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Patent number: 6432122Abstract: An embolic protection device has a collapsible filter element (105) mounted on a carrier such as a guidewire (101). The filter element (105) collapses into the outer end of a catheter (118) for deployment and retrieval through a vascular system of a patient. The filter element (105) has a collapsible filter body with a proximal inlet end and a distal outlet end. The proximal inlet end has inlet openings sized to allow blood and embolic material enter the filter body. The outlet end has outlet openings which allow through passage of blood but retain embolic material within the filter body. After use, the catheter (118) is movable along the guidewire (101) to engage the proximal end of the filter element and close the inlet openings before sliding over the filter element from the proximal end to the distal end to progressively collapse the filter body on the guidewire (101) for retrieval.Type: GrantFiled: August 6, 2001Date of Patent: August 13, 2002Assignee: Salviac LimitedInventors: Paul Gilson, Eamon Brady, Padraig Maher, David Vale, Charles Taylor
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Patent number: 6429520Abstract: A semiconductor component has local silicon wiring. A first silicon region and a second silicon region are doped with dopants of opposite conductivity. The second silicon region is arranged at least partially over the first silicon region and is separated from it by an insulation layer. The insulation layer is formed with an opening. A conductive layer is disposed at the opening. The conductive layer is composed of a metal, a metal nitride or a combination thereof and connects the first and the second silicon regions electrically to one another.Type: GrantFiled: September 7, 1999Date of Patent: August 6, 2002Assignee: Siemens AktiengesellschaftInventors: Ronald Kakoschke, Regina Stokan
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Patent number: 6429482Abstract: A semiconductor chip includes a semiconductor substrate having a rectifying contact diffusion and a non-rectifying contact diffusion. A halo diffusion is adjacent the rectifying contact diffusion and no halo diffusion is adjacent the non-rectifying contact diffusion. The rectifying contact diffusion can be a source/drain diffusion of an FET to improve resistance to punch-through. The non-rectifying contact diffusion may be an FET body contact, a lateral diode contact, or a resistor or capacitor contact. Avoiding a halo for non-rectifying contacts reduces series resistance and improves device characteristics. In another embodiment on a chip having devices with halos adjacent diffusions, no halo diffusion is adjacent a rectifying contact diffusion of a lateral diode, significantly improving ideality of the diode and increasing breakdown voltage.Type: GrantFiled: June 8, 2000Date of Patent: August 6, 2002Assignee: International Business Machines CorporationInventors: James A. Culp, Jawahar P. Nayak, Werner A. Rausch, Melanie J. Sherony, Steven H. Voldman, Noah D. Zamdmer
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Patent number: 6417547Abstract: The present invention provides a CMOS process, wherein a halo structure can be fabricated without employing an additional lithographic mask for protecting the transistors of the opposite conductivity during a halo implant. The halo implant has a projected range or depth that lies in the range of an LIP implant or a counter-doping implant in the well containing the transistors of the opposite conductivity. The LIP or counter-doping implant effectively cancels the halo impurities.Type: GrantFiled: July 9, 2001Date of Patent: July 9, 2002Assignee: Samsung Electronics Co., Ltd.Inventor: Woo Tag Kang
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Patent number: 6409738Abstract: An apparatus and method for use in raising cattle, and in particular bulls, wherein bulls are: (a) fed a particularly nutritious liquid having a distinctive odor prior to weaning; (b) fed a combination of this liquid and conventional feed after weaning in a feedlot; (c) castrated using a ligation tool that provides a ligating tension to endless elastomeric ligation bands wherein the tool indicates the tension applied to such ligation bands; and (d) treated for infection prevention at least around the time of castration. Accordingly, cattle growth is accelerated due to enhanced nutrition, reduction in disease and a reduction in the stress upon the cattle. Furthermore, late castration of bulls (at approximately 5 to 14 months) is employed, wherein the tool of (c) provides a substantially stress-free ligation technique. Moreover, the meat produced from the cattle processed using the present invention has superior cutability characteristics.Type: GrantFiled: June 6, 2001Date of Patent: June 25, 2002Inventor: Michael P. Callicrate
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Patent number: 6407453Abstract: Disclosed is a semiconductor device, comprising a semiconductor substrate, an insulating layer and a metallic wiring layer formed on the semiconductor substrate; and an intermediate layer formed between the insulating layer and the metallic wiring layer in contact with both the insulating layer and the metallic wiring layer, wherein the intermediate layer contains the metallic material forming the metallic wiring layer, Si and O.Type: GrantFiled: March 9, 2000Date of Patent: June 18, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Tadayoshi Watanabe, Sachiyo Ito, Takamasa Usui, Hisashi Kaneko, Masako Morita, Hirokazu Ezawa
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Patent number: 6399434Abstract: Semiconductor structures having improved dopant configurations are obtained by use of barrier layers containing silicon, nitrogen, and oxygen atoms and having a thickness of about 5 to 50 Å. A doped semiconductor structure with controlled dopant configuration can be formed by: (a) providing a first semiconductor material region, (b) forming an interface layer comprising silicon, oxygen, and nitrogen on the first region, (c) forming a second semiconductor material region on the interface layer, the second semiconductor material region being on an opposite side of the interface layer from the first semiconductor material region, (d) providing a dopant in the second region, and (e) heating the first and second regions whereby at least a portion of the dopant diffuses from the second region through the interface layer to the first region.Type: GrantFiled: April 26, 2000Date of Patent: June 4, 2002Assignee: International Business Machines CorporationInventors: Susan E. Chaloux, Johnathan E. Faltermeier, Ulrike Gruening, Rajarao Jammy, Christopher C. Parks, Paul Parries, Paul A. Ronsheim, Jean-Marc Rousseau
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Patent number: 6399482Abstract: A structure and method for conductive layer and inter-metal dielectric layer is disclosed. Firstly, a conductive layer and an anti-reflection coating layer are formed on a substrate. A photolithography and an etching is then carried out to form conductive structure. Dielectric spacers are then formed on the sidewalls of the conductive structure. An organic dielectric layer is coated on the semiconductor substrate and etched back with the anti-reflection coating layer as stopping layer. The anti-reflection coating layer is then removed. An inorganic dielectric layer and a dielectric cap layer are deposited on the conductive structure and the organic dielectric layer.Type: GrantFiled: October 29, 1999Date of Patent: June 4, 2002Assignee: Worldwide Semiconductor Manufactoring Corp.Inventor: Chine-Gie Lou