Abstract: Systems and techniques relating to storage technologies include, according to an aspect, a data processing apparatus including: a processor; a controller coupled with the processor; a solid state drive coupled with the controller; and a mass storage drive coupled with the controller; wherein at least a portion of the solid state drive and the mass storage drive are virtualized as a single physical storage drive; wherein multiple applications stored in the virtualized single physical storage drive are configured to run on the processor; wherein one or more applications in a hot application group are stored in the solid state drive, and one or more applications in a cold application group are stored in the mass storage drive; and wherein each of the multiple applications is actively monitored and placed in either the hot application group or the cold application group.

Abstract: An application may store data to a dataset comprising a plurality of volumes stored on a plurality of storage systems. The application may request a dataset image of the dataset, the dataset image comprising a volume image of each volume of the dataset. A dataset image manager operates with a plurality of volume image managers in parallel to produce the dataset image, each volume image manager executing on a storage system. The plurality of volume image managers respond by performing requested operations and sending responses to the dataset image manager in parallel. Each volume image manager on a storage system may manage and produce a volume image for each volume of the dataset stored to the storage system. If a volume image for any volume of the dataset fails, or a timeout period expires, a cleanup procedure is performed to delete any successful volume images.

Abstract: An application may store data to a dataset comprising a plurality of volumes stored on a plurality of storage systems. The application may request a dataset image of the dataset, the dataset image comprising a volume image of each volume of the dataset. A dataset image manager operates with a plurality of volume image managers in parallel to produce the dataset image, each volume image manager executing on a storage system. The plurality of volume image managers respond by performing requested operations and sending responses to the dataset image manager in parallel. Each volume image manager on a storage system may manage and produce a volume image for each volume of the dataset stored to the storage system. If a volume image for any volume of the dataset fails, or a timeout period expires, a cleanup procedure is performed to delete any successful volume images.

Abstract: Methods, apparatus and computer program products implement embodiments of the present invention that include conveying first data from local regions of a local volume of a local storage system to a remote storage system having a remote volume with remote regions in a one-to-one correspondence with the local regions. While conveying the first data, a request is received to update a given local region, and the given local region is marked. Subsequent to conveying the first data, a local snapshot referencing the local regions is created, and second data is conveyed from the marked local region to the remote storage system.

Abstract: A method and apparatus for managing write operations in memory. The method includes a memory including units, each of the units including subunits. Data updates are written “out-of-place”, in that new data does not overwrite the memory locations (subunits) where the data is currently stored. The at least one subunit containing the outdated data is marked as invalid. As a result, a subunit can contain up to date data in a valid subunit next to invalid subunits. For reclaiming units for erasure, it is searched amongst the units to identify a unit or units that match a predetermined criterion. The data of valid subunits of such identified unit is rewritten to another unit or units.

Abstract: A hybrid memory has a volatile memory and a non-volatile memory. The volatile memory is dynamically configurable to have a first portion that is part of a memory partition, and a second portion that provides a cache for the non-volatile memory.

Abstract: A method for reducing file-system fragmentation when restoring block-level backups may include (1) identifying a block-level backup stored on a backup storage device, (2) determining, by analyzing metadata contained within the block-level backup, that data contained within the block-level backup was physically arranged in a non-optimized manner on the volume from which the block-level backup was originally created due to file-system fragmentation, (3) identifying a request to restore the block-level backup to a target storage device in a block-by-block manner, (4) determining an optimized physical layout within a file system on the target storage device for the data contained within the block-level backup, and then (5) restoring the block-level backup to the target storage device block-by-block in accordance with the determined optimized physical layout in order to reduce the file-system fragmentation identified in the block-level backup.

Abstract: An embedded hardware-based risk system is provided that has an apparatus and method for the management of unique alpha-numeric order message identifiers within DDR memory space restrictions. The apparatus provides a new design for assigning orders (CLOrID) to memory and the method thereof specifically with the intention to not impact latency until memory is over 90% full.

Abstract: A flash memory controller is provided. The flash memory controller includes a read/write unit, a state machine, a processing unit, and a reserve unit. The read/write unit is coupled to a flash memory. The read/write unit is configured to perform a write command or a read command. The state machine is configured to determine a state of the flash memory controller. The processing unit is coupled to the read/write unit and the state machine. The processing unit is configured to control the read/write unit. The reserve unit is coupled to a first data line, a second data line, and the read/write unit. When the flash memory controller is operating abnormally, the reserve unit receives an external signal via the first data line and the second data line and controls the read/write unit according to the external signal.

Abstract: In response to a memory access request of a processor core that targets a target cache line, the lower level cache of a vertical cache hierarchy associated with the processor core supplies a copy of the target cache line to an upper level cache in the vertical cache hierarchy and retains a copy in a shared coherence state. The upper level cache holds the copy of the target cache line in a private shared ownership coherence state indicating that each cached copy of the target memory block is cached within the vertical cache hierarchy associated with the processor core. In response to the upper level cache signaling replacement of the copy of the target cache line in the private shared ownership coherence state, the lower level cache updates its copy of the target cache line to the exclusive ownership coherence state without coherency messaging with other vertical cache hierarchies.

Abstract: A method for converting a measured physical level of a cell into a logical value, in an array of memory cells storing physical levels which diminish over time, the method may include: determining extent of deterioration of the physical levels and determining thresholds accordingly for at least an individual cell in the array; and reading the individual cell including reading a physical level in said cell and converting said physical level into a logical value using at least some of said thresholds, wherein said determining extent of deterioration comprises storing predefined physical levels rather than data-determined physical levels in each of a plurality of cells and determining extent of deterioration by computing deterioration of said predefined physical levels.

Abstract: Processors and methods for coordinating prefetch units at multiple cache levels. A single, unified training mechanism is utilized for training on streams generated by a processor core. Prefetch requests are sent from the core to lower level caches, and a packet is sent with each prefetch request. The packet identifies the stream ID of the prefetch request and includes relevant training information for the particular stream ID. The lower level caches generate prefetch requests based on the received training information.

Abstract: A system includes a control processor, a non-volatile memory device interface, and a micro-sequencer. The control processor may be configured to receive commands and send responses via a command interface. The non-volatile memory device interface may be configured to couple the system to one or more non-volatile memory devices. The micro-sequencer is generally coupled to (i) the control processor and (ii) the non-volatile memory device interface. The micro-sequencer includes a control store readable by the micro-sequencer and writable by the control processor. In response to receiving a particular one of the commands, the control processor is enabled to cause the micro-sequencer to begin executing at a location in the control store according to the particular command and the micro-sequencer is enabled to perform at least a portion of the particular command according to a protocol of the one or more non-volatile memory devices coupled to the non-volatile memory device interface.

Abstract: An approach to determine a power-on-hour offset for a memory device that is newly-installed into a computer system is provided, which subtracts a current power-on-hour count of the memory device from a current power-on-hour value of a power supply that supplies operative power to the memory device within the computer system. In response to the computer system powering down, an accumulated power-on-hour for the memory device is determined by subtracting the power-on-hour offset of the memory from a current power-on-hour value of the computer system power supply. The determined power-on-hour offset and accumulated power-on-hour values are saved into one or more designated bytes of a free area of electrically erasable programmable read-only memory of the memory device that are available for data storage by a memory controller, and wherein data stored therein persists after operative power is lost to the memory device, the memory controller or the computer system.

Abstract: According to an embodiment, a computer system for cache management includes a processor and a cache, the computer system configured to perform a method including receiving a first store request for a first address in the cache and receiving a first fetch request for the first address in the cache. The method also includes executing the first store request and the first fetch request, latching the first store request in a store write-back pipeline in the cache, detecting, in the processor, a conflict following execution of the first store request and the first fetch request and receiving the first store request from a recycle path including the store write-back pipeline and executing the first store request a second time.

Abstract: This disclosure is related to systems and methods for selective metadata storage in a system having multiple memories. In one example, a device may include a control circuit configured to selectively store a metadata base map in a first memory or a second memory. The metadata base map may include information to determine a physical memory address from a logical block address. The control circuit may also be configured to store metadata updates separately from the metadata base map. The metadata updates may comprise changes to the metadata base map. The control circuit may also be configured to selectively store the metadata updates in the first memory or the second memory based on characteristics of the device.

Abstract: Techniques for achieving crash consistency when performing write-behind caching using a flash storage-based cache are provided. In one embodiment, a computer system receives from a virtual machine a write request that includes data to be written to a virtual disk and caches the data in a flash storage-based cache. The computer system further logs a transaction entry for the write request in the flash storage-based cache, where the transaction entry includes information usable for flushing the data from the flash storage-based cache to a storage device storing the virtual disk. The computer system then communicates an acknowledgment to the VM indicating that the write request has been successfully processed.

Abstract: Provided is a PLC data log module and method for storing data in the same, wherein, in a case one or more storages among a plurality of outside storages is attached, a log data is stored in the attached outside storage, the log data is stored in the storage and check is made as to whether the log data is normally stored in the attached outside storage.

Abstract: In one embodiment, a primary storage system, includes: logic integrated with and/or executable by at least one controller, the logic being adapted to: receive a request to establish a Peer-to-Peer Remote Copy (PPRC) relationship between a primary storage system and a secondary storage system; set a path between the primary storage system and the secondary storage system via a hardwire connection in response to receiving the request; receive a memory map; establish the PPRC relationship between the primary storage system and the secondary storage system in response to receiving the memory map; and copy, based at least in part on the memory map, one or more data tracks of a primary storage device to the secondary storage system without copying at least one other data track of the primary storage device to the secondary storage system.

Abstract: A flash memory management method is provided. According to the method, when a request to write the predetermined data to a page to which data has been written is made, the predetermined data is written to a log block corresponding to a data block containing the page. When a request to write the predetermined data to the page again is received, the predetermined data is written to an empty free page in the log block. Even if the same page is requested to be continuously written to, the management method allows this to be processed in one log block, thereby improving the effectiveness in the use of flash memory resources.