Abstract: A memory system of a embodiments includes a first storing area having physical blocks and a second storing area recording a logical to physical translation table and an erasure count table keeping data erasure count in physical blocks. The memory system of the embodiments includes a controller which, when a logical address for deletion is notified, obtains data erasure count of a deletion physical block including a deletion area specified by the physical address corresponding to the logical address, and when a physical block having a small erasure count not more than a predetermined rate of the data erasure count exists in the erasure count table, reads out valid data for the memory system in the physical block having a small erasure count onto the second storing area, writes the above data into the deletion area, and invalidates the valid data in the physical block having a small erasure count.

Abstract: Described are techniques for data processing and caching. In response to a client failing to retrieve contents of a data element from a cache location specified by a first data element identifier including a first content-based identifier, the contents of the data element are obtained and stored at a cache location specified by the first data element identifier. The contents of the data element are updated at a second point in time and stored as second contents in the data element source. The data element at the second point in time has a second content-based identifier. In response to the client failing to retrieve the second contents of the data element from a cache location specified by a second data element identifier including the second content-based identifier, the second contents of the data element are obtained and stored at a cache location specified by the second data element identifier.

Abstract: A memory system is provided. The system includes a controller that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the controller to regulate read and write access to the one or more FLASH devices. Wear leveling components along with read and write processing components are provided to facilitate efficient operations of the FLASH memory devices.

Abstract: A method includes accepting data for storage in a memory that is partitioned into multiple memory regions. A memory region is selected for storing the data. At least part of the data is stored in the selected memory region, subject to verifying that all the storage operations applied to the selected memory region are performed within a predefined maximum time interval.

Abstract: A method of operating a memory system is provided. The method includes a controller that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the controller to regulate read and write access to the one or more FLASH devices. Wear leveling components along with read and write processing components are provided to facilitate efficient operations of the FLASH memory devices.

Abstract: A memory device is provided. The memory device includes a preamble disable memory and a memory controller. The preamble disable memory is arranged to store preamble disable data. The preamble disable data includes an indication as to whether a read preamble should be enabled or disabled. In response to a read command, if the preamble disable data includes an indication that the read preamble should be enabled, the memory controller provides the read preamble. Alternatively, in response to the read command, if the preamble disable data includes an indication that the read preamble should be disabled, the memory controller disables the read preamble.

Abstract: In one embodiment, the present invention includes a cache memory including cache lines that each have a tag field including a state portion to store a cache coherency state of data stored in the line and a weight portion to store a weight corresponding to a relative importance of the data. In various implementations, the weight can be based on the cache coherency state and a recency of usage of the data. Other embodiments are described and claimed.

Abstract: An approach to determine a power-on-hour offset for a memory device that is newly-installed into a computer system is provided, which subtracts a current power-on-hour count of the memory device from a current power-on-hour value of a power supply that supplies operative power to the memory device within the computer system. In response to the computer system powering down, an accumulated power-on-hour for the memory device is determined by subtracting the power-on-hour offset of the memory from a current power-on-hour value of the computer system power supply. The determined power-on-hour offset and accumulated power-on-hour values are saved into one or more designated bytes of a free area of electrically erasable programmable read-only memory of the memory device that are available for data storage by a memory controller, and wherein data stored therein persists after operative power is lost to the memory device, the memory controller or the computer system.

Abstract: Techniques for a data storage cluster and a method for maintaining and updating reliability data and reducing data communication between nodes, are disclosed herein. Each data object is written to a single data zone on a data node within the data storage cluster. Each data object includes one or more data chunks, and the data chunks of a data object are written to a data node in an append-only log format. When parity is determined for a reliability group including the data zone, there is no need to transmit data from other data nodes where the rest of data zones of the reliability group reside. Thus, inter-node data communication for determining reliability data is reduced.

Abstract: An information memory system in which data received is divided into pieces of data, which are stored in memories in parallel, includes controller configured to storing a number of the divided pieces of data and monitoring a read request and a buffer full notice, in a case where the number of read requests does not reach the number of valid memory units and the buffer full notice continues in all buffers except for one buffer which does not output the read request, performing a read control corresponding to the buffers which output the buffer full notice, and performing control of the integration of a piece of data reconstructed, after being read from the memory unit corresponding to the buffer which does not output the read request and the pieces of data read from the memory units corresponding to the buffers which output the buffer full notice.

Abstract: A computer system includes a controller coupled to a plurality of memory modules each of which includes a memory hub and a plurality of memory devices. The memory hub includes a row cache memory that stores data as they are read from the memory devices. When the memory module is not being accessed by the controller, a sequencer in the memory module generates requests to read data from a row of memory cells. The data read responsive to the generated read requests are also stored in the row cache memory. As a result, read data in the row being accessed may be stored in the row cache memory even though the data was not previously read from the memory device responsive to a memory request from the controller.

Abstract: In one aspect, a method includes sending a conditional read request from a host to a storage array requesting data in a data block stored at the storage array. The conditional read request includes a first hash of data in the data block at the host. The method also includes determining a second hash of the data in the data block stored at the storage array, comparing the first hash and the second hash, sending a reply from the storage array to the host with the data in the data block stored at the storage array if the first hash and the second hash differ and sending a reply from the storage array to the host without the data in the data block stored at the storage array if the first hash and the second hash are the same.

Abstract: When using virtually stored data sets, such as virtual storage access method (VSAM) data sets, while the data set is open (referred to as an open time) static data set characteristics and/or job parameters have been defined for the VSAM data set. In one approach, a method for modifying a virtual storage access method (VSAM) data set includes opening a VSAM data set; and modifying a VSAM control block structure for the VSAM data set.

Abstract: When using virtually stored data sets, such as virtual storage access method (VSAM) data sets, while the data set is open (referred to as an open time) static data set characteristics and/or job parameters have been defined for the VSAM data set. In one approach, even after a data set is opened, a virtually stored control block structure for the data set may be modified, such as by providing a dynamic address space associated with the data set in order to interact with the data set in an environment which allows for a service block request to modify the control block structure, such that data set characteristics and/or job parameters for the data set may be modified during the open time of the data set.

Abstract: A computer implemented method for sharing physical memory among logical partitions. A computer reserves physical memory of a Central Electronic Complex (CEC) for communication within the CEC as a shared memory pool. The computer creates a first logical partition using resources of the CEC that are not reserved as the shared memory pool. The computer creates a second logical partition using resources of the CEC that are not reserved as the shared memory pool. The computer creates a virtual local area network (VLAN) having at least two addresses within the CEC. The computer allocates a portion of the shared memory to the VLAN as the shared memory pool.

Abstract: Techniques, including systems and methods, take frequent captures of data sets for the purpose of forensic analysis. The data set captures are taken at the block level in various embodiments. Data set captures are used to instantiate forensic storage volumes that are attached to computing instances. The computing instances can access data in the forensic storage volumes at a state corresponding to a specified capture time. A user can select different capture times to re-instantiate the forensic storage volume to see how the forensic storage volume changed between captures.

Abstract: A storage apparatus for which a hierarchical data management system is adopted is designed so that when receiving a read request for a first logical area to which a first storage area of a first storage device in a virtual volume is allocated, whether or not to migrate data in a first storage area of the first storage device, to a storage area of a second storage device is decided according to an access frequency to the first logical area in synchronization with the read request. When it is decided that the data stored in the first storage area of the first storage device should be migrated to the storage area of the second storage device, the data is migrated to a second storage area of the second storage device and the second storage area thereof is allocated to the first logical area in the virtual volume.

Abstract: A controller and a method of updating parameters on the same. The controller includes an embedded non-volatile memory, a programming circuit, an embedded SRAM, a MCU (Micro Computer Unit), and a memory controller. The embedded non-volatile memory has a program code block for storing program codes to be executed by the MCU, and a data block for storing the parameters. The MCU writes the parameters into the data block of the flash memory through the memory controller, or reads data in the data block of the non-volatile memory through the memory controller. Because the controller does not need to employ an external EEPROM, the cost can be reduced and the speed for accessing the parameters can be increased.

Abstract: A semiconductor storage device includes a first nonvolatile memory to store user data of a file, a second nonvolatile memory to store management data of the file, the second nonvolatile memory being different in type from the first nonvolatile memory, and a controller to control read/write of data with respect to the first and second nonvolatile memories.

Abstract: In recent years, data life cycle management, in which data is relocated from, for example, a new storage sub-system to an older storage sub-system in accordance with how new the data is or the frequency of use of the data, has become important. One technology for achieving data life cycle management is technology for migrating the contents of a storage area (“volume”) of a storage sub-system to another volume without affecting the host computer that uses the volume. In the present invention, when an associated source volume (for example, the source volume in a copy pair association) of a pair of associated volumes is migrated, migration of an associated destination volume (for example, the target volume in the copy pair association) is also controlled. In this way, it is possible to control the migration of a pair (or a group) of associated volumes in accordance with the user's requirements.