Abstract: Signal wiring conductors are provided at opposing positions on the upper surface of the uppermost dielectric layer and on the lower surface of the bottommost dielectric layer, and grounding conductors surrounding grounding-conductor non-forming areas are provided on the upper surfaces of intermediate dielectric layers and the bottommost dielectric layer. These grounding conductors form an electromagnetically shielded space by being connected by grounding-conductor via conductors vertically penetrating the respective dielectric layers around the grounding-conductor non-forming areas, and signal via conductors are so provided in the respective dielectric layers as to penetrate this electromagnetically shielded space.

Abstract: An integrated circuit substrate having laminated laser-embedded circuit layers provides a multi-layer high-density mounting and interconnect structure for integrated circuits. A prepared substrate, which may be a rigid double-sided dielectric or film dielectric with conductive patterns plated, etched or printed on one or both sides is laminated with a thin-film dielectric on one or both sides. The thin-film is laser-ablated to form channels and via apertures and conductive material is plated or paste screened into the channels and apertures, forming a conductive interconnect pattern that is isolated by the channel sides and vias through to the conductive patterns on the prepared substrate. An integrated circuit die and external terminals can then be attached to the substrate, providing an integrated circuit having a high-density interconnect.

Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.

Abstract: An integrated circuit substrate having laser-embedded conductive patterns provides a high-density mounting and interconnect structure for integrated circuits. Conductive patterns within channels on the substrate provide interconnects that are isolated by the channel sides. A dielectric material is injection-molded or laminated over a metal layer that is punched or etched. The metal layer can provide one or more power planes within the substrate. A laser is used to ablate channels on the surfaces of the outer dielectric layer for the conductive patterns. The conductive patterns are electroplated or paste screen-printed and an etchant-resistive material is applied. Finally, a plating material can be added to exposed surfaces of the conductive patterns. An integrated circuit die and external terminals can then be attached to the substrate, providing an integrated circuit having a high-density interconnect.

Abstract: A contactor has a film substrate of an insulating material and plural wiring patterns on the substrate. A first end of each wiring pattern extends out from a first edge of the substrate as a first contact terminal and a second end of each wiring pattern extends out from a second edge of the substrate as a second contact terminal, and a part of the contactor located between the first end and second end can be deformed resiliently.

Abstract: An apparatus for electrically connecting an electronic element and a base includes an electrode region and a terminal region proximate the electrode region. A conductive paste is deposited on at least a portion of the terminal region. The conductive paste has an oxidation-reduced region thereon, formed by application of an acid to the conductive paste. An oxidation-prevention layer is formed on the oxidation-reduced region by deposition of a flux on the oxidation-reduced region, application of a solder to the flux, and blowing of a heated gas by the solder. The oxidation-prevention layer is adapted to bond the electrode associated with the electronic element to the conductive paste by soldering, when the electrode is present in the electrode region.

Abstract: An element, such as a PWB or PCB is provided with elongated lower-stiffness areas, which provide the element with areas of a lower deformation during deformation of the element, such as during a fall thereof. Fragile or large electronic or electrical parts, such Integrated Circuits, such as BGAs are positioned at the lower deformation areas in order to maintain electrical connection to the element during and after the deformation of the element.

Abstract: A conductive pattern made of copper foil is formed on a base material in each of a plurality of laminated flexible printed circuit boards, and a land is formed to expose the conductive pattern at a predetermined position in the base material. The plurality of flexible printed circuit boards are laminated to adjust each land, and the conductive pattern of each flexible printed circuit board is connected through the each land.

Abstract: Embedded flush circuitry features are provided by providing a conductive seed layer on the sidewalls and bottom of laser ablated trench features plating a layer of conductive metal onto the seed layer and depositing a layer of dielectric material.

Abstract: A method and apparatus for improved contact pad arrays and land patterns for integrated circuit packages are presented. A plurality of conductive pads are arranged in an array of rows and columns. At least one edge of a perimeter of the array is not fully populated with conductive pads. Spaces created in the edge by missing conductive pads create additional routing channels for signals from conductive pads within the array to be routed external to the array through the edge. A land pattern may have routing channels on one or more layers of a printed circuit board. In such a multi-layer land pattern, spaces can be created in edges on any number of the layers. Furthermore, corner pad arrangements having known routing channel characteristics can be used in any number of corners of a land pattern that incorporates spaces in an edge.

Abstract: A symmetric electrical connection system for balancing impedance between a first node and a third node and impedance between a second node and a fourth node. The system includes a first conducting wire, a third conducting wire, a fifth conducting wire, and a seventh conducting wire all installed in a first layer. The system further includes a second conducting wire, a fourth conducting wire, a sixth conducting wire, and an eighth conducting wire all installed in a second layer. The first conducting wire and the eighth conducting wire are crossed but electrically insulated. The second conducting wire and the third conducting wire are crossed but electrically insulated. The fourth conducting wire and the fifth conducting wire are crossed but electrically insulated. The sixth conducting wire and the seventh conducting wire are crossed but electrically insulated. In a preferred embodiment, the appearances and the materials of the conducting wires are essentially equivalent.

Abstract: Flatwire assembly having a number of conductive elements or traces position on the substrate of the flatwire. In order to protect the conductive element from environmental hazards such as moisture and chemicals, a sealing film is provided that encapsulates the conductive elements. The sealing film has a polymer layer and an adhesive layer. The polymer layer prevents vertical diffusion of moisture into the conductive elements and the adhesive layer prevents later diffusion of moisture. The sealing film is larger than the conductive elements such that it completely encapsulates the conductive elements.

Abstract: A composite superconducting tape including a multiplicity of constituent superconducting tapes stacked parallel to one another with major faces in contact, and at least some of constituent tapes have widths not greater than half the width of the composite superconductor and are laid edge to edge with each other. All constituent superconducting tapes may have a width that is substantially half, or another simple fraction, of the width of the composite tape so that they form two or more substacks with aligned zones between them which contain no superconducting material. A full-width tape of silver or silver alloy to bridge from tape to tape provides sufficiently strong mechanical connection between substacks. The composite superconducting tape has substantially improved critical current compared with a stack of the same overall dimensions and composition with all full-width superconducting tapes, due to magnetic de-coupling between the substacks.

Abstract: A multilayer wiring board assembly, a multilayer wiring board assembly component, and a method of manufacture thereof. The multilayer wiring board assembly is formed by laminating together a plurality of multilayer wiring board assembly components having a flexible resin film with a copper foil bonded to one surface and an adhesive layer bonded to the other surface, opening a through hole in the copper plated resin film through the copper foil, resin film, and the adhesive layer, filling the through hole with a conductive paste projecting from the adhesive layer and laterally extending beyond through hole opening of the copper foil.

Abstract: The present invention provides a tablet computer and a docking station assembly. This docking station includes a docking assembly for positioning with three degrees of freedom and having a data connector for mechanically supporting and interfacing with the tablet computer. A support member couples the docking assembly to an expansion base. The base includes a number of ports for interfacing with a variety of peripheral devices or power supplies. These varieties of ports mount to a printed circuit board contained within the expansion base. A flexible printed circuit (FPC) combines the signal pathways for the variety of ports, allowing the signal pathways to travel from the printed circuit board and to the data connector. The tablet computing device has a plurality of contact or touch points positioned on the right and left edges of the tablet to facilitate aligning the tablet to the docking assembly in either a landscape or portrait mode.

Abstract: A solder bearing—bearing wafer (100) is provided which is used to connect a first electronic device to a second electronic device. The wafer includes a substrate body having a first surface and second surface, opposing the first surface. The first surface has grooves (115, 117) formed therein and includes length of solder (130) dispersed within groove. Upon heating the solder and placement of the wafer between the first and second devices, the two devices are connected.

Abstract: An information handling system (e.g., computer, server, etc.) Utilizing at least one circuitized substrate assembly of robust construction and possessing enhanced operational capabilities. The substrate assemblies include a substrate having at least one opening which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

Abstract: Replacements of thick film pads with smaller, thinner, metal contacts or straps are used to eliminate many of the stress-related failure modes associated with the larger contact pads. These straps allow for a more simplified manufacturing process than that associated with an anchored I/O pad configuration. A single via, electrically connected to a plurality of vias in a substrate layer above, is introduced to enhance the reliability of the signal net, and provides for higher frequency applications through reduction in parasitic capacitance and electrical leakage. The straps are directionally located toward the substrate center. Once the locations of the internal strap vias are redirected to lower local distance-to-neutral points, still within the same I/O capture pad, and directed towards the center of the substrate, single vias are then placed at the strap end closest the substrate center.

Abstract: An interconnecting apparatus employing a lossy power distribution network to reduce power plane resonances. In one embodiment, a printed circuit board includes a lossy power distribution network formed by a pair of parallel planar conductors separated by a dielectric layer.

Abstract: An electronic device is mounted on a wiring board, which includes: a substrate having through holes, and lands extending on surfaces of the substrate and adjacent to openings of the through holes. Further, at least one coating layer is provided, which coats at least one part of an outer peripheral region of the at least one land, in order to cause that the at least one part is separated from a lead-less solder, thereby preventing any peel of the land from the surface of the substrate.