Abstract: A circuit component mounting device includes a resin substrate, vias, a circuit component composed of a main body and electrode portions, a solder, and an insulative sealing resin that covers the circuit component and the solder. The device further includes a base metal pattern which covers parts of the principal face of the resin substrate where the vias are exposed and is composed of a Cu layer and a Ni layer and a copper plated pattern which is provided on the base metal pattern and is composed of a Cu layer, a Ni layer, and an Au layer. The circuit component is provided on the copper plated pattern. The solder allows the copper plated pattern and the circuit component to adhere to each other.

Abstract: A circuit board having, between the circuit board and a component arranged thereon, an electrical and mechanical connection of high mechanical-load-bearing ability. The circuit board includes at least one internally situated conductor path, a first insulating layer arranged on a first surface of the circuit board, a second insulating layer arranged on a second surface of the circuit board, a first contact location at which the conductor path is accessible, a second contact location, at which the conductor path is accessible through a bore passing completely through the circuit board, and an electronic component arranged on the first surface. The component has a first contact surface, which is connected with the first contact location by solder or electrically conductive adhesive, and a second contact surface which is connected with the second contact location by solder or adhesive.

Abstract: Bonding pad(s) for a printed circuit board with circuit patterns are provided. The bonding pad(s) include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns. An interval between wire bonding pad(s) is reduced by preventing a nickel plating layer and a gold plating layer from protruding at a lower portion of a copper pattern when they are formed on the copper patterns.

Abstract: A multi-layered interconnect structure and method of formation. In a first embodiment, first and second liquid crystal polymer (LCP) dielectric layers are directly bonded, respectively, to first and second opposing surface of a thermally conductive layer, with no extrinsic adhesive material bonding the thermally conductive layer with either the first or second LCP dielectric layer. In a second embodiment, first and second 2S1P substructures are directly bonded, respectively, to first and second opposing surfaces of a LCP dielectric joining layer, with no extrinsic adhesive material bonding the LCP dielectric joining layer with either the first or second 2S1P substructures.

Abstract: A double-sided flexible printed circuit comprises: an electrically insulating base; a first copper layer having a first conductive pattern; a second copper layer having a second conductive pattern, the second conductive pattern disposed offset from the first conductive pattern; and electrically insulating coverlays. A first area opposing a first contact point of first contacts that press upon the first conductive patterns, is reinforced by copper foil extending from the second conductive patterns, and a second area opposing a second contact point of second contacts that press upon the second conductive patterns, is reinforced by copper foil extending from the first conductive patterns.

Abstract: Apply heat to thermoplastic resin film, which is eventually to become an insulating resin layer, and press the film against a mold for forming grooves on a surface of the film. Next, press-fit an electronic component into the resin film from a back-face of the film, thereby exposing electrodes of the component from a bottom of the grooves. Then cool the film for curing. Peel the film off the mold, then fill the grooves with conductive paste, and cure the paste for forming circuit patterns. The foregoing procedure allows bringing the electrodes positively into conduction with the circuit patterns of a circuit board incorporating the electronic component, and achieving a narrower pitch between routings of the circuit patterns.

Abstract: The present invention relates to a high frequency laminated component, which is used in a high frequency apparatus such as a radio communication apparatus, and its manufacturing method. An object thereof is to downsize the high frequency laminated component. To achieve the object, according to the high frequency laminated component of the present invention, dielectric layer (4) whose dielectric constant is lower than that of other areas is formed around via-hole electrode (3) in a dielectric. By forming dielectric layer (4) having a low dielectric constant, electric interference between via-hole electrode (3) and circuit electrode (22) is restrained, so that the circuit electrode and the via-hole electrode can be formed more closely each other compared with a conventional one. As a result, the high frequency laminated component can be downsized.

Abstract: A wired circuit board prevents a sealing resin filled in an electronic component mounting portion from overflowing and spreading to a different area other than the electronic component mounting portion. An electronic component placing area is provided in the electronic component mounting portion for the electronic component to be placed and terminals are located within the electronic component placing area and formed to extend continuously with the conductive wires. Also, a groove extending around the electronic component mounting portion to intersect with the conductive wires is formed in the insulating cover layer. Further, protrusions protruding in a direction of the conductive wires being extended in the groove are formed at an intersecting portion thereof with the conductive wires. This can reduce a tendency of the overly filled sealing resin to flow over the groove, thus preventing the spread of the sealing resin from the groove to the outside thereof.

Abstract: Disclosed herein is a high-vacuum-maintaining structure of a superconducting cable. The superconducting cable includes inner and outer metal tubes, and spacers disposed between the inner and outer metal tubes for spacing them by a prescribed distance. To the spacers is attached a gathering material, which serves to adsorb residual gas between the inner and outer metal tubes, thereby maintaining the superconducting cable in a high-vacuum state for a long time, improving thermal insulation performance of the superconducting cable, and reducing cooling costs and maintenance costs required for vacuum pumping thereof.

Abstract: An electronic parts packaging structure of the present invention includes a core substrate having such a structure that a recess portion is provided by forming a prepreg insulating layer having an opening portion therein on a resin layer, and an electronic parts mounted on a bottom portion of the recess portion of the core substrate such that a connection pad of the electronic parts is directed upward, and also, such a structure may be employed that the electronic parts is embedded in a resin layer of a core substrate having a structure that the resin layer is formed on the prepreg insulating layer.

Abstract: A superconducting cable joint structure is a structure used to joint together superconducting cables used at cryogenic temperature or to joint together a terminal of the superconducting cable and a normal conducting cable, and it includes a joint insulation layer arranged radially outer than a portion connecting the superconducting cables' respective conductors together or the superconducting cable's conductor and the normal conducting cable's conductor together, and at least one coolant path provided at the joint insulation layer to cool the portion connecting the conductors together. The cable cores can have their connection prevented from generating heat to have an increased temperature.

Abstract: A circuit board with mounting pads is described for improving the frequency response of routing traces. The present invention is used to etch an etching hole on ground layer corresponding to the surface-mounted devices (SMD) on a routing layer and therefore the parasitic effect from the stray capacitor is reduced, resulting in eliminating the parasitic effect in high-frequency and raising the quality of the PCB as well.

Abstract: An electronic device is mounted on a wiring board, which includes: a substrate having through holes, and lands extending on surfaces of the substrate and adjacent to openings of the through holes. Further, at least one coating layer is provided, which coats at least one part of an outer peripheral region of the at least one land, in order to cause that the at least one part is separated from a lead-less solder, thereby preventing any peel of the land from the surface of the substrate.

Abstract: A flexible interconnect structure allows for rapid dissipation of heat generated from an electrical device that includes light-emitting elements, such as light-emitting diodes (“LEDs”) and/or laser diodes. The flexible interconnect structure comprises: (1) at least one flexible dielectric film on which circuit traces and, optionally, electrical circuit components are formed and at least a portion of which is removed through its thickness; and (2) at least a heat sink attached to one surface of the flexible dielectric film opposite to the surface on which circuit traces are formed. The flexible interconnect structure can include a plurality of such flexible dielectric films, each supporting circuit traces and/or circuit components, and each being attached to another by an electrically insulating layer. Electrical devices or light sources having complex shapes are formed from such flexible interconnect structures and light-emitting elements attached to the heat sinks so to be in thermal contact therewith.

Abstract: A circuit board includes first and second reference plane layers. A first decoupling capacitor is mounted to a surface of the first reference plane layer, and a second decoupling capacitor is mounted to a surface of the second reference plane layer. Vias extend generally along a first direction through the circuit board. The first and second decoupling capacitors are aligned generally along the first direction to increase an amount of space through which the vias are extendable.

Abstract: A wired circuit board is provided having excellent heat radiation characteristics, including when the semiconductor device is mounted on the wired circuit board by the flip chip mounting method. An insulating base layer defines a base opening portion in a mounting region. The base opening portion includes a thin layer portion that surrounds the base opening portion. Inside terminal portions are disposed on the thin layer portion. A heat radiating portion is formed in the base opening region to contact the stiffener sheet As a result, the surface of the inside terminal portion is located lower in level than the surface of the heat radiating portion. Thus, a semiconductor device may be mounted on the wired circuit board by the flip chip mounting method to enable heat generated from the semiconductor device to be transferred to the stiffener sheet via the heat radiating portion.

Abstract: A solder-bearing wafer is provided for use in a soldering operation. The solder-bearing wafer is designed to provide a solder material which is used in a soldering operation for electrically connecting a first electronic device to a second electronic device. According to a first embodiment, the wafer comprises a substrate body having a first surface and an opposing second surface. The first surface has at least one groove formed therein and the wafer also includes at least one length of solder material securely disposed within the at least one groove. Upon heating of the at least length of solder material and placement of the substrate body between the first and second electronic devices, at least one first contact of the first electronic device is securely and electrically connected to at least one second contact of the second electronic device. The first and second electronic devices may be of a through hole type, surface mount type, or ball grid array type.

Abstract: A laminate circuit structure assembly is provided that comprises at least two modularized circuitized voltage plane subassemblies; optionally an interposer located between each of the subassemblies, and wherein the subassemblies and interposer, if present, are bonded together with a cured dielectric coating. The interposer comprises dielectric layers disposed about an internal electrically conductive layer.

Abstract: A multi-layer printed circuit board having a low noise characteristic, the multi-layer printed circuit board includes at least one circuit layer; at least one isolation line for dividing the at least one circuit layer into at least two areas, the at least one isolation line forming an open pattern and the at least one isolation line extendedly forming a long neck line into the at least one area; and at least one capacitor placed at one side of the opening of the open pattern in any one of the areas.

Abstract: A multi-layer circuit board includes first, second, third, fourth, fifth, sixth and seventh insulating substrates disposed sequentially one above the other; first, second, third and fourth signal wiring layers; first, second and third ground wiring layers; and a power wiring layer. Each of the first and seventh insulating substrates has a thickness ranging from 2.5 to 7.5 mil. Each of the second and sixth insulating substrates has a thickness ranging from 3 to 13 mil. Each of the third and fifth insulating substrates has a thickness ranging from 3 to 15 mil. The fourth insulating substrate has a thickness ranging from 2 to 6 mil. The first signal wiring layer has a first resistance with respect to the first ground wiring layer. The second signal wiring layer has a second resistance with respect to the first and second ground wiring layers. The third signal wiring layer has a third resistance with respect to the third ground wiring layer and the power wiring layer.