Patents Examined by J. E. Schoenholtz
  • Patent number: 12660590
    Abstract: A semiconductor device includes: a first control electrode and a second control electrode for switching that are formed in a first main surface and a second main surface, respectively, of a semiconductor substrate; a first control electrode pad electrically connected to the first control electrode; a first through-via penetrating the semiconductor substrate in a thickness direction and including a conductor electrically connecting the first main surface to the second main surface; and a second control electrode pad formed on the first main surface and electrically connected to the second control electrode through the first through-via.
    Type: Grant
    Filed: September 21, 2023
    Date of Patent: June 16, 2026
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masanori Tsukuda, Akihisa Yamamoto, Tatsuya Kawase, Masaki Sudo, Shinya Soneda, Hidenori Fujii, Tomohide Terashima, Takaya Noguchi
  • Patent number: 12660445
    Abstract: A light emitting display apparatus includes a substrate, a lower metal layer disposed on the substrate, a driving transistor disposed on the lower metal layer, a connection electrode connected with an electrode of the driving transistor, and a light emitting diode including an anode electrode connected with the electrode of the driving transistor by the connection electrode, wherein the lower metal layer comprises a pattern portion exposing a portion of the connection electrode.
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: June 16, 2026
    Assignee: LG Display Co., Ltd.
    Inventors: Eun Ji Joo, Hyun Haeng Lee
  • Patent number: 12660714
    Abstract: A semiconductor package includes a first semiconductor chip including first front connection pads on a first front surface, first rear connection pads and dummy pads on a first rear surface, and through-electrodes. The package includes a second semiconductor chip including second front connection pads and test pads on a second front surface, and a protective layer including openings exposing at least a portion of the second front connection pads and the test pads. The package includes bump structures electrically connecting the first rear connection pads and the second front connection pads, and an adhesive film surrounding at least a portion of each of the first rear connection pads, the dummy pads, and the bump structures. The dummy pads overlap the test pads in a direction perpendicular to the first rear surface, and a height of the dummy pads is greater than a height of the first rear connection pads.
    Type: Grant
    Filed: August 23, 2023
    Date of Patent: June 16, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youngjun Yoon, Yunseok Choi, Jongpa Hong
  • Patent number: 12648431
    Abstract: A semiconductor device includes a wiring line on a substrate, a first line portion having a line shape in a first direction, a head hammer pattern connected to an end of the first line portion in the first direction; a second wiring line spaced from the first wiring line in a second direction perpendicular to the first direction, the second wiring line including a second line portion parallel to the first line portion; a first contact plug electrically connecting the first line portion and the second line portion, the first contact plug being positioned adjacent to the first end of the first line portion and a second end of the second line portion in the first direction. The first contact plug has a bottom surface higher than a bottom surface of the first and second wiring lines. The upper surface of the first head hammer pattern contacts an insulation material.
    Type: Grant
    Filed: October 23, 2023
    Date of Patent: June 2, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Eunjung Kim
  • Patent number: 12641995
    Abstract: According to one embodiment, a display device includes a first lower electrode and a second lower electrode, a power supply line, a first organic layer including a light emitting layer and covering the first lower electrode, a second organic layer including a light emitting layer and covering the second lower electrode, a first upper electrode being in contact with the power supply line and covering the first organic layer, a second upper electrode being in contact with the power supply line and covering the second organic layer, and a first inorganic insulating film covering the first upper electrode and the second upper electrode and exposing the power supply line.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: May 26, 2026
    Assignee: MAGNOLIA WHITE CORPORATION
    Inventors: Hayata Aoki, Masumi Nishimura, Hiroumi Kinjo
  • Patent number: 12628516
    Abstract: A display panel has a display area and a peripheral area including: a first fan-out region, a bending region, and a second fan-out region. The display panel includes: a substrate layer, at least one connecting lead and at least one first-type signal line. The substrate layer includes a first substrate and a second substrate. The at least one connecting lead is between the first and second substrates and extends from a side of the bending region to another side of the bending region through the bending region. The at least one first-type signal line is located on a side of the second substrate away from the first substrate. A first-type signal line is in at least one of the first fan-out region or the display area. The first-type signal line is electrically connected to a connecting lead through a via hole in the second substrate.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: May 12, 2026
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongqiang Du, Jizhe Wang, Ying Zhang, Zhihao Xie, Hengzhen Liang
  • Patent number: 12622164
    Abstract: Foldable substrates comprise a first outer layer comprising a first major surface, a second outer layer comprising a second major surface, and a core layer positioned therebetween. The core layer may comprise a first central surface area positioned between a first portion and a second portion of the first outer layer, and the core layer comprising a second central surface area positioned between a third portion and fourth portion of the second outer layer. Some foldable substrates comprise a first portion comprising a first depth of compression, a first depth of layer, and a first average concentration. The central portion may comprise a first central depth of compression, a first central depth of layer, and a central average concentration. Methods comprise chemically strengthening a foldable substrate. Some methods comprise etching the foldable substrate and then further chemically strengthening the foldable substrate.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: May 5, 2026
    Assignee: CORNING INCORPORATED
    Inventors: Douglas Clippinger Allan, Matthew John Dejneka, Yuhui Jin, Xinghua Li, Yousef Kayed Qaroush, Tingge Xu
  • Patent number: 12610716
    Abstract: A display panel is disclosed in the present application. A display portion is bent about at least a first direction to define a first arc shape, and the first arc shape has a first radius of curvature. A driving chip is bonded to a pad portion. A support pad is provided between the display portion and the pad portion, and is provided corresponding to at least the driving chip. The support pad includes a first surface toward the display portion and a second surface toward the pad portion, the first surface is in contact with the first arc shape, and the second surface is a flat surface.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: April 21, 2026
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Zuojia Wang, Si Xie, Ping He, Junjie Mei, Jun Yang, Qian Liu
  • Patent number: 12610717
    Abstract: The present application relates to the technical field of display. Disclosed are a display substrate and a preparation method therefor, and a display panel, which aim at improving the bending resistance of a flexible display panel, and increasing the yield of a flexible display product. The display substrate comprises: a base substrate provided with a display area and a non-display area surrounding the display area; a gate layer located on the base substrate; an interlayer insulation layer, which is located on the side of the gate layer that faces away from the base substrate and comprises a first organic insulation layer and a first inorganic insulation layer, wherein the first organic insulation layer covers the display area and part of the non-display area; a source and drain layer located on the side of the interlayer insulation layer that faces away from the base substrate.
    Type: Grant
    Filed: May 18, 2023
    Date of Patent: April 21, 2026
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Qiuhua Meng, Xueyan Tian, Yueping Zuo
  • Patent number: 12610616
    Abstract: A first TFT includes a first semiconductor layer formed of polysilicon, a gate insulating film provided on the first semiconductor layer, a third semiconductor layer provided on the gate insulating film, and a first gate electrode provided on the third semiconductor layer, and a second TFT includes a second semiconductor layer formed of an oxide semiconductor, a first metal layer and a second metal layer formed on a third conductor region and a fourth conductor region, respectively, of the second semiconductor layer.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: April 21, 2026
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Tadayoshi Miyamoto
  • Patent number: 12604636
    Abstract: Provided is a display module, which includes a display panel and a first support assembly disposed on a non-display side of the display panel. For each of a second support structure, a third support structure, and a fourth support structure of the first support assembly which are configured to support bending regions of the display panel, the thickness of the support structure is less than the thickness of a first support structure configured to support a non-bending region of the display panel, and/or the support structure configured to support bending regions of the display panel at least includes a target material with a lower elasticity modulus.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: April 14, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ziang Han, Zhengdao Liu, Song Zhang, Zhao Li, Paoming Tsai, Chunyan Xie, Haoran Wang, Biao Gao, Shuang Du
  • Patent number: 12604628
    Abstract: A display substrate includes a substrate, and first active layers, a first functional layer, a second active layer, a second functional layer and an interlayer dielectric layer stacked in sequence on the substrate. The display substrate further includes first vias, second vias and third vias. The first vias each penetrate at least a portion of the second functional layer and at least a portion of the first functional layer, and each expose a partial surface of a first active layer. The second vias each penetrate the interlayer dielectric layer, and are respectively communicated with the first vias. The third vias each penetrate the interlayer dielectric layer and at least another portion of the second functional layer, and each expose a partial surface of the second active layer. The first vias are formed before the interlayer dielectric layer, and the third vias are formed later than the interlayer dielectric layer.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: April 14, 2026
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yipeng Chen, Ling Shi
  • Patent number: 12593564
    Abstract: A display apparatus includes a glass substrate and having improved heat-dissipation function and impact absorption function and at the same time, having a reduced thickness. To this end, a plate including a porous member having both a heat-dissipation function and an impact absorption function is disposed under a display panel. The plate can have both a heat-dissipation function and a cushion function with only a porous member without adding a separate heat-dissipation layer or cushion layer. Further, disclosed is a display apparatus in which a black screen is displayed while the display panel is not activated, thereby improving display quality. To this end, a black heat-dissipation layer is formed under the porous member such that the heat-dissipation performance and the display quality are improved.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: March 31, 2026
    Assignee: LG Display Co., Ltd.
    Inventor: Chanhyeok Park
  • Patent number: 12593604
    Abstract: The present disclosure provides an electronic device including a covering layer and a flexible substrate structure. The covering layer includes a first region and a second region. The flexible substrate structure is disposed under the covering layer and includes a first portion corresponding to the first region and a second portion corresponding to the second region. A Gaussian curvature of the first region of the covering layer is different from a Gaussian curvature of the second region of the covering layer, and a Poisson's ratio of the first portion of the flexible substrate structure is different from a Poisson's ratio of the second portion of the flexible substrate structure.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: March 31, 2026
    Assignee: InnoLux Corporation
    Inventors: Yuan-Lin Wu, Kuan-Feng Lee
  • Patent number: 12581830
    Abstract: A display panel is provided, including a flat display region, and a fixed region and a sliding-scrolling region on two sides of the flat display region in a first direction, the fixed region is adhered with a middle frame, the flat display region is configured to display images, the sliding-scrolling region is configured to form a rolled-up state and an extended state by sliding-scrolling, the sliding-scrolling region displays the image together with the flat display region in the extended state, on a plane perpendicular to the display panel, the display panel at least includes a display substrate, an adhesive layer disposed on the display substrate, and a cover plate layer on a side of the adhesive layer away from the display substrate, the cover plate layer at least includes a glass layer, the glass layer of at least one of the fixed region and the sliding-scrolling region has a structural hole.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: March 17, 2026
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yongxiao Gao, Tiejun Bi, Qiang Tang, Shiyou Wang, Danping Shen, Wei Zeng, Zheng Fang, Yuqiang Huang, Ziyan Zhong
  • Patent number: 12575259
    Abstract: A highly reliable display device is provided. The display device including a light-emitting element and an insulating layer placed to cover the light-emitting element and the light-emitting element includes a first conductive layer, an EL layer over the first conductive layer, and a second conductive layer over the EL layer and the insulating layer includes a first layer, a second layer over the first layer, and a third layer over the second layer and the first layer has a function of capturing or fixing at least one of water and oxygen, the second layer has a function of inhibiting diffusion of at least one of water and oxygen, and the third layer has a higher concentration of carbon than at least one of the first layer and the second layer.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: March 10, 2026
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiro Jinbo, Yasumasa Yamane
  • Patent number: 12575336
    Abstract: The present disclosure provides a semiconductor integrated circuit device and a manufacturing method therefor. In the device, an electrode in a resistive random-access memory (RRAM) cell is directly connected to a metal layer, thereby omitting the steps of filling a connection via with other metal materials (such as tungsten) and of polishing. The manufacturing process is hence simplified, and different degrees of depressions caused by polishing are correspondingly reduced. The uniformity of resistive performance of the RRAM and the quality of the semiconductor integrated circuit device are hence greatly improved. In addition, a resistive layer having a trench structure is formed by using a trench where an original connection via is located, thereby embedding the entire RRAM cell into the trench. The structure of the RRAM cell is more compact, a gap between RRAM cells is smaller, and the requirements for miniaturization and high density can thus be better met.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: March 10, 2026
    Assignee: XIAMEN INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE CO., LTD.
    Inventors: Taiwei Chiu, Lijun Shan, Tingying Shen
  • Patent number: 12543489
    Abstract: The present disclosure provides a display panel, comprising a display region, a binding region, and a bending region located between the display region and the binding region. A maximum bending angle of the bending region is less than 180°. The bending region includes a bending start point close to the display region, a distance between the bending start point and an apex of the bending region is less than a bending radius of the bending region in a first direction, and the first direction is a direction from the display region to the bending region. The present disclosure further provides a display module and a display device.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: February 3, 2026
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Li Zeng, Qiang Tang, Xin Qing, Yang Shu, Xu Fan, Tianfu Wang, Jinglei Wang, Linhuan Yan
  • Patent number: 12543490
    Abstract: Provided is a display substrate, including a display area and a bonding area located at a side edge of the display area and connected therewith; the bonding area includes a first non-bendable region, a bendable region and a second non-bendable region sequentially arranged and connected; the display substrate further includes a base, and an inorganic insulating layer, a metal conductive layer and an organic insulating layer successively located on the base; orthographic projections of the inorganic and organic insulating layers on the base are located in the display area and the first and second non-bendable regions; the metal conductive layer extends from the display area to the first non-bendable region, the bendable region and the second non-bendable region; the display substrate further includes an adjustment protective layer made of Optical Clear Resin and located on the organic insulating layer; and the adjustment protective layer covers the bendable region.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 3, 2026
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiafan Shi, Liqiang Chen, Chuandong Liao, Wanxu Gao, Xin Zhang, Yangjie Wan, Shengxing Zhang
  • Patent number: 12538673
    Abstract: A display panel includes a display area, a first fan-out region, a bending region and fan-out traces disposed in the first fan-out region. The fan-out trace includes a lead-out segment and an extension segment that are connected. The fan-out traces include a first trace group and a second trace group that are not symmetrically. The first trace group includes first trace bundles. A first trace bundle closest to the second trace group includes a first sub-bundle and a second sub-bundle, each of which includes a lead-out portion and an extension portion that are connected. The lead-out portion and the extension portion are constituted by lead-out segments and extension segments of fan-out traces in a corresponding sub-bundle, respectively. A distance between the extension portion of the first sub-bundle and the extension portion of the second sub-bundle is greater than a distance between two adjacent fan-out traces in any first trace bundle.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: January 27, 2026
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xinxin Wang, Bo Zhang, Zhiwen Chu, Yi Qu, Aoyuan Feng