Patents Examined by J. E. Schoenholtz
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Patent number: 11942388Abstract: An embodiment of the invention may include a semiconductor structure, method of use and method of manufacture. The structure may include a heating element located underneath a temperature-controlled portion of the device. A method of operating the semiconductor device may include providing current to a thin film heater located beneath a temperature-controlled region of the semiconductor device. The method may include performing temperature dependent operations in the temperature-controlled region.Type: GrantFiled: April 20, 2021Date of Patent: March 26, 2024Assignee: International Business Machines CorporationInventors: Bahman Hekmatshoartabari, Takashi Ando, Nanbo Gong, Alexander Reznicek
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Patent number: 11935856Abstract: A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise forming a back end of line layer on a dummy substrate, completing at least a first portion of an assembly, and removing the dummy substrate.Type: GrantFiled: June 21, 2021Date of Patent: March 19, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jong Sik Paek, Doo Hyun Park
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Patent number: 11937455Abstract: A display device includes a substrate having a first main display area, a second main display area, and a sub-display area positioned between the first main display area and the second main display area; a first driving circuit positioned on the sub-display area of the substrate; a first sub-pixel circuit and a second sub-pixel circuit positioned on respective sides of the first driving circuit in the sub-display area of the substrate; a first sub-light-emitting device connected to the first sub-pixel circuit and overlapping the first driving circuit; and a second sub-light-emitting device connected to the second sub-pixel circuit and overlapping the first driving circuit.Type: GrantFiled: October 12, 2021Date of Patent: March 19, 2024Assignee: Samsung Display Co., Ltd.Inventors: Hye Won Kim, Sun Hee Lee, Ju Chan Park, Gun Hee Kim, Ok-Kyung Park
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Patent number: 11937457Abstract: A display device is provided. The display device comprises a first base substrate, a first barrier layer disposed on the first base substrate, a second base substrate disposed on the first barrier layer, a first sub-substrate disposed on the second base substrate and comprising at least one dopant selected from a group consisting of: fluorine (F), boron (B), arsenic (As), phosphorus (P), chlorine (Cl), bromine (Br), iodine (I), astatine (At), sulfur (S), selenium (Se), argon (Ar), and tellurium (Te), a second barrier layer disposed on the first sub-substrate, a second buffer layer disposed on the second barrier layer, a first buffer layer disposed on the second buffer layer, at least one transistor disposed on the first buffer layer, and an organic light-emitting diode disposed on the at least one transistor.Type: GrantFiled: August 24, 2021Date of Patent: March 19, 2024Assignee: Samsung Display Co., Ltd.Inventors: Jong Baek Seon, Deok Hoi Kim, Hun Kim
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Patent number: 11930660Abstract: A display device, includes: a display panel including a first area, a second area spaced apart from the first area, and a bendable area between the first area and the second area; a window disposed on the display panel overlapping the first area; a protective layer disposed on the window including a first portion overlapping the bendable area; and an adhesive disposed between the window and the protective layer.Type: GrantFiled: September 23, 2021Date of Patent: March 12, 2024Assignee: Samsung Display Co., Ltd.Inventors: Boyun Kim, Ji Hyuk Im, Eungil Choi, Jiyun Jung, Sungwon Cho, Inwook Cho
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Patent number: 11929285Abstract: Implementations of methods of singulating a plurality of die included in a substrate may include forming a plurality of die on a first side of a substrate, forming a backside metal layer on a second side of a substrate, applying a photoresist layer over the backside metal layer, patterning the photoresist layer along a die street of the substrate, and etching through the backside metal layer located in the die street of the substrate. The substrate may be exposed through the etch. The method may also include singulating the plurality of die included in the substrate through removing a substrate material in the die street.Type: GrantFiled: January 11, 2023Date of Patent: March 12, 2024Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Michael J. Seddon
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Patent number: 11925084Abstract: A display panel can include a substrate, a light-emitting element including an emission region on the substrate, a reference voltage line adjacent to the light-emitting element, and a branch line connected to the reference voltage line to apply a reference voltage to light-emitting element. The light-emitting element can emit light on the emission region in a direction of the substrate. Further, the branch line can include a semiconductor layer, and the semiconductor layer of the branch line can overlap the emission region.Type: GrantFiled: December 16, 2022Date of Patent: March 5, 2024Assignee: LG DISPLAY CO., LTD.Inventors: Dong Yoon Lee, Kwang Yong Choi, Seong Hwan Hwang, Byeong Uk Gang, Hye Min Park
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Patent number: 11925053Abstract: A display apparatus includes a first substrate including a polymer resin, a protective layer on the first substrate, the protective layer including at least one selected from SiOCH, SiOC, SiOF, aromatic amine, diazonium tetrafluoroborate, and an aromatic diazonium compound, and a buffer layer on the protective layer, the buffer layer including a material different from a material included in the protective layer.Type: GrantFiled: July 1, 2021Date of Patent: March 5, 2024Assignee: Samsung Display Co., Ltd.Inventors: Hyojung Kim, Jungmin Park, Jongwoo Park, Daeyoun Cho, Junehwan Kim, Youngjoo Noh, Sora Bak, Youngtae Choi
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Patent number: 11920932Abstract: A wafer-level assembly method for a micro hemispherical resonator gyroscope includes: after independently manufactured glass substrates are softened and deformed at a high temperature, forming a micro hemispherical resonator on the glass substrate; forming glass substrate alignment holes at both ends of the glass substrate by laser ablation; aligning and fixing a plurality of identical micro hemispherical resonators on a wafer fixture by using the alignment holes as a reference, and then performing operations by using the wafer fixture as a unit to implement subsequent processes that include: releasing the micro hemispherical resonators, metallizing the surface, fixing to the planar electrode substrates, separating the wafer fixture and cleaning to obtain a micro hemispherical resonator gyroscope driven by a bottom planar electrode substrate.Type: GrantFiled: September 17, 2020Date of Patent: March 5, 2024Assignee: NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGYInventors: Xuezhong Wu, Dingbang Xiao, Xiang Xi, Yulie Wu, Hanhui He, Yan Shi, Kun Lu, Bin Li, Yimo Chen, Chao Yuan, Bao Nie
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Patent number: 11908706Abstract: A method includes placing a plurality of package components over a carrier, encapsulating the plurality of package components in an encapsulant, forming a light-sensitive dielectric layer over the plurality of package components and the encapsulant, exposing the light-sensitive dielectric layer using a lithography mask, and developing the light-sensitive dielectric layer to form a plurality of openings. Conductive features of the plurality of package components are exposed through the plurality of openings. The method further includes forming redistribution lines extending into the openings. One of the redistribution lines has a length greater than about 26 mm. The redistribution lines, the plurality of package components, the encapsulant in combination form a reconstructed wafer.Type: GrantFiled: April 25, 2022Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Hua Yu, Tin-Hao Kuo
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Patent number: 11901416Abstract: An object is to provide a technique capable of suppressing the rise in the sense voltage during the Miller plateau. A semiconductor device includes a semiconductor substrate of first conductivity type, a first IGBT portion and a second IGBT portion selectively disposed on a first main surface of the semiconductor substrate, and an impurity region of second conductivity type selectively disposed on a second main surface of the semiconductor substrate. The second IGBT portion is used to detect the current passing through the first IGBT portion. An area ratio of the impurity region within a second range to an area of the second range is lower than an area ratio of the impurity region within a first range to an area of the first range, the second range corresponding to the second IGBT portion, the first range corresponding to the first IGBT portion.Type: GrantFiled: April 10, 2019Date of Patent: February 13, 2024Assignee: Mitsubishi Electric CorporationInventor: Tetsujiro Tsunoda
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Patent number: 11901340Abstract: A semiconductor power module including an insulating substrate having one surface and another surface, an output side terminal arranged at a one surface side of the insulating substrate, a first power supply terminal arranged at the one surface side of the insulating substrate, a second power supply terminal to which a voltage of a magnitude different from a voltage applied to the first power supply terminal is to be applied, and arranged at an other surface side of the insulating substrate so as to face the first power supply terminal across the insulating substrate, a first switching device arranged at the one surface side of the insulating substrate and electrically connected to the output side terminal and the first power supply terminal, and a second switching device arranged at the one surface side of the insulating substrate and electrically connected to the output side terminal and the second power supply terminal.Type: GrantFiled: February 6, 2023Date of Patent: February 13, 2024Assignee: ROHM CO., LTD.Inventors: Kenji Hayashi, Masashi Hayashiguchi
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Patent number: 11894490Abstract: A spherical flip-chip micro-LED, a method for manufacturing the spherical flip-chip micro-LED, and a display panel are provided. The spherical flip-chip micro-LED includes a light-emitting body, a supporting body, a first electrode, a second electrode, and an insulating protective layer. The supporting body is transparent. The first electrode and the second electrode are electrically coupled with the light-emitting body. The insulating protective layer covers the light-emitting body. The light-emitting body, the supporting body, and the insulating protective layer form a spherical structure.Type: GrantFiled: June 29, 2021Date of Patent: February 6, 2024Assignee: CHONGQING KONKA PHOTOELECTRIC TECHNOLOGY RESEARCH INSTITUTE CO., LTDInventors: Biao Tang, Haiping Liu, Zhongshan Feng
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Patent number: 11894425Abstract: A method of forming a semiconductor arrangement includes forming a gate dielectric layer over a semiconductor layer. A gate electrode layer is formed over the gate dielectric layer. A first gate mask is formed over the gate electrode layer. The gate electrode layer is etched using the first gate mask as an etch template to form a first gate electrode. A first dopant is implanted into the semiconductor layer using the first gate mask and the first gate electrode as an implantation template to form a first doped region in the semiconductor layer.Type: GrantFiled: February 6, 2023Date of Patent: February 6, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yun-Chi Wu, Tsung-Yu Yang, Cheng-Bo Shu, Chien Hung Liu
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Patent number: 11895862Abstract: A display panel including a corner includes: a substrate including a display area including a front display area, and a peripheral area outside the display area; an insulating layer on the substrate in the display area and the peripheral area, where an outer groove or an outer through hole is defined in the insulating layer in the peripheral area; an upper inorganic pattern layer on the insulating layer, where the upper inorganic pattern layer includes a protruding tip protruding toward a center of the outer groove or a center of the outer through hole; and a front display element on the insulating layer and overlapping the front display area. The upper inorganic pattern layer is apart from the front display element.Type: GrantFiled: July 7, 2021Date of Patent: February 6, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Junhyeong Park, Sangwoo Kim, Byeonghee Won, Kyungmin Kim, Jiyeon Seo, Jaemin Shin
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Patent number: 11895905Abstract: Provided are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes a flexible substrate, a driving structure layer disposed on the flexible substrate, a light-emitting element disposed on the driving structure layer, and an encapsulation layer disposed on the light-emitting element. The flexible substrate includes a first flexible substrate layer, a first connection layer disposed on the first flexible substrate layer, and a second flexible substrate layer disposed on the first connection layer, wherein, the first connection layer includes at least one first via, and the first flexible substrate layer includes at least one first groove provided corresponding to the first via; the first via and the first groove are mutually communicated, and an orthographic projection of the first groove on the first flexible substrate layer includes an orthographic projection of the first via on the first flexible substrate layer.Type: GrantFiled: September 23, 2021Date of Patent: February 6, 2024Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Sen Wang, Li Jia, Bin Liu, Mingqi Gang, Shaojie Qin, Ming Yang, Jiandong Bao, Wei Wang, Xin Zhou
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Patent number: 11887891Abstract: A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations.Type: GrantFiled: January 17, 2023Date of Patent: January 30, 2024Assignee: Intel CorporationInventors: Mark T. Bohr, Tahir Ghani, Nadia M. Rahhal-Orabi, Subhash M. Joshi, Joseph M. Steigerwald, Jason W. Klaus, Jack Hwang, Ryan Mackiewicz
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Patent number: 11882728Abstract: A display device includes: first and second display panels adjacent to each other along one direction, wherein: each of the first and second display panels includes a substrate, and a display portion on the substrate and includes a plurality of pixels including a pixel circuit layer on the substrate, at least one transistor, a display element layer on the pixel circuit layer, and at least one light emitting element emitting light; the substrate of the first display panel and the substrate of the second display panel are engaged with each other in a plan view and a cross-sectional view; the display portion of the first display panel and the display portion of the second display panel are engaged with each other in a plan view and a cross-sectional view; and a boundary between the display portion of the first display panel and the display portion of the second display panel.Type: GrantFiled: August 2, 2021Date of Patent: January 23, 2024Assignee: Samsung Display Co., Ltd.Inventors: Won Tae Kim, Chang Hyeok Choi, Yong Sik Hwang, Jang Bog Ju
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Patent number: 11882741Abstract: A display device including: a substrate; an active layer, and including channel and conductive regions; a first conductive layer including a driving gate electrode and a scan line in a first direction; a second conductive layer including a storage line; a third conductive layer including a first connecting member above the storage line; an insulating layer between the storage line and the first connecting member; and a data line and a driving voltage line crossing the scan line in a second direction, wherein the first connecting member electrically connects the driving gate electrode and a conductive region, the driving voltage line overlaps the first connecting member, the insulating layer includes first and second sub-insulating layers, and an edge of the second sub-insulating layer substantially overlaps an edge of the first connecting member in a thickness direction of the display device.Type: GrantFiled: February 10, 2023Date of Patent: January 23, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jin Sung An, Young Woo Park, Se Wan Son, Moo Soon Ko, Jeong-Soo Lee, Ji Seon Lee, Deuk Myung Ji
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Patent number: 11877497Abstract: An OLED display screen and a method for manufacturing the same are provided. The OLED display screen includes a first substrate; a fastener disposed on a side of a surface of the first substrate; a second substrate disposed on a surface of the fastener far away from the first substrate; and a flexible display module extending and bent from a surface of the first substrate far away from the fastener to a surface of the second substrate far away from the fastener, wherein a gap without a filler is provided between the flexible display module and the fastener.Type: GrantFiled: June 15, 2020Date of Patent: January 16, 2024Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventor: Zhitao Zhu