Abstract: The present invention relates to a composition for an organic electronic device encapsulant and an encapsulant formed by using the same. A composition for an encapsulant according to an exemplary embodiment of the present invention comprises: 1) a first copolymer comprising the first unit represented by Chemical Formula 1, the second unit represented by Chemical Formula 2, and the third unit represented by Chemical Formula 3; 2) a second copolymer comprising the second unit represented by Chemical Formula 2 and the third unit represented by Chemical Formula 3; 3) one or more photoinitiators; 4) a reactive silicone-based oligomer; and 5) a silicone acrylate-based compound.

Abstract: Techniques are disclosed for forming semiconductor integrated circuits including a channel region, a gate dielectric between the gate electrode and the channel region, a first layer between the gate dielectric and the gate electrode, the first layer comprising temperature compensation material. In addition, the integrate circuit includes a source region adjacent to the channel region, a source metal contact on the source region, a drain region adjacent to the channel region, and a drain metal contact on the drain region. The temperature compensation material has a temperature dependent band structure, work-function, or polarization that dynamically adjusts the threshold voltage of the transistor in response to increased operating temperature to maintain the off-state current Ioff stable or otherwise within an acceptable tolerance. The temperature compensation material may be used in conjunction with a work function material to help provide desired performance at lower or non-elevated temperatures.

Abstract: The present disclosure discloses a flexible display panel including a device layer, an organic planarization layer formed on the device layer, a light-emitting unit formed on the planarization layer, and an anode layer of the light-emitting unit adjacent contacted to the organic planarization layer. The organic planarization layer includes at least one first connection hole and at least one second connection hole; an output end of the device layer is connected with the anode layer through the first connection hole; the second connection hole has a depth smaller than the thickness of the organic planarization layer, and the anode layer of the light-emitting unit is further connected to the organic planarization layer through the second connection hole. The flexible display panel can protect the anode layer of the flexible display device from cracking due to poor flexibility during the bending process and improve the quality of the flexible display device.

Abstract: A trench MOS device with improved single event burnout endurance, applied in the field of semiconductor. The device is provided, in an epitaxial layer, with a conductive type semiconductor pillar connected to a source and a second conductive type current-directing region. Whereby, the trajectory of the electron-hole pairs induced by the single event effect is changed and thus avoids the single event burnout caused by the triggering of parasitic transistors, therefore improving the endurance of the single event burnout of the trench MOS device.

Abstract: A sheet-shaped aluminum-diamond composite containing a prescribed amount of a diamond powder wherein a first and second peak in a volumetric distribution of particle sizes occurs at 5-25 ?m and 55-195 ?m, and a ratio between an area of a volumetric distribution of particle sizes of 1-35 ?m and 45-205 ?m is from 1:9 to 4:6, the composite including an aluminum-containing metal as the balance, wherein the composite is covered, on both main surfaces, with a surface layer having prescribed film thicknesses and containing 80 vol % or more of an aluminum-containing metal, two or more Ni-containing layers are formed on at least the surface layer, the Ni-containing layers being such that a first and second layer from the surface layer side are amorphous Ni alloy layers having prescribed thicknesses, and an Au layer having a prescribed thickness is formed as an outermost layer.

Abstract: A solid-state imaging apparatus includes an imaging section and a substrate. The imaging section has a light-receiving portion for receiving light from an object to image the object and the imaging section is disposed on the substrate. A member is provided on the substrate in the neighborhood of the light receiving portion and the member is partially or entirely coated in black.

Abstract: Pore-filled dielectric materials for semiconductor structure fabrication, and methods of fabricating pore-filled dielectric materials for semiconductor structure fabrication, are described. In an example, a method of fabricating a pore-filled dielectric material for semiconductor structure fabrication includes forming a trench in a material layer. The method also includes filling the trench with a porous dielectric material using a spin-on deposition process. The method also includes filling pores of the porous dielectric material with a metal-containing material using an atomic layer deposition (ALD) process.

Abstract: A semiconductor device structure and method for fabricating the same. The semiconductor device structure includes a semiconductor fin and a liner in contact with end portions of the semiconductor fin. A first source/drain contacts the liner and sidewalls of the semiconductor fin. A gate structure is in contact with and surrounds the semiconductor fin. A second source/drain is formed above the first source/drain. The method includes forming, on a substrate, at least one semiconductor fin having a first spacer in contact with an upper portion of the semiconductor fin, and a second spacer in contact with the first spacer and a lower portion of the semiconductor fin. The semiconductor fin is patterned into a plurality of semiconductor fins. A liner is formed on exposed end portions of each semiconductor fin of the plurality of semiconductor fins.

Abstract: The present invention discloses a fabricating method of a flexible panel and a flexible display device. The method includes: forming a protective layer on a glass substrate, forming a flexible material layer on the protective layer, sequentially forming a thin film transistor on the flexible material layer, and forming an organic functional layer and the encapsulating layer to form a flexible panel; and separating the glass substrate and the flexible material layer by laser stripping to obtain the flexible panel. By the above method, the glass substrate and the flexible material can be fully peeled off, reducing the defect rate of peeling of the flexible material, optical characteristics of the display.

Abstract: A display panel, a display device and a method for preparing a low-temperature polysilicon thin film transistor are provided. The method includes: providing a base substrate; forming a semiconducting layer on the base substrate; forming a first insulating layer on the semiconducting layer; forming a first metal layer on the first insulating layer and pattering the first metal layer to obtain a first metal gate layer; forming a second insulating layer on the first metal layer; forming a second metal layer on the second insulating layer and patterning the second metal layer to obtain a second metal gate layer; forming a third insulating layer on the second metal layer; forming a third metal layer on the third insulating layer and patterning the third metal layer to form a source and a drain. The LTPS technology can be applied to the production of large-size panels by adopting the present disclosure.

Abstract: A LTPS TFT (Lower Temperature Polycrystal Silicon thin film transistor) is provided. The LTPS TFT includes substrate, poly-Si layer, gate insulation layer, grid, layer insulation layer, first through hole, second through hole, source and drain. The poly-Si layer includes an undoped layer, a heavily doped layers and a lightly doped layer. The gate insulation layer includes a first layer, a second layer and third layer respectively corresponding to undoped layer, lightly doped layer and third layer. The thickness of second layer is greater than sum of a thickness of first layer and third layer. A manufacture method of LTPS TFT and OLED display device are also provided in invention. The LTPS TFT of this invention has simplify manufacture method and low cost.

Abstract: Methodologies and an apparatus for enabling three-dimensional scatterometry to be used to measure a thickness of dielectric layers in semiconductor devices are provided. Embodiments include initiating optical critical dimension (OCD) scatterometry on a three-dimensional test structure formed on a wafer, the three-dimensional test structure comprising patterned copper (Cu) trenches with an ultra-low k (ULK) dielectric film formed over the patterned Cu trenches; and obtaining, by a processor, a thickness of the ULK dielectric film based on results of the OCD scatterometry.

Abstract: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Abstract: An evaporation apparatus comprises an evaporation chamber (2) and a moving device (3); the evaporation chamber (2) is provided with an evaporation source (21) therein and is provided with two regulating plates (22) on a side wall thereof; the moving device (3) is disposed on the bottom of the evaporation chamber (2). An evaporation method by use of the evaporation apparatus is also disclosed.

Abstract: A package structure of a display panel and a display device are provided. The package structure of the display panel includes: a first substrate and a second substrate opposite to each other; and a display component, a drying layer, and a supporting layer, located between the first substrate and the second substrate; wherein, the supporting layer is configured to support the first substrate and the second substrate to maintain an interval between the first substrate and the second substrate, the drying layer and the supporting layer are directly connected with each other, the supporting layer includes a first sub-supporting layer, and the first sub-supporting layer is located on a side of the drying layer away from the display component.

Abstract: The present invention relates to a formulation suitable for the preparation of a highly refractive encapsulation material with good barrier properties towards water vapor for an LED, to an encapsulation material for an LED having a high refractive index and good barrier properties towards water vapor which is obtainable from said formulation and to a light emitting device (LED) comprising said encapsulation material. The formulation comprises a polymer comprising a first repeating unit M1 and a second repeating unit M2; and a surface-modified zirconium dioxide nanocrystal.

Abstract: A p-type oxide semiconductor is prevented from being oxidized by oxygen in an n-type oxide semiconductor even if the p-type oxide semiconductor is provided as a termination structure in the n-type oxide semiconductor. A semiconductor device includes an n-type gallium oxide substrate, an anode electrode joined to the n-type gallium oxide substrate, and a cathode electrode provided on the n-type gallium oxide substrate. Current flows between the anode electrode and the cathode electrode via the n-type gallium oxide substrate provided between the anode electrode and the cathode electrode. The semiconductor device further includes a p-type oxide semiconductor layer provided adjacent to a junction between the anode electrode and the n-type gallium oxide substrate, and a nitride layer provided between the p-type oxide semiconductor layer and the n-type gallium oxide substrate.

Abstract: A method of manufacturing a semiconductor device includes forming a first insulating film having a first thickness over a main surface of a semiconductor substrate and then forming a second insulating film having a second thickness larger than the first thickness over the first insulating film, sequentially processing the second insulating film, the first insulating film, and the semiconductor substrate to form a plurality of trenches and to form a plurality of projecting portions which include portions of the semiconductor substrate extending in a first direction along the main surface of the semiconductor substrate and are spaced apart from each other in a second direction orthogonal to the first direction along the main surface of the semiconductor substrate, and depositing a third insulating film over the main surface of the semiconductor substrate such that the third insulating film is embedded in the trenches.

Abstract: A semiconductor device includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.

Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a substrate, a semiconductor region disposed adjacent to the substrate, first fin(s) disposed adjacent to the semiconductor region, first gate region(s) disposed adjacent to the first fin(s), first drain contact(s) disposed above the first fin(s), first source contact(s) disposed below the substrate, a second fin disposed above the semiconductor region, and a second gate region, second source contact and second drain contact disposed adjacent to the second fin and above the semiconductor region. First path(s) are formed between the first drain contact(s) and the first source contact(s) for current flow(s) through the first fin(s) in a vertical direction along the first path(s). A second path is formed between the second source contact and the second drain contact for current flow through the second fin in a horizontal direction along the second path.