Patents Examined by Jae Lee
  • Patent number: 11508849
    Abstract: A semiconductor device and method of manufacture are provided. In an embodiment a first contact is formed to a source/drain region and a dielectric layer is formed over the first contact. An opening is formed to expose the first contact, and the opening is lined with a dielectric material. A second contact is formed in electrical contact with the first contact through the dielectric material.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: November 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Che-Cheng Chang, Kai-Yu Cheng, Chih-Han Lin, Sin-Yi Yang, Horng-Huei Tseng
  • Patent number: 11502267
    Abstract: An inorganic light emitting diode in which at least one energy control layer including an organometallic compound interacting with a hydroxyquinoline moiety is disposed between an emitting material layer and at least one charge transfer layer and an inorganic light emitting device including the diode are disclosed. An exciton recombination zone is formed at the central region in the EML, and inorganic luminescent particles have minimal surface defects by introducing the energy control layer. The inorganic light emitting diode and the inorganic light emitting device can improve their color purity and luminous efficiency.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: November 15, 2022
    Assignee: LG Display Co. Ltd.
    Inventor: Young-Ju Ryu
  • Patent number: 11502217
    Abstract: A method and apparatus for reducing as-deposited and metastable defects relative to amorphous silicon (a-Si) thin films, its alloys and devices fabricated therefrom that include heating an earth shield positioned around a cathode in a parallel plate plasma chemical vapor deposition chamber to control a temperature of a showerhead in the deposition chamber in the range of 350° C. to 600° C. An anode in the deposition chamber is cooled to maintain a temperature in the range of 50° C. to 450° C. at the substrate that is positioned at the anode. In the apparatus, a heater is embedded within the earth shield and a cooling system is embedded within the anode.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: November 15, 2022
    Inventor: Gautam Ganguly
  • Patent number: 11495467
    Abstract: Method and apparatus for etching a thin layer including silicon nitride formed on a substrate are disclosed. Etchant including phosphoric acid and water is supplied on the substrate so that a liquid layer is formed on the substrate. The thin layer is etched by reaction between the thin layer and the etchant. Thickness of the liquid layer is measured to detect variation in the thickness of the liquid layer while etching the thin layer. Variation in the concentration of the phosphoric acid and the water is calculated based on the variation in the thickness of the liquid layer. Water is supplied on the substrate based on the variation in the concentration of the phosphoric acid and the water so that the concentration of the phosphoric acid and the water becomes a predetermined value.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: November 8, 2022
    Assignee: SEMES CO., LTD.
    Inventors: Jung Suk Goh, Jae Seong Lee, Do Youn Lim, Kuk Saeng Kim, Young Dae Chung, Tae Shin Kim, Jee Young Lee, Won Geun Kim, Ji Hoon Jeong, Kwang Sup Kim, Pil Kyun Heo, Yoon Ki Sa, Ye Rim Yeon, Hyun Yoon, Do Yeon Kim, Yong Jun Seo, Byeong Geun Kim, Young Je Um
  • Patent number: 11488929
    Abstract: A bonding apparatus configured to bond substrates comprises a first holder configured to vacuum-exhaust a first substrate to attract and hold the first substrate on a bottom surface thereof; a second holder disposed under the first holder, and configured to vacuum-exhaust a second substrate to attract and hold the second substrate on a top surface thereof; a mover configured to move the first holder and the second holder relatively in a horizontal direction; a laser interferometer system configured to measure a position of the first holder or the second holder which is moved by the mover; a linear scale configured to measure a position of the mover; and a controller configured to control the mover based on a measurement result of the laser interferometer system and a measurement result of the liner scale.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: November 1, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takashi Nakamitsu, Shuhei Matsumoto, Yosuke Omori
  • Patent number: 11482443
    Abstract: A bonding apparatus according to the present embodiment includes a first holder and a second holder. The first holder holds a first substrate. The second holder sucks a second substrate, opposes the second substrate to the first substrate, and bonds the second substrate to the first substrate. A first ring stage is provided on an outer circumference of the first holder and allows a first ring member provided on an outer edge of the first substrate to be mounted thereon. A second ring stage is provided on an outer circumference of the second holder and allows a second ring member provided on an outer edge of the second substrate to be mounted thereon. A first heater is provided in the first ring stage. A second heater is provided in the second ring stage.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: October 25, 2022
    Assignee: Kioxia Corporation
    Inventor: Hideo Eto
  • Patent number: 11482431
    Abstract: A substrate processing apparatus includes a holder having thereon an attraction surface configured to attract a substrate and including an outer attracting member configured to attract a peripheral portion of the substrate and an inner attracting member configured to attract a portion of the substrate inside the peripheral portion of the substrate attracted by the outer attracting member in a diametrical direction of the attraction surface; a moving device configured to move the outer attracting member with respect to the inner attracting member; and a controller configured to control a distortion, which is caused at the substrate attracted to the attraction surface, by controlling a movement of the outer attracting member with respect to the inner attracting member.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: October 25, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kimio Motoda, Norifumi Kohama, Norio Wada, Yosuke Omori, Kenji Sugakawa
  • Patent number: 11476348
    Abstract: A manufacturing method of a semiconductor device includes the following steps. First patterned structures are formed on a substrate. Each of the first patterned structures includes a first semiconductor pattern and a first bottom protection pattern disposed between the first semiconductor pattern and the substrate. A first protection layer is formed on the first patterned structures and the substrate. A part of the first protection layer is located between the first patterned structures. A first opening is formed in the first protection layer between the first patterned structures. The first opening penetrates the first protection layer and exposes a part of the substrate. A first etching process is performed after forming the first opening. A part of the substrate under the first patterned structures is removed by the first etching process for suspending at least a part of each of the first patterned structures above the substrate.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: October 18, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chuan-Chang Wu, Zhen Wu, Hsuan-Hsu Chen, Chun-Lung Chen
  • Patent number: 11469367
    Abstract: A method for separating a removable composite structure using a light flux includes supplying the removable composite structure, which successively comprises: a substrate that is transparent to the light flux; an optically absorbent layer for at least partially absorbing a light flux; a sacrificial layer adapted to dissociate subject to the application of a temperature higher than a dissociation temperature and made of a material different from that of the optically absorbent layer; and at least one layer to be separated. The method further includes applying a light flux through the substrate, the light flux being at least partly absorbed by the optically absorbent layer, so as to heat the optically absorbent layer; heating the sacrificial layer by thermal conduction from the optically absorbent layer, up to a temperature that is greater than or equal to the dissociation temperature; and dissociating the sacrificial layer under the effect of the heating.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: October 11, 2022
    Assignee: Soitec
    Inventors: Jean-Marc Bethoux, Guillaume Besnard, Yann Sinquin
  • Patent number: 11462424
    Abstract: The present invention is related to a heating device for heating an object material using a laser beam, the heating device comprising a stage on which the object material is placed; a laser module for generating and outputting a laser beam; an optical module for controlling a path of the laser beam; a polygon mirror rotating around an axis of rotation and having a plurality of reflecting surfaces which reflect the laser beam; and a beam guide module for controlling an incidence range within which the laser beam reflected by the polygon mirror is incident on the object material, and an indirect heating method using a laser beam in a heating device.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: October 4, 2022
    Assignee: RNR LAB INC.
    Inventor: Jeong Do Ryu
  • Patent number: 11450578
    Abstract: A substrate processing system includes: a modification layer forming device configured to form a modification layer within a first substrate along a boundary between a peripheral portion to be removed and a central portion of the first substrate; an interface processing device configured to process an interface where the first substrate and a second substrate are bonded in the peripheral portion; a periphery removing device configured to remove the peripheral portion starting from the modification layer; a position detection device configured to detect a position of the modification layer or a position of the interface; and a control device configured to control the modification layer forming device and the interface processing device. The control device controls the position of the interface based on the detected position of the modification layer, or controls the position of the modification layer based on the detected position of the interface.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: September 20, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Hayato Tanoue
  • Patent number: 11450838
    Abstract: Provided are a display panel, a manufacturing method thereof and a display device. The display panel includes a substrate, multiple light-emitting elements and a circular polarizer. The multiple light-emitting elements are disposed on one side of the substrate. The circular polarizer is disposed on one side of the multiple light-emitting elements facing away from the substrate. The circular polarizer is provided with first hollow structures corresponding to at least part of the multiple light-emitting elements. The area where each first hollow structure is located overlaps a respective one of the at least part of the multiple light-emitting elements.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: September 20, 2022
    Assignee: Hubei Yangtze industrial Innovation Center Of Advanced Display Co., Ltd.
    Inventors: Linshan Guo, Shaorong Yu
  • Patent number: 11444129
    Abstract: A display panel a display device are provided. The display panel includes a plurality of pixel units arranged in a row direction and in a column direction, the display panel includes a display region. An edge of the display region includes a fold line formed by connecting a line segment extending in the row direction and a line segment extending in the column direction, a parallelogram region formed in the display region taking two adjacent line segments as adjacent sides includes the pixel units; directions from an intersection point of the two adjacent line segments to end points of the two adjacent line segments other than those at the intersection point are a first direction and a second direction, respectively; in the parallelogram region, aperture ratios of the pixel units arranged in at least one of the first direction and the second direction increase gradually.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: September 13, 2022
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yin Deng, Bo Wu, Xiaojing Qi
  • Patent number: 11444256
    Abstract: This invention provides a filter-free tunable spectrum PD with a layered structure of at least two electrodes and two functional layers. Both functional layers can be a layer, a stack of inorganic semiconductors, an organic semiconductor, an organic/polymer donor/acceptor blend, a hybrid semiconductor or their combinations that has a good charge transport property. The first functional layer absorbs the shorter-wavelength EM waves and is transparent to the longer-wavelength EM waves. The second functional layer absorbs the longer-wavelength EM waves. The detection spectrum window is determined by the difference in wavelengths between the transmission cut-off wavelength of the first functional layer and absorbing edge of the second functional layer, or between the absorption edge of the first functional layer and that of the second functional layer.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: September 13, 2022
    Assignee: Hong Kong Baptist University
    Inventors: Furong Zhu, Zhaojue Lan
  • Patent number: 11443966
    Abstract: Systems, apparatuses, and methods are provided for predicting or determining irregular processing parameters during processing of a semiconductor wafer in a semiconductor processing apparatus, such as an etching apparatus. A semiconductor processing apparatus includes a load port that is configured to receive a semiconductor wafer. A process chamber is coupled to the load port, and a fan is configured to selectively vary a flow of fluid in the process chamber. One or more sensors are provided in the process chamber and are configured to sense one or more processing parameters in the process chamber. A controller is coupled to the one or more sensors and to the fan, and the controller is configured to control the fan to vary the flow of fluid in the process chamber based on the sensed one or more processing parameters.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: September 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chin Wei, Che-fu Chen
  • Patent number: 11444217
    Abstract: A method for producing a thin-film solar module with serially connected solar cells and related device. A back electrode layer is deposited on one side of a flat substrate and subdivided by first patterning trenches. An absorber layer is deposited over the back electrode layer and subdivided by second patterning trenches. A front electrode layer is deposited over the absorber layer. At least the front electrode layer is subdivided by third patterning trenches. A direct succession of a first patterning trench, a second patterning trench, and two adjacent third patterning trenches forms a patterning zone. The third patterning trenches are produced by laser ablation through a pulsed laser beam, where one third patterning trench is produced with laser pulses of higher energy and the other third patterning trench of the patterning zone is produced with laser pulses of lower energy.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: September 13, 2022
    Assignee: CNBM RESEARCH INSTITUTE FOR ADVANCED GLASS MATERIALS GROUP CO., LTD.
    Inventors: Andreas Heiss, Helmut Vogt
  • Patent number: 11437559
    Abstract: A physical vapor deposition system includes a chamber, three target supports to targets, a movable shield positioned having an opening therethrough, a workpiece support to hold a workpiece in the chamber, a gas supply to deliver nitrogen gas and an inert gas to the chamber, a power source, and a controller. The controller is configured to move the shield to position the opening adjacent each target in turn, and at each target cause the power source to apply power sufficient to ignite a plasma in the chamber to cause deposition of a buffer layer, a device layer of a first material that is a metal nitride suitable for use as a superconductor at temperatures above 8° K on the buffer layer, and a capping layer, respectively.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: September 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Mingwei Zhu, Zihao Yang, Nag B. Patibandla, Ludovic Godet, Yong Cao, Daniel Lee Diehl, Zhebo Chen
  • Patent number: 11437258
    Abstract: A method for storage a workpiece used in fabrication of a semiconductor device includes disposing the workpiece on a workpiece carrier, disposing the workpiece carrier with the workpiece in a workpiece container via a workpiece storage system, identifying a content of the workpiece container, and adjusting a storage condition inside the workpiece container in response to the content of the workpiece container via the workpiece storage system.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: September 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tzu-Chi Chiu, Jen-Ti Wang, Ting-Wei Wang, Kuo-Fong Chuang
  • Patent number: 11417646
    Abstract: An integrated circuit formed on a silicon substrate includes an NMOS transistor with n-channel raised source and drain (NRSD) layers adjacent to a gate of the NMOS transistor, a PMOS transistor with SiGe stressors in the substrate adjacent to a gate of the PMOS transistor, and an NPN heterojunction bipolar transistor (NHBT) with a p-type SiGe base formed in the substrate and an n-type silicon emitter formed on the SiGe base. The SiGe stressors and the SiGe base are formed by silicon-germanium epitaxy. The NRSD layers and the silicon emitter are formed by silicon epitaxy.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: August 16, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manoj Mehrotra, Terry J. Bordelon, Deborah J. Riley
  • Patent number: 11417548
    Abstract: A component mounting machine includes a control device that controls a wafer supply device and a component transfer device. The control device includes a die information storage section storing the position of the dies stored in the wafer supply device associated with a rank of the dies, a block information acquisition section acquiring the condition of the dies to be mounted on a block provided on a board, a rank designation section designating the rank of the die to be picked up by the component transfer device, and a position designation section designating the position of the die to be picked up by the component transfer device. The position designation section designates the position of the die so that the die having the rank designated by the rank designation section is continuously picked up over the multiple wafers stored in the wafer supply device.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: August 16, 2022
    Assignee: FUJI CORPORATION
    Inventors: Yukinori Nakayama, Shinichi Fujii