Abstract: A light emitting device includes a Chip Scale Packaged (CSP) LED, the CSP LED including an LED chip that generates blue excitation light; and a photoluminescence layer that covers a light emitting face of the LED chip, wherein the photoluminescence layer comprises from 75 wt % to 100 wt % of a manganese-activated fluoride photoluminescence material of the total photoluminescence material content of the layer. The device/CSP LED can further include a further photoluminescence layer that covers the first photoluminescence and that includes a photoluminescence material that generates light with a peak emission wavelength from 500 nm to 650 nm.

Abstract: A display module, a display screen and a display system are disclosed. The display module comprises a frame and multiple display unit boards assembled and installed on the frame to form a display surface. The frame comprises a border and a support frame installed in the border. Each display unit board comprises a circuit board and multiple pixel points installed on a front side of the circuit board, wherein a back side of the circuit board is installed on the border and the support frame, and each pixel point includes at least one LED chip. According to the display module of the invention, multiple display unit boards are assembled on the frame to form a display surface.

Abstract: The invention relates to methods of processing a wafer, having on one side a device area with a plurality of devices. In particular, the invention relates to a method which comprises providing a protective film, and applying the protective film to the side of the wafer being opposite to the one side, so that at least a central area of a front surface of the protective film is in direct contact with the side of the wafer being opposite to the one side. The method further comprises applying an external stimulus to the protective film during and/or after applying the protective film to the side of the wafer being opposite to the one side, so that the protective film is attached to the side of the wafer being opposite to the one side, and processing the one side of the wafer and/or the side of the wafer being opposite to the one side.

Abstract: The present disclosure discloses an LED bracket, including: a front bracket, wherein an LED lamp chip is provided in the front bracket; and a back bracket, wherein the back bracket is connected to the front bracket, and a diffusion material is provided on a side of the back bracket away from the front bracket, wherein the LED lamp chip can emit light from the front bracket and light emitted from a direction close to the back bracket passes through the diffusion material and then goes out from the back bracket. In the present disclosure, the front bracket is provided, the back bracket is additionally provided on the front bracket, the diffusion material is provided on the back bracket.

Abstract: A sealing structure including: a set of base members forming a sealed space; a through-hole which is formed in at least one of the base members, and communicates with the sealed space; and a sealing member that seals the through-hole. An underlying metal film including a bulk-like metal such as gold is provided on a surface of the base member provided with the through-hole. The sealing member seals the through-hole while being bonded to the underlying metal film, and includes: a sealing material which is bonded to the underlying metal film, and includes a compressed product of a metal powder of gold or the like, the metal powder having a purity of 99.9% by mass or more; and a lid-like metal film which is bonded to the sealing material, and includes a bulk-like metal such as gold. Further, the sealing material includes: an outer periphery-side densified region being in contact with an underlying metal film; and a center-side porous region being in contact with the through-hole.

Abstract: A UV LED device includes a base, a lens disposed on the base, an adhesive unit, an LED chip unit, and an encapsulating member. The adhesive unit has multiple layers and is connected between the base and the lens such that the base, the lens and the adhesive unit cooperatively define an enclosed space. The LED chip unit is disposed in the enclosed space. The encapsulating member is disposed in the enclosed space, and encapsulates the LED chip unit. The encapsulating member is made of a material the same as a material of at least one layer of the adhesive unit.

Abstract: A method of fabricating a solar cell is disclosed. The method can include forming a dielectric region on a surface of a solar cell structure and forming a metal layer on the dielectric layer. The method can also include configuring a laser beam with a particular shape and directing the laser beam with the particular shape on the metal layer, where the particular shape allows a contact to be formed between the metal layer and the solar cell structure.

Abstract: A device includes an interconnect device attached to a redistribution structure, wherein the interconnect device includes conductive routing connected to conductive connectors disposed on a first side of the interconnect device, a molding material at least laterally surrounding the interconnect device, a metallization pattern over the molding material and the first side of the interconnect device, wherein the metallization pattern is electrically connected to the conductive connectors, first external connectors connected to the metallization pattern, and semiconductor devices connected to the first external connectors.

Abstract: A phosphor may have the empirical formula: (AB)1+x+2yAl11?x?y(AC)xLiyO17:E, where 0<x+y<11; AC=Mg, Ca, Sr, Ba and/or Zn; AB=Na, K, Rb, and/or Cs; and E=Eu, Ce, Yb, and/or Mn. The phosphor may be used in conversion LED components.

Abstract: Semiconductor memory devices are provided. A semiconductor memory device includes a substrate. The semiconductor memory device includes a plurality of memory cell transistors vertically stacked on the substrate. The semiconductor memory device includes a first conductive line connected to a source region of at least one of the plurality of memory cell transistors. The semiconductor memory device includes a second conductive line connected to a plurality of gate electrodes of the plurality of memory cell transistors. Moreover, the semiconductor memory device includes a data storage element connected to a drain region of the at least one of the plurality of memory cell transistors.

Abstract: A leadframe has a die pad area and an outer layer of a first metal having a first oxidation potential. The leadframe is placed in contact with a solution containing a second metal having a second oxidation potential, the second oxidation potential being more negative than the first oxidation potential. Radiation energy is then applied to the die pad area of the leadframe contacted with the solution to cause a local increase in temperature of the leadframe. As a result of the temperature increase, a layer of said second metal is selectively provided at the die pad area of the leadframe by a galvanic displacement reaction. An oxidation of the outer layer of the leadframe is then performed to provide an enhancing layer which counters device package delamination.

Abstract: An array substrate, a display panel, and a method of fabricating an array substrate are provided. The array substrate includes a display region and a non-display region. The array substrate further includes a substrate, a first transparent layer disposed on the substrate corresponding to the display region, an interlayer insulating layer disposed on the substrate, and a second transparent layer disposed on the interlayer insulating layer.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first passivation layer, a first metal layer and a first semiconductor die. The first metal layer is embedded in the first passivation layer. The first metal layer defines a first through-hole. The first semiconductor die is disposed on the first passivation layer.

Abstract: A light emitting diode package is disclosed. The light emitting diode package includes a light emitting diode chip emitting light and a light transmissive member. The light transmissive member covers at least an upper surface of the light emitting diode chip and includes a light transmissive resin and reinforcing fillers. The reinforcing fillers have at least two side surfaces having different lengths and are dispersed in the light transmissive resin.

Abstract: A system and method. The system may include an integrated circuit (IC) die. The IC die may have two faces and sides. The system may further include mold material. The mold material may surround at least the sides of the IC die. The IC die may be mechanically interlocked with the mold material.

Abstract: A semiconductor device includes: a dielectric substrate; an integrated circuit (IC) die disposed inside an opening of the dielectric substrate, where the IC die is configured to transmit or receive radio frequency (RF) signals; a dielectric material in the opening of the dielectric substrate and around the IC die; a redistribution structure along a first side of the dielectric substrate, where a first conductive feature of the redistribution structure is electrically coupled to the IC die; a second conductive feature along a second side of the dielectric substrate opposing the first side; a via extending through the dielectric substrate, where the via electrically couples the first conductive feature and the second conductive feature; and an antenna at the second side of the dielectric substrate, where the second conductive feature is electrically or electromagnetically coupled to the antenna.

Abstract: A semiconductor package structure, including a lead frame, a die disposed on the front side of the lead frame, and a molding piece disposed on the lead frame and encapsulates the die, wherein the lead frame is provided with two extension portions extending respectively from two sides of the molding piece, and the extension portion is provided with recessed front surface and back surface on which a plating layer is formed.

Abstract: A semiconductor device package includes a light-emitting device, a diffuser structure, a first optical sensor, and a second optical sensor. The light-emitting device has a light-emitting surface. The diffuser structure is above the light-emitting surface of the light-emitting device. The first optical sensor is disposed below the diffuser structure, and the first optical sensor is configured to detect a first reflected light reflected by the diffuser structure. The second optical sensor is disposed below the diffuser structure, and the second optical sensor is configured to detect a second reflected light reflected by the diffuser structure.

Abstract: Provided is a semiconductor device including: a substrate; an electrode layer provided on the substrate; a semiconductor chip being provided on the electrode layer, including a first side surface portion having a first angle with respect to a substrate surface of the substrate, and including a second side surface portion being provided below the first side surface portion and having a second angle smaller than the first angle with respect to the substrate surface; and a resin being provided around the electrode layer and the semiconductor chip and being in contact with the first side surface portion and the second side surface portion.

Abstract: A micro-LED display includes a casing, a light-transmitting cover, a micro-LED array substrate, a circuit board, and at least one functional component. The light-transmitting cover is disposed on the casing and has a display area, a non-display area, and a plurality of first vias. The first vias are located in the display area. The micro-LED array substrate is disposed between the light-transmitting cover and the casing. The micro-LED array substrate has a plurality of second vias overlapped with the first vias in an orthogonal projection direction. The circuit board is disposed between the micro-LED array substrate and the casing, and the circuit board has a functional component disposing area overlapped with the display area in the orthogonal projection direction. The functional component is disposed in the functional component disposing area. The functional component is overlapped with the second vias in the orthogonal projection direction.