Abstract: A chip packaging structure includes a chip, a redistribution layer, a solder ball, an encapsulant, and a stress buffer layer. The chip has an active surface and a back surface opposite to each other, and a peripheral surface connected to the active surface and the back surface. The redistribution layer is disposed on the active surface of the chip. The solder ball is disposed on the redistribution layer, and the chip is electrically connected to the solder ball through the redistribution layer. The encapsulant encapsulates the active surface and the back surface of the chip, the redistribution layer, and part of the solder ball. The stress buffer layer at least covers the peripheral surface of the chip. An outer surface of the stress buffer layer is aligned with a side surface of the encapsulant.

Abstract: The present disclosure relates to the field of display technology, and provides a display substrate and a method for manufacturing the same. The display substrate includes: a light-emitting substrate comprising a plurality of light-emitting regions which are arranged in parallel with a light propagation direction, and each light-emitting region is provided with a light-emitting layer; a defining layer provided on the light-emitting substrate and including a plurality of hollow-out portions, and the hollow-out portions correspond to the light-emitting regions one to one; and a plurality of micro-lenses provided in the hollow-out portions in a one-to-one correspondence manner. With the present disclosure, it is possible to prevent damage to an underlying light-emitting substrate when forming the micro-lenses and to enhance the stability of the micro-lenses.

Abstract: Provided is a memory device including a substrate, a plurality of stack structures, a protective layer, and a plurality of contact plugs. The stack structures are disposed over the substrate. The protective layer conformally covers top surfaces and sidewalls of the stack structures. The contact plugs are respectively disposed over the substrate between the stack structures. One of the contact plugs includes a narrower portion and a wider portion over the narrower portion. In a top view, the wider portion is separated from an adjacent protective layer by a distance.

Abstract: An electronic assembly has a backside capping layer, a host wafer having a back surface bonded to a top surface of the backside capping layer except for cavities in the wafer formed over areas of the backside capping layer, the cavities having side surfaces of the wafer. Chiplets have backsides bonded directly to at least portion of the areas of the top surface of the backside capping layer. A lateral dielectric material between side surfaces of the chiplets and side surfaces of the wafer, mechano-chemically bonds the side surfaces of the chiplets to the side surfaces of the wafer.

Abstract: Embodiments include semiconductor packages and methods to form the semiconductor packages. A semiconductor package includes a bridge with a hybrid layer on a high-density packaging (HDP) substrate, a plurality of dies over the bridge and the HDP substrate, and a plurality of through mold vias (TMVs) on the HDP substrate. The bridge is coupled between the dies and the HDP substrate. The bridge is directly coupled to two dies of the dies with the hybrid layer, where a top surface of the hybrid layer of the bridge is directly on bottom surfaces of the dies, and where a bottom surface of the bridge is directly on a top surface of the HDP substrate. The TMVs couple the HDP substrate to the dies, and have a thickness that is substantially equal to a thickness of the bridge. The hybrid layer includes conductive pads, surface finish, and/or dielectric.

Abstract: An organic electroluminescence element includes an anode, an organic light emitting layer disposed on an upper side of the anode, a first functional layer disposed over the organic light emitting layer and including NaF, a second functional layer disposed over the first functional layer and including an organic material containing Yb, and a cathode disposed on an upper side of the second functional layer. A method of manufacturing an organic electroluminescence element, includes forming an anode, forming an organic light emitting layer on an upper side of the anode, forming a first functional layer including NaF over the organic light emitting layer, forming a second functional layer including an organic material containing Yb over the first functional layer, and forming a cathode on an upper side of the second functional layer.

Abstract: A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, a molding layer and a sacrificial layer. The circuit layer includes conductive traces and conductive pads. The molding layer has an upper surface and a lower surface opposite to the upper surface, wherein the molding layer partially covers the conductive traces and the conductive pads, and first surfaces of the conductive traces and first surfaces of the conductive pads are exposed from the upper surface of the molding layer. The sacrificial layer covers the lower surface of the molding layer, second surfaces of the conductive pads.

Abstract: A method and related structure for a quad flat no-lead (QFN), dual flat no-lead (DFN) or small outline no-lead (SON) package without a leadframe. Disposing semiconductor chips face-up on a temporary carrier, disposing a first encapsulant layer around the semiconductor chip, the active layer and conductive stumps, forming a conductive layer and conductive contacts over the planar surface, disposing encapsulant over the first encapsulant layer, conductive layer and conductive contacts, forming a photoresist over the encapsulant with openings, forming conductive pads within the openings, forming a solderable metal system (SMS) or applying an organic solderability preservative (OSP) over the conductive pads, and cutting through the encapsulant around the chip to form the outline of a package.

Abstract: The current disclosure describes techniques for forming gate-all-around (“GAA”) devices from stacks of separately formed nanowire semiconductor strips. The separately formed nanowire semiconductor strips are tailored for the respective GAA devices. A trench is formed in a first stack of epitaxy layers to define a space for forming a second stack of epitaxy layers. The trench bottom is modified to have determined or known parameters in the shapes or crystalline facet orientations. The known parameters of the trench bottom are used to select suitable processes to fill the trench bottom with a relatively flat base surface.

Abstract: A method of manufacturing a light emitting device includes: bonding a light emitting element and a light transmissive member by a surface activated bonding method, which includes: activating a first bonding surface of the light emitting element to which the light transmissive member is to be bonded, by irradiating at least the first bonding surface with an ion beam, activating a second bonding surface of the light transmissive member to which the light emitting element is to be bonded, by irradiating at least the second bonding surface with an ion beam, and joining the light emitting element and the light transmissive member by bringing the activated first bonding surface and the activated second bonding surface into contact.

Abstract: A method of manufacturing a light emitting device includes: providing a first intermediate body including a substrate, first bonding members, a second bonding member, a light emitting element, a protecting element, a light transmissive member bonded to the light emitting element, and a light-shielding frame surrounding the light transmissive member in a top view, a portion of an outer periphery of the light-shielding frame being located above the protecting element such that at least a portion of the protecting element is exposed from the light-shielding frame in the top view; disposing a first resin between the light emitting element and the substrate by applying the first resin on the substrate in a region outside of the portion of the protecting element such that the first resin moves toward the light emitting element along the protecting element; and curing the first resin to obtain a first cover member.

Abstract: The present invention relates to an optical component and a transparent sealing member. An optical component has: at least one optical element; and a package that houses therein the optical element. The package has: a mounting board on which the optical element is mounted; a transparent sealing member bonded on the mounting board; a recessed section surrounding the optical element mounted on the mounting board; and a refractive index matching agent applied to the inside of the recessed section. The package has at least one groove in communication with the outside from the recessed section.

Abstract: Methods and apparatus are disclosed, including an example of a method of determining a distance between a first point and a second point. The method includes manipulating quantum states of at least first and second qubits of a quantum computing device based on a test vector representing the first point and a training vector representing the second point, performing quantum interference between the test vector and the training vector, performing a measurement on one or more of the qubits to determine the distance, and determining the distance from the measurement.

Abstract: A display apparatus includes a substrate including a bending area between a first area and a second area, and bent along a bending axis; a display unit provided over the first area of the substrate; and a wiring unit provided over the bending area and including a wiring crossing the bending axis, wherein the wiring includes a first central wiring having a straight line shape, a second central wiring parallel-positioned at one side of the first central wiring by having a certain distance from the first central wiring, and a first bridge wiring obliquely connecting the first central wiring with the second central wiring.

Abstract: A light-emitting unit is provided. The light-emitting unit includes a light-emitting element, a light conversion layer, and a color filter layer. The light conversion layer is disposed on the light-emitting element. The color filter layer covers the sidewalls of the light conversion layer. In addition, the light-emitting unit further includes a protection layer located between the color filter layer and the light conversion layer.

Abstract: A display substrate is provided, which includes a base substrate, a plurality of pixel units arranged on the base substrate, and a function layer arranged at a light-emitting side of at least one pixel unit of the plurality of pixel units, wherein the function layer is configured to shield a light beam toward a first direction among light beams emitted by the at least one pixel unit, the function layer includes an organic layer and a light-shielding layer, and the light-shielding layer is arranged on a part of the organic layer, and configured to shield the light beam toward the first direction among the light beams emitted by the at least one pixel unit. An on-board display device and a method for manufacturing the display substrate are further provided.

Abstract: A display apparatus includes light-emitting elements configured to emit light in a screen, a louver fixed on the screen with a fastener, and a member disposed on a surface of the louver around the fastener and configured to reflect, in multiple directions, external light incident to a portion around the fastener or absorb the external light.

Abstract: A display device includes: an underlayer, a first insulating film contacting an upper face of the underlayer, a semiconductor layer, a second insulating film, a first metal layer, a first resin layer, a first electrode, and a second resin layer, in order from a lower layer, wherein at least one of the underlayer, the first resin layer, and the second resin layer is a thin film layer having a maximum film thickness in a display region provided with a light-emitting element being thicker than a maximum film thickness in a frame region surrounding the display region.

Abstract: A display device includes a pixel in a display area. The pixel includes: a first electrode and a second electrode spaced from each other; a light emitting element between the first electrode and the second electrode, a first bank overlapping with one area of each of the first electrode and the second electrode in a plan view, the first bank including a first sidewall adjacent to the first end portion of the light emitting element and a second sidewall adjacent to the second end portion of the light emitting element; at least one of a third electrode on the first end portion of the light emitting element to connect the first end portion to the first electrode and a fourth electrode on the second end portion to connect the second end portion of the light emitting element to the second electrode.

Abstract: An integrated semiconductor device includes: a MEMS structure; an ASIC electronic circuit; and conductive interconnection structures electrically coupling the MEMS structure to the ASIC electronic circuit. The MEMS structure and the ASIC electronic circuit are integrated starting from a same substrate including semiconductor material; wherein the MEMS structure is formed at a first surface of the substrate, and the ASIC electronic circuit is formed at a second surface of the substrate, vertically opposite to the first surface in a direction transverse to a horizontal plane of extension of the first surface and of the second surface.