Abstract: A boosting circuit comprises a first boosting cell row and a second boosting cell row. The boosting circuit further comprises an analog comparison circuit for comparing the potential of boosting cells on the same stage, and selecting and outputting the lower or higher of the potentials. The potential of an N well is controlled using the output potential of the analog comparison circuit. Thereby, the amplitude of an N well potential can be suppressed, and a single N well region can be shared.

Abstract: A method of applying a wire voltage to a semiconductor device including a plurality of active regions and a field region insulating the plurality of active regions, wherein the field region includes a plurality of wires. The method includes applying an operating voltage required for an operation of the semiconductor device to at least one of the plurality of wires, and applying a voltage lower than the operating voltage to a wire adjacent to at least one of the plurality of active regions from among the plurality of wires. Thus, leakage current caused by an imaginary parasitic transistor due to a wire of the field region may be prevented.

Abstract: A microchip that can calibrate a plurality of circuits on the microchip with a current reference includes: at least a first circuit disposed on the microchip; at least a first local bias generation circuit, for generating a bias current that is input to the first circuit; an external current reference, coupled to the first local bias generation circuit, for updating the bias current; and a calibration logic, coupled to the first local bias generation circuit, for enabling the external current reference to update the bias current according to a valid calibration signal.

Abstract: This invention concerns interfacing to electronic circuits or systems operating at low temperature or ultra-low temperature using complementary metal-oxide semiconductor (CMOS) technology. Low temperature in this case refers to cryogenic temperatures in particular, but not exclusively, to the 4.2 K region. Ultra-low temperatures here refers to the sub-1 K range, usually accessed using dilution refrigerator systems. The electronic circuits comprise a controller (for writing and manipulation), an observer (for readout and measurement) circuits, or both, fabricated from ultra-thin silicon-on-insulator (SOI) CMOS technology.

Abstract: A system and method for controlling an IC in different operational modes involves automatically loading operational configurations of target circuitries in the IC for a determined operational mode into at least one register and operating the target circuitries in the IC according to the operational configurations that are automatically loaded into the at least one register.

Abstract: A voltage circuit and method charges a circuit node to a first predetermined voltage. The first predetermined voltage charged onto the circuit node is used for a first predetermined function during a first time period. A portion of charge from the circuit node is removed to circuitry coupled to the circuit node. The portion of the charge is reused during a second time period subsequent to the first time period. In one form a voltage generator has diode configurable transistors for passing current in only one direction depending upon whether the circuit node is being charged or discharged. In another form a switch couples the circuit node between a reference terminal and another circuit for charge reuse. Reuse of charge permits increased power savings.

Abstract: According to an aspect of the present invention, there is provided a reference voltage generation circuit including: a first transistor having a first gate, a first source and a first drain; a second transistor having a second gate connected to the first gate, a second source connected to the first source and a second drain; a first diode connected between a ground and a V? node; a first resistor connected between the V? node and the first drain; a second diode and a second resistor connected between the ground and a V+ node; a third resistor connected between the V+ node and the first drain; an operational amplifier including input ports connected to the V+ node and the V? node and an output port connected to the first gate and the second gate; and a fourth resistor connected between the ground and the second drain.

Abstract: A temperature independent reference circuit includes first and second bipolar transistors with commonly coupled bases. First and second resistors are coupled in series between the emitter of the second bipolar transistor and ground. The first and second resistors have first and second resistance values, R1 and R2, and third and second temperature coefficients, TC3 and TC2, respectively. The resistance values being such that a temperature coefficient of a difference between the base-emitter voltages of the first and second bipolar transistors, TC1, is substantially equal to TC2×(R2/(R1+R2))+TC3×(R1/(R1+R2)), resulting in a reference current flowing through each of the first and second bipolar transistors that is substantially constant over temperature. A third resistor coupled between a node and the collector of the second bipolar transistor has a value such that a reference voltage generated at the node is substantially constant over temperature.

Abstract: A pad input signal processing circuit includes a control unit for setting a level of a pad output terminal to which a first control signal is input in response to a power up signal, and a signal output unit for outputting a command signal in response to a signal of the pad output terminal and a second control signal.

Abstract: An input device including an electrode a width dimension of which changes in its direction of extension, an output portion an output signal of which corresponds to an electrostatic capacity induced between the electrode and an electrically charged body when the body approaches or touches the electrode, a detecting portion to detect a change of an output signal value of the output portion, and an operation recognizing portion configured to recognize, on the basis of the detected change of the output signal value, one of a pressing operation and a sliding operation of the body performed with respect to the electrode, wherein the pressing operation is performed by a moving action of the body in which the body approaches or touches the electrode, while the sliding operation is performed by a sliding action of the body in the direction of extension of the electrode while the body is held in close proximity to or in touch with the electrode.

Abstract: Conventional diode rectifiers usually suffer from a higher conduction loss. The present invention discloses a gate-controlled rectifier, which comprises a line voltage polarity detection circuit, a constant voltage source, a driving circuit and a gate-controlled transistor. The line voltage polarity detection circuit detects the polarity of the line voltage and controls the driving circuit to turn on or turn off the gate-controlled transistor. The gate-controlled transistor may be a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with a gate, a source and a drain or an Insulated Gate Bipolar Transistor (IGBT) with a gate, an emitter and a collector. The constant voltage source is provided or induced by external circuits and referred to the source of the MOSFET or the emitter of the IGBT. Thanks to a lower conduction loss, this gate-controlled rectifier can be applied to rectification circuits to increase the rectification efficiency.

Abstract: A method and an apparatus powers down an analog integrated circuit. A power down circuit is electrically coupled to the analog circuit and is adapted to power down the analog circuit in response to receiving a power down signal. A node protection circuit is electrically coupled to the analog circuit and is adapted to provide a predetermined voltage potential to at least one predetermined node in the analog circuit in response to receiving the power down signal when a voltage potential at the at least one predetermined node is not determined by the power down circuit.

Abstract: A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased.

Abstract: A trigger circuit generates a trigger signal when a differential input signal crosses a differential threshold voltage level. A first side of the differential input signal is applied to a first terminal of a first load termination resistor. A second side of the differential signal is applied to a first terminal of a second load termination resistor. A first side of the differential threshold voltage level is applied to a second terminal of the first load termination resistor. A second side of the differential threshold voltage level is applied to a second terminal of the second load termination resistor. A comparator generates the trigger signal when a voltage level at the first terminal of the first resistor exceeds a voltage level at the first terminal of the second resistor.

Abstract: A near ideal single frequency and band pass filter comprises an input unit, a filter combination, and an output unit. The input unit accepts an input signal which can be expressed with a mathematical formula f(t). The filter combination comprises a plurality of filters, wherein each filter can generate a control signal and performs the signal filtering process based on the control signal. The control signal can be expressed with a mathematical formula hde(?). The filter combination processes the input signal based on a set of a plurality of control signals by means of a formula.

Abstract: A temperature sensor circuit comprises a first reference voltage generator configured to generate a first signal that linearly varies with temperature and a first reference voltage signal that maintains a certain level irrespective of temperature, a second reference voltage generator configured to generate a second reference voltage signal by using the first reference voltage signal, and a controller configured to compare the first signal with the second reference voltage signal and control a voltage level of the first signal according to a comparison result.

Abstract: A readout circuit for touch panel includes first and second switches, an operational amplifier (OP-AMP), a feedback capacitor, a comparison unit, and a counter. A first input terminal and an output terminal of the OP-AMP are respectively coupled to a second terminal of the first switch and an input terminal of the comparison unit. A second input terminal of the OP-AMP receives a reference voltage. Two terminals of the feedback capacitor and the second switch are respectively coupled to the first input terminal and the output terminal of the OP-AMP. The comparison unit selects first or second threshold voltages to compare with an output of the OP-AMP according to a output of the comparison unit. An input terminal of the counter receives the output of the comparison unit.

Abstract: A CPU core voltage supply circuit includes a reference voltage generator, a differential operation amplifier, a power element, a feedback circuit and a first capacitor. The reference voltage generator outputs a first reference voltage. The differential operation amplifier has a positive input end, a negative input end and an output end. The positive input end is connected to the reference voltage generator for receiving the first reference voltage. The power element has a receiving terminal and a current output terminal. The receiving terminal is connected to the output end of the differential operation amplifier. The feedback circuit is connected to the current output terminal and outputs a feedback voltage to the negative input end of the differential operation amplifier. The first capacitor has an end connected to the current output terminal of the power element and the other end receiving a first voltage, thereby providing a CPU core voltage.

Abstract: A method and system for providing an output voltage greater than a voltage provided by a voltage supply in a semiconductor device are disclosed. The method and system include providing a plurality of clock signals, providing a first stage and providing a second stage. The first stage includes at least a first pumping node, a pumping capacitor and a device coupled with the pumping node, and an auxiliary capacitor pair for providing an undershoot for the device for value(s) of the clock. The auxiliary and pumping capacitors receive a first portion of the clock signals. The second stage includes at least a second pumping node. The first and second portions of the clock signals are provided to the first and second stages, respectively. The first stage and the second stage are configured to alternately charge and fully discharge based on the clock signals.

Abstract: The invention relates to a method for obtaining temperature values from at least two thermal sensors arranged on resources within a three-dimensional die structure determining at least a partial three-dimensional temperature distribution for said die structure and controlling activity of said resources of said dies in response to said three-dimensional temperature distribution.