Patents Examined by John D. Smith
  • Patent number: 4584205
    Abstract: In an improved method for growing an oxide layer on a silicon surface of a semiconductor body, the semiconductor body is first provided with a silicon surface. A first oxide layer portion is then grown over the silicon surface in a first thermal oxidation process at a temperature of less than about 1000.degree. C. The semiconductor device is then annealed in a nonoxidizing ambient at a temperature above about 1000.degree. C., and finally a second oxide layer portion is then grown over the first oxide layer portion in a second thermal oxidation process to complete the growth of the oxide layer. The silicon surface may be of either polycrystalline or monocrystalline material. This method avoids both the dopant outdiffusion problems associated with present high-temperature oxidation processes and the stress-related irregularities associated with known low-temperature oxidation processes.
    Type: Grant
    Filed: July 2, 1984
    Date of Patent: April 22, 1986
    Assignee: Signetics Corporation
    Inventors: Teh-Yi J. Chen, Anjan Bhattacharyya, William T. Stacy, Charles J. Vorst, Albert Schmitz
  • Patent number: 4582726
    Abstract: In fabricating membrane elements, and especially spiral wound membrane elements, for the separation of extraction solvents, especially N-methyl-2-pyrrolidone (NMP) from extracted oil fractions (e.g., extract of raffinate), adhesive systems consisting of specific silicone elastomers in combination with specific primers have been identified which are useful in forming the bonds necessary to produce an element, as for example, in forming the edge-seal bonds of the membrane that is used to effect the separation, in bonding the membrane leaves to the metal or plastic components of the element, and in forming a protective outer-wrap for the element.
    Type: Grant
    Filed: December 14, 1983
    Date of Patent: April 15, 1986
    Assignee: Exxon Research and Engineering Co.
    Inventors: Harry F. Shuey, William M. King
  • Patent number: 4582727
    Abstract: Metal substrates with a protective coating are provided, the coating being formed of a varnish-bonded, carbon-containing layer adherently bonded to the metal substrate. Optionally, the coating may also contain a dispersion of finely divided material selected from the group consisting of certain metal oxides and carbonates.
    Type: Grant
    Filed: March 20, 1984
    Date of Patent: April 15, 1986
    Assignee: Amax Inc.
    Inventors: Ramaswami Neelameggham, John C. Priscu
  • Patent number: 4582729
    Abstract: A process for metal plating plastic or elastomeric materials which produces a coating of high conductivity which does not reduce over time is disclosed in this application to provide electro-magnetic interference shielding for said materials. This process uses either a particular special plating bath containing stabilizer additions with any surface preparation technique, or a certain specific surface preparation technique along with the use of a standard plating bath or the special stabilized plating bath to obtain metal coatings with the desired properties.
    Type: Grant
    Filed: June 30, 1983
    Date of Patent: April 15, 1986
    Assignee: LeaRonal, Inc.
    Inventors: Chris Tsiamis, John E. McCaskie
  • Patent number: 4581250
    Abstract: A method of making a microwave semiconductor component and concurrently forming therewith a mounting membrane adapted for positioning the semiconductor component in an RF transmission medium such as a waveguide. Substantially concurrently with the deposition of a metallic film in connection with forming a semiconductor elements, there is deposited a metallic membrane on the base silicon substrate and outside of the circuit element. The outer periphery of the base substrate is removed to expose the membrane. The metallic membrane is preferably of gold.
    Type: Grant
    Filed: September 13, 1984
    Date of Patent: April 8, 1986
    Assignee: M/A-COM, Inc.
    Inventors: Albert L. Armstrong, William Moroney
  • Patent number: 4576112
    Abstract: A device for applying a treatment medium, especially in foam form, to a running web of material, especially a rug web, with an application beam extending transversely to the web of material, the application beam having a longitudinal slot, through which the treatment medium emerges onto the web of material. On the side opposite the slot an elastic cushion which presses the web of material against the sliding surface of the application beam is arranged on the back of the web of material. The cushion may be an inflatable elastic hollow body or a foam material cushion.
    Type: Grant
    Filed: April 23, 1984
    Date of Patent: March 18, 1986
    Assignee: Eduard Kusters
    Inventors: Bernhard Funger, Heinz Gruber, Werner Hartmann, Julius Kohnen, Johannes Kutz, Manfred Moser
  • Patent number: 4576834
    Abstract: A streamlined process for forming a fully recessed, self-planarized dielectric isolation structure involves selectively depositing organosilicon material such as orthosilicate esters or siloxane resins in substrate trenches without build-up on adjacent substrate steps, which steps are coated with a non-wetting polymer material such as fluorocarbon compounds, then converting the organosilicon material to silicon oxide by heating at about 200.degree. C.-900.degree. C.
    Type: Grant
    Filed: May 20, 1985
    Date of Patent: March 18, 1986
    Assignee: NCR Corporation
    Inventor: Zbigniew P. Sobczak
  • Patent number: 4576114
    Abstract: An improved crystal plating device having a base containing a power circuit and an oscillating circuit. The base is provided with a chamber and has a sealed top enclosing the chamber. At least one pair of filament posts are fixed to the base and disposed within the chamber and in the power circuit. A filament is connected across the filament post. A crystal holder is removably connected with the base. The crystal is held by the holder in the oscillating circuit. A pump is connected to the base to vacuum pump the chamber. Energizing the circuits will oscillate the crystal and evaporate the filament to plate the crystal and produce the desired frequency therefore. The improvement comprises a crystal holder designed to hold a plug-in circuit board having a plurality of prongs, the board containing the crystal. The crystal holder includes plug-in means for inserting the prongs of the circuit board in the oscillating circuit.
    Type: Grant
    Filed: August 27, 1984
    Date of Patent: March 18, 1986
    Assignee: Emkay Manufacturing Co.
    Inventors: Alan Kaplan, James Amato
  • Patent number: 4574733
    Abstract: Apparatus for shielding substrates from plasma developed adjacent the ends of r.f. powered cathodes, the apparatus adapted for use in a glow discharge deposition system in which successive amorphous semiconductor layers are deposited onto a substrate. The deposition system includes at least one deposition chamber into which process gases are introduced and disassociated in the presence of electrodynamic fields created between a cathode and a substrate. The shielding apparatus of the present invention comprises a pair of relatively narrow, elongated plates adapted to be spacedly disposed in the deposition chamber so as to lie in a plane substantially parallel to the plane of the substrate. By disposing one of the plates adjacent each of the ends of the cathode, only homogeneous semiconductor films formed by uniform electrodynamic fields produced adjacent the central portion of the cathode are deposited onto the substrate.
    Type: Grant
    Filed: September 16, 1982
    Date of Patent: March 11, 1986
    Assignee: Energy Conversion Devices, Inc.
    Inventors: Prem Nath, Kevin R. Hoffman
  • Patent number: 4575462
    Abstract: A method of growing an alloy film by a layer-by-layer process on a substrate is described, together with a method of making an semiconductor device in which an alloy film is grown on a substrate by a layer-by-layer process. The atomic ratio of constituents present in the alloy film is determined during growth of the film from the growth rates of the alloy film and of at least one intermediate film consisting of at least one constituent of the alloy. The intermediate film or films are grown between the alloy film and the substrate. During growth of each film, the growth surface is irradiated with a beam of electrons and measurement is carried out of the period of oscillations in the intensity of the stream of electrons diffracted at the growth surface, or specularly reflected by the growth surface, or emitted from the growth surface, or of the current flowing to ground through the substrate. These periods are equal to the respective times taken to grow on a monolayer of the respective film.
    Type: Grant
    Filed: November 17, 1983
    Date of Patent: March 11, 1986
    Assignee: U.S. Philips Corporation
    Inventors: Peter J. Dobson, Charles T. Foxon, James H. Neave
  • Patent number: 4575467
    Abstract: Complex compounds of elements of sub-groups 1 and 8 of the periodic table in oxidation stages 1-4 with unsaturated ketones of the formula ##STR1## wherein R.sub.1 and R.sub.4 denote alkyl, cycloalkyl or aryl andR.sub.2 and R.sub.3 denote hydrogen or alkyl, are outstandingly suitable for activating substrate surfaces for electroless metallization since these complexes are distinguished by a high storage stability. The palladium complexes of but-3-en-2-one and hept-3-en-2-one are preferred.
    Type: Grant
    Filed: June 27, 1984
    Date of Patent: March 11, 1986
    Assignee: Bayer Aktiengesellschaft
    Inventors: Kirkor Sirinyan, Rudolf Merten, Henning Giesecke, Gerhard D. Wolf
  • Patent number: 4569902
    Abstract: A method for manufacturing a multilayer circuit substrate includes the step of providing an insulating substrate formed of an inorganic oxide and supporting a laminate formed by alternately laminating wiring layers of copper and insulating layers of an inorganic oxide. The uppermost layer of the laminate is constituted by a copper wiring layer. A layer of electrically conductive material capable of being subjected to wire bonding is formed by a low temperature deposition on the surface of the laminate. Subsequently, the conductive material layer is selectively removed by photoetching to allow the portion connected to part of the uppermost copper wiring layer to remain. In this manner, the pattern layer capable of wire bonding can be formed.
    Type: Grant
    Filed: January 28, 1985
    Date of Patent: February 11, 1986
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Tamio Saito
  • Patent number: 4567061
    Abstract: An insulation film of improved properties and an interface of similarly improved properties between the insulation film and a semiconductor are produced by heating silicon, a silicon compound or a silicon dioxide film in an atmosphere formed by incorporating a carbon fluorine gas into an oxidative gas.
    Type: Grant
    Filed: July 30, 1984
    Date of Patent: January 28, 1986
    Assignees: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Yutaka Hayashi, Iwao Hamaguchi, Kiyohiko Kobayashi
  • Patent number: 4565156
    Abstract: A solution growth apparatus for conducting an epitaxial growth of a compound semiconductor crystal from solution by relying on the temperature difference technique at a constant growth temperature and on a mass production scale without deranging the control of the growth temperature applied externally of the growth apparatus and with the application of only a small heating power and only a small cooling power, by enhancing the thermal exchange efficiency through the provision of heating means, via an insulator, for the melt-containing reservoir provided on the growth boat housed within a quartz reactor and by the provision of cooling means at the bottom of the boat within the reactor.
    Type: Grant
    Filed: February 28, 1983
    Date of Patent: January 21, 1986
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Yasuo Okuno
  • Patent number: 4565712
    Abstract: A semiconductor read only memory having a plurality of MOS transistors and polycrystalline or amorphous silicon resistances connected to the source or drain regions of the MOS transistors, laser beams irradiating selected silicon resistances to thermally activate those resistances and store the required data.
    Type: Grant
    Filed: May 23, 1984
    Date of Patent: January 21, 1986
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hideo Noguchi, Tugunari Iwamoto, Sakae Takei
  • Patent number: 4563368
    Abstract: A method of making a facet coating for a semiconductor light emitting device, such as a semiconductor laser or the like, comprising the steps of depositing a thin layer of a reactive material on the cleaved facet to getter oxygen and other reactive contaminants therefrom, and controlling the thickness of the deposition to be sufficiently thick to react with an optimum amount of said contaminants but sufficiently thin in order that the reactive material is sufficiently consumed in the gettering process to render the thin layer electrically nonconductive if conductive in nature. The reactive material may be selected from the group consisting of Al, Si, Ta, V, Sb, Mn, Cr and Ti. Al has been found to be particularly good as a passivating layer with a preferred thickness for the layer being in the range of about 20 .ANG. to 75 .ANG., depending upon whether the layer is for purposes of surface passivation or interface passivation.
    Type: Grant
    Filed: September 4, 1984
    Date of Patent: January 7, 1986
    Assignee: Xerox Corporation
    Inventors: Peter Tihanyi, Robert S. Bauer
  • Patent number: 4562088
    Abstract: Apparatus and techniques for maintaining a constant flow rate of a coating material in a painting system are presented. A test loop is provided in shunt with the conduit passing a coating material in a painting system. The test loop determines a sensitivity factor for the coating, establishing for that coating a relationship between temperature changes and pressure. That sensitivity factor is then used to regulate the pressure at the spray nozzles to compensate for temperature changes experienced in the coating material.
    Type: Grant
    Filed: June 6, 1984
    Date of Patent: December 31, 1985
    Assignee: Nordson Corporation
    Inventor: Richard R. Navarro
  • Patent number: 4562092
    Abstract: A substrate and method of manufacture wherein a substrate is molded from particulate material wherein grooves on and through the body are formed during substrate molding and prior to sintering. The substrate includes all buss structure molded therein. Cooling of chips is provided by providing a heat sink in grooves formed within a substrate and beneath the chips. Microcircuits are formed by disposing on the substrate and interconnecting via buss structures on the substrate various semiconductor dies with encapsulation of some or all of the substrates and components thereon, if desired. In addition, connection from the board to external circuits is available by means of an edge connector.
    Type: Grant
    Filed: October 30, 1984
    Date of Patent: December 31, 1985
    Assignee: Fine Particle Technology Corporation
    Inventor: Raymond E. Wiech, Jr.
  • Patent number: 4560593
    Abstract: A process for depositing metals onto electrically conductive, polymeric carriers, wherein a finely divided metal M having a standard potential E.sub.o of >-2 V is deposited, from a solution of a metal cation compound of the formula (I) ##EQU1## where M', L.sup.1, L.sup.2, L.sup.3, L.sup.4, l, m, n, o, and p are as defined in the claims, in an aprotic polar or non-polar solvent, onto a polymeric, electrically conductive carrier of the formula (II) ##EQU2## where M" is Li, Na, K, Rb or Cs,P is P=--CH--, --C.sub.6 H.sub.4 --, --C.sub.4 H.sub.2 S--, --C.sub.6 H.sub.4 S--, --C.sub.4 H.sub.2 O--, --C.sub.4 H.sub.2 NH-- --C.sub.6 H.sub.4 O-- or --C.sub.5 H.sub.3 N--y is from 0.001 to 0.6 andx is from 5 to 1,000, or onto a polymeric, electrically conductive carrier of the formula (III)[(P)(X).sub.y ].sub.x (III)whereP is one of the groups listed for formula (II), X is ClO.sub.4.sup..crclbar., AsF.sub.6.sup..crclbar., PF.sub.6.sup..crclbar., SbF.sub.6.sup..crclbar., BF.sub.4.sup..crclbar., HSO.sub.4.sup..crclbar.
    Type: Grant
    Filed: October 19, 1984
    Date of Patent: December 24, 1985
    Assignee: BASF Aktiengesellschaft
    Inventors: Herbert Naarmann, Volker Munch, Klaus Penzien
  • Patent number: 4560582
    Abstract: A semiconductor device including a MOS field effect transistor formed on a single silicon crystal substrate having source and drain diffused regions of reduced depth. In order to avoid penetration of aluminum from the aluminum connector through the diffused region into the substrate, the diffused region is formed by double diffusion of at least two types of impurities of the same conductive type, but having different diffusion coefficients with respect to each other.
    Type: Grant
    Filed: June 7, 1984
    Date of Patent: December 24, 1985
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventor: Matsuo Ichikawa