Abstract: An illustrative unified data storage method includes providing, by a data storage system, block containers that represent a linear address space of blocks; and using, by the data storage system, the block containers to store content for a plurality of different data storage services. In certain examples, the different data storage services include at least one of a file storage service, an object storage service, or a database service.

Abstract: Methods, devices, and systems for GPU cache injection. A GPU compute node includes a network interface controller (NIC) which includes NIC receiver circuitry which can receive data for processing on the GPU, NIC transmitter circuitry which can send the data to a main memory of the GPU compute node and which can send coherence information to a coherence directory of the GPU compute node based on the data. The GPU compute node also includes a GPU which includes GPU receiver circuitry which can receive the coherence information; GPU processing circuitry which can determine, based on the coherence information, whether the data satisfies a heuristic; and GPU loading circuitry which can load the data into a cache of the GPU from the main memory if on the data satisfies the heuristic.

Abstract: The disclosed computer-implemented method may include configuring a plurality of watcher processes for observing and logging performance of one or more storage devices. Each watcher process may be configured with a trigger condition and a resource limit and organized into tiers based on resource limit. The method may include initiating a first watcher process of a first tier to observe one of the one or more storage devices and monitoring, with a watcher service, the first watcher process for the trigger condition of the first watcher process. The method may further include, in response to detecting the trigger condition, processing an output of the first watcher process and initiating, based on the processed output, a second watcher process of a second tier, wherein the second tier corresponds to a higher resource limit than the first tier. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A system for estimating one or more data storage parameters and/or statistics in a data storage system is presented. The data storage system includes a plurality of storage containers. The system includes a snapshot module, a container stats aggregator, a synchronization module, a global stats aggregator, and storage stats estimator.

Abstract: Features are disclosed for forecasting a usage of a block storage volume with a first configuration by a user. A computing device can forecast the usage of the block storage volume based on the historical usage of the block storage volume by the user. The computing device can determine additional potential configurations of the block storage volume. The computing device can further simulate the additional potential configurations of the block storage volume based on the forecasted usage of the block storage volume. The additional potential configurations may include a volume type, a volume size, or other volume characteristics. Based on the simulations of the additional potential configurations, the computing device may determine a recommended configuration. The computing device can dynamically modify the block storage volume based on the recommended configuration of the block storage volume.

Abstract: According to one embodiment, a buffer stores first hash values and first complementary data. A first conversion unit converts consecutive characters in a second character string into second hash values and second complementary data. A search unit searches for consecutive first hash values from the buffer, and output a pointer. A selection unit selects consecutive first hash values and pieces of first complementary data from the buffer. A second conversion unit converts the consecutive first hash values into a third character string using the pieces of first complementary data. A comparison unit compares the second character string with the third character string to acquire a matching length. An output unit output the matching length with the pointer.

Abstract: A memory system includes a storage device including a turbo write buffer and a user storage area implemented with a nonvolatile memory, and a host configured to transfer a read request to the storage device. In response to the read request, the storage device transfers read data and read data information including attributes of the read data to the host.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to set a decoder in data mode, read host memory buffer data and hashes from a host memory buffer, generate a first calculated hash, set the decoder in hash mode, generate a second calculated hash, and determine whether the second calculated hash is the same as a root hash. The controller is further configured to set an encoder in data mode, generate a first new hash, write new data and the first new hash to a host memory buffer, set the encoder to hash mode, calculate a second new hash, and update a root hash with the second new hash.

Abstract: Accesses between a processor and its external memory is reduced when the processor internally maintains a compressed version of values stored in the external memory. The processor can then refer to the compressed version rather than access the external memory. One compression technique involves maintaining a dictionary on the processor mapping portions of a memory to values. When all of the values of a portion of memory are uniform (e.g., the same), the value is stored in the dictionary for that portion of memory. Thereafter, when the processor needs to access that portion of memory, the value is retrieved from the dictionary rather than from external memory. Techniques are disclosed herein to extend, for example, the capabilities of such dictionary-based compression so that the amount of accesses between the processor and its external memory are further reduced.

Abstract: Disclosed is a controller for a disaggregated memory device. The controller may receive a request to allocate memory of a specific size from the disaggregated memory device to a computing device, and may generate a memory block device in the specific size from a memory pool formed from physical memory modules configured on the disaggregated memory device. The controller may expose the memory block device to the computing device as a Non-Volatile Memory Express (“NVMe”) target device, and may control access to the memory block device by converting NVMe access requests in a first format from the computing device to access requests in a different second format supported by the memory block device.

Abstract: According to one embodiment, a memory system is connectable to a host as a type 3 compute express link (CXL) device. A controller of the memory system packs, at a CXL link layer, a response command with data (DRS) and/or a response command without data (NDR), received from an upper CXL transaction layer, into a flit including four slots, and transmits the response command to a lower CXL ARB/MUX layer, and selects, based on a remaining number of data slots of DRS packed in a first flit that has been transmitted to the CXL ARB/MUX layer, a remaining number of DRS, a remaining number of NDR, and a number of empty slots in a second flit to be transmitted subsequently to the CXL ARB/MUX layer, a format to be used in slots in a second flit.

Abstract: Memory management circuitry and processes operate to improve reliability of a group of memory stacks, providing that if a memory stack or a portion thereof fails during the product's lifetime, the system may still recover with no errors or data loss. A front-end controller receives a block of data requested to be written to memory, divides the block into sub-blocks, and creates a new redundant reliability sub-block. The sub-blocks are then written to different memory stacks. When reading data from the memory stacks, the front-end controller detects errors indicating a failure within one of the memory stacks, and recovers corrected data using the reliability sub-block. The front-end controller may monitor errors for signs of a stack failure and disable the failed stack.

Abstract: Provided are a data processing method and apparatus capable of rapidly searching for data compressed and stored in non-volatile storage means by compressing a data record, stored in a volatile in-memory database, in a partition unit, storing the compressed data record in the non-volatile storage means, and storing, in a table of the volatile in-memory database, a storage key to uniquely identify each of partitions stored in the non-volatile storage means and sorting information used to determine a partition for a data record.

Abstract: A memory device includes a plurality of memory blocks, a read count storage, and a read reclaim processor. The read count storage stores read count information including a read count of each of the plurality of memory blocks. The read reclaim processor provides a memory controller with a status read response including a status code representing a priority order of a read reclaim operation on a target block, in response to a status read command received from the memory controller.

Abstract: A control apparatus includes a processor configured to execute a procedure including: receiving, from a processing device, a reading request to read a first data piece among a plurality of data pieces included in a data set, the processing device executing a given process on each of the data pieces; reading the first data piece from a first storage tier among a plurality of hierarchical storage tiers having respective different reading capabilities; transmitting the read first data piece to the processing device in response to the reading request; measuring a processing time that the processing device takes to execute the given process; determine a storage tier that is to store the first data piece among the hierarchical storage tiers based on the reading capabilities and the measured processing time; and migrating the first data piece from the first storage tier to the determined storage tier.

Abstract: An information handling system may have a long short term memory (LSTM) that receives Input/Output (I/O) parameters, and produces a prediction output by operation of a recursive neural network (RNN). An I/O optimizer provides the I/O parameters to the LSTM and receives the prediction output from the LSTM. The I/O optimizer may include a manager module configured to provide control signals to control gates for controlling application of the I/O parameters and the prediction output, and a collector module configured to collect the I/O parameters.

Abstract: Systems for high performance restore of data to storage devices. A method embodiment commences upon identifying a plurality of virtual disks to be grouped together into one or more consistency sets. Storage I/O commands for the plurality of virtual disks of the consistency sets are captured into multiple levels of backup data. On a time schedule, multiple levels of backup data for the virtual disks are cascaded by processing data from one or more higher granularity levels of backup data to one or more lower granularity levels of backup data. A restore operation can access the multiple levels of backup data to construct a restore set that is consistent to a designated point in time or to a designated state. Multiple staging areas can be maintained using lightweight snapshot data structures that each comprise a series of captured I/Os to be replayed over other datasets to generate a restore set.

Abstract: A method for predicting logical blocks address (LBA) information, including: receiving, by a Solid State Drive (SSD), a trace sent from a host, wherein the host can acquire the trace in a reusable environment; determining, by the SSD, one or more LBAs received by the SSD according to the trace; obtaining, by the SSD, a distribution of the LBAs by learning the LBAs based on a preset learning algorithm; and predicting, by the SSD, one or more subsequent LBAs based on the distribution of the LBAs. As a result, it can perform heat classification and prediction of the following LBA used in the SSD by means of learning the LBA distribution of the SSD in a certain reusable environment of the host, thus to improve the hit rate of reading and writing and the efficiency of classification of hot and cold data in garbage collection.

Abstract: In an example, an apparatus may include a memory comprising a number of groups of memory cells and a controller coupled to the memory and configured to track respective invalidation velocities of the number of groups of memory cells and to assign categories to the number of groups of memory cells based on the invalidation velocities.

Abstract: A comparison unit configured to compare volume of unnecessary data of a first semiconductor memory to a threshold of the first semiconductor memory, which is set in advance, and a transmission unit configured to transmit a delete command to the first semiconductor memory in accordance with a comparison result indicating that the volume of the unnecessary data of the first semiconductor memory is larger than the threshold of the first semiconductor memory are provided, and the transmission unit transmits a delete command to the second semiconductor memory upon transmission of the delete command to the first semiconductor memory.