Patents Examined by Jonah C Krieger
  • Patent number: 10956090
    Abstract: Life of a non-volatile memory is extended without increasing processing time due to turning power ON/OFF. An EEPROM stores counter information and setting information, a first RAM and a second RAM store counter information and setting information, a memory management unit manages a storage area in the first RAM for the counter information and setting information so as to be updatable and manages a storage area in the second RAM for the counter information and setting information so as not to be updatable, and a system control unit, when a change in contents of the counter information and the setting information occurs, rewrites the counter information and the setting information in the first RAM in accordance to the changed contents, and when the power is turned OFF, reads and compares the counter information and the setting information in the first RAM with the counter information and the setting information in the second RAM, and writes only different data to the EEPROM.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: March 23, 2021
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Yukio Iwasaki
  • Patent number: 10895999
    Abstract: A data reading method is provided. The method includes: using a predetermined read voltage corresponding to a read operation to read a target physical page to obtain a read codeword syndrome of a read codeword; using a first adjust read voltage to read again the target physical page to obtain a first adjust codeword syndrome of a first adjust codeword; generating soft information of each of a plurality of target memory cells of the target physical page according to the read codeword and the first adjust cordword; identifying a target confidence table according to a size relative relation between the foregoing syndromes to find a confidence value of each of the target memory cells from the target confidence table; and performing an adjusted preset decoding operation according to the soft information and the confidence values to obtain a valid codeword, so as to complete the read operation.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: January 19, 2021
    Assignee: Shenzhen EpoStar Electronics Limited CO.
    Inventor: Yu-Hua Hsiao
  • Patent number: 10891074
    Abstract: A method of operating a key-value storage device includes a key-value storage device receiving from a host a first command including a first key, a first value, and a first snapshot identification (ID), the key-value storage device generating a first snapshot entry including the first snapshot ID, the first key, and a first physical address in a non-volatile memory device at which the first value is written, in response to the received first command, receiving from the host a second command including the first key, a second value, and a second snapshot ID, and in response to the received second command, the key-value storage device generating a second snapshot entry including the second snapshot ID, the first key, and a second physical address in the non-volatile memory device at which the second value is written.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: January 12, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Hwa Lee, Young-Ho Park, Byung-Ki Lee, Hyung-Chul Jang, Je-Kyeom Jeon, Sung-Kug Cho
  • Patent number: 10877690
    Abstract: A memory system includes a memory device including a plurality of pages in which data are stored and a plurality of memory blocks which include the pages; and a controller suitable for transmitting capacity information of the memory device to a host in response to a user request received from the host, receiving a boost command corresponding to the capacity information, from the host, and triggering a background operation corresponding to the boost command.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: December 29, 2020
    Assignee: SK hynix Inc.
    Inventor: Eu-Joon Byun
  • Patent number: 10877890
    Abstract: Provided are an apparatus and system to cache data in a first cache and a second cache that cache data from a shared memory in a local processor node, wherein the shared memory is accessible to at least one remote processor node. A cache controller writes a block to the second cache in response to determining that the block is more likely to be accessed by the local processor node than a remote processor node. The first cache controller writes the block to the shared memory in response to determining that the block is more likely to be accessed by the one of the at least one remote processor node than the local processor node without writing to the second cache.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: December 29, 2020
    Assignee: INTEL CORPORATION
    Inventors: Alaa R. Alameldeen, Gino Chacon
  • Patent number: 10866751
    Abstract: The present invention provides a method for managing a flash memory module, wherein the flash memory module includes a plurality of flash memory chips, each flash memory chip includes a plurality of first temporary blocks and a plurality of second temporary blocks, each of the first and second temporary blocks and the data blocks includes a plurality of pages, and the method includes: writing data into one of the second temporary blocks; and when an access of the flash memory module meets a specific condition, moving the data stored in the second temporary block to one of the first temporary blocks, and storing information of a first blank page of the second temporary block to the first temporary block.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: December 15, 2020
    Assignee: Silicon Motion, Inc.
    Inventor: Kuan-Yu Ke
  • Patent number: 10860497
    Abstract: The present disclosure provided a method, apparatus, and system for caching data. In an embodiment of the present disclosure, the method for caching data comprises: recording, within a recording period for recording access count information of the data, access count information on respective data, wherein the recording period includes a plurality of recording timeslots, wherein the recording of the access count information within a single recording timeslot is restricted, while the access count information within the plurality of recording timeslots is aggregated; and promoting, in response to expiration of the recording period, the respective data into a cache area based on the access count information.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: December 8, 2020
    Assignee: EMC IP Holding Company, LLC
    Inventors: Bob Yan, Bernie Hu, Vincent Wu, Jia Huang, Amber Li
  • Patent number: 10860480
    Abstract: Embodiments of the present disclosure relate to a method and a device for cache management. The method includes: in response to receiving a write request for a cache logic unit, determining whether a first cache space of a plurality of cache spaces associated with the cache logic unit is locked; in response to the first cache space being locked, obtaining a second cache space from the plurality of cache spaces, the second cache space being different from the first cache space and being in an unlocked state; and performing, in the second cache space, the write request for the cache logic unit.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: December 8, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Lifeng Yang, Ruiyong Jia, Liam Xiongcheng Li, Hongpo Gao, Xinlei Xu
  • Patent number: 10846094
    Abstract: Embodiments of the present invention relate to a method and system for managing data access in a storage system. A method for managing data access in a storage system, the method comprising: obtaining state information about available resources in a storage control node in the storage system; determining, based on the state information, a credit score descriptive of processing capacity of the storage control node for data access; and publishing the credit score so as to notify a host of the processing capacity of the storage control node for the data access.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: November 24, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: LIfeng Yang, Xinlei Xu, Jian Gao, Ruiyong Jia, Yousheng Liu
  • Patent number: 10824512
    Abstract: A storage system in one embodiment comprises a storage controller and a plurality of storage devices comprising a plurality of memory portions. The storage controller is configured to monitor a plurality of servers for a failure event. The servers store a plurality of copies of the memory portions. The storage controller is further configured to mark as invalid a copy of a memory portion on a failed server, search for and identify a location on an operational server for storing a new version of the copy, and communicate the copy invalidity and the identified location to a client device using the memory portion. The client device is configured to generate the new version of the copy for storage on the operational server, and the storage controller receives a notification from the client device regarding whether the new version of the copy was generated and stored on the operational server.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: November 3, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Inna Resnik, Zvi Schneider, Dani Shemesh
  • Patent number: 10817217
    Abstract: A data storage system can divide a semiconductor memory into a plurality of die sets prior to populating a die set queue with data access commands addressed by a remote host and having a first order. A command order strategy generated by a time-to-ready module organizes the data access commands to a second order that populate a channel queue and are executed as directed by the time-to-ready module in the second order.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: October 27, 2020
    Assignee: Seagate Technology LLC
    Inventors: Steven S. Williams, David W. Claude
  • Patent number: 10782915
    Abstract: A device controller included in a storage device includes a host controller connected to a host memory, a memory controller connected to a plurality of nonvolatile memory devices, a protocol controller configured to control data transfer between the host controller and the plurality of nonvolatile memory devices, and to perform data memory access to a data region of the host memory and non-data memory access to a non-data region of the host memory through the host controller, and a scheduler configured to re-order the data memory access and the non-data memory access such that the non-data memory access to the non-data region is performed after the data memory access to a data chunk has completed, the data chunk being successive data that is allocated within the data region by a physical region page (PRP).
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: September 22, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seon-Bong Kim, Jun-Young Jang, Jong-Hwan Kim, Ho-Jun Shim
  • Patent number: 10761732
    Abstract: A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: obtaining a usage status of a first physical unit of a rewritable non-volatile memory module for storing data from a host system; determining a first rule according to the usage status; and performing a first operation according to the first rule. The first operation includes: storing a first data from the host system into the first physical unit; and storing a second data from the rewritable non-volatile memory module into a second physical unit, where the first rule corresponds to a first ratio between a data volume of the first data and a data volume of the second data. Accordingly, the memory storage device can store external and internal data stably.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: September 1, 2020
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Po-Wen Hsiao, Hsueh-Chi Lu
  • Patent number: 10747677
    Abstract: A storage system comprises a plurality of storage devices and an associated storage controller. The plurality of storage devices are configured to store a plurality of logical units (LUNs) and snapshot data structures associated with the plurality of LUNs. The storage controller is configured to determine a mapping of a logical address associated with a pending read or write operation to a snapshot address associated with a given snapshot data structure of the storage system that comprises a plurality of nodes generated during point-in-time snapshots taken based on at least one of the LUNs, lock at least a portion of the given snapshot data structure during the read or write operation based on the determined mapping, and release the lock on the at least a portion of the given snapshot data structure in response to a completion of the read or write operation.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: August 18, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Vladimir Shveidel, Lior Kamran
  • Patent number: 10740244
    Abstract: A memory system includes a first and a second flash domain, a domain distributor, and a first redirector. The first and second flash domains includes first and second spare memory dies, respectively. The domain distributor is configured to generate a first logical address corresponding to first data and to generate a second logical address corresponding to second data. The first redirector is configured to receive the first data and the second data from the domain distributor and to respectively provide the first data and the second data to the first flash domain and the second flash domain. The first redirector is configured to provide a part of the second data corresponding to a first fail memory die to the first flash domain, if the second flash domain include the first fail memory die, such that the first redirector replaces the first fail memory die with the first spare memory die.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: August 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sil-wan Chang
  • Patent number: 10732889
    Abstract: An information handling system includes a first non-volatile memory, a central processing unit, and a basic input/output system (BIOS). The first non-volatile memory is divided into a plurality of namespaces including a first namespace and a second namespace. The central processing unit writes data to the first non-volatile memory by namespace of the non-volatile memory. The BIOS includes a key table. The key table stores a first key for the first non-volatile memory, a second key for the first namespace, and a third key for the second namespace. The second key is utilized to securely erase the first namespace without erasing the second namespace.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: August 4, 2020
    Assignee: Dell Products, L.P.
    Inventors: Shekar Babu Suryanarayana, Chitrak Gupta
  • Patent number: 10712968
    Abstract: Methods and apparatus are provided for protection of state information for an auxiliary storage service in a microservice architecture. An exemplary method comprises generating a snapshot of state information of an auxiliary storage service on a given storage node in a storage cluster comprised of a plurality of storage nodes; and providing the snapshot to M protector storage nodes within the plurality of storage nodes in the storage cluster, wherein the M protector storage nodes comprises a snapshot manager node and M?1 additional protector storage nodes, and wherein the M protector storage nodes are selected based on a hierarchical ranking of available storage nodes within the storage cluster arranged in a predefined configuration relative to the given storage node. The predefined configuration of the plurality of storage nodes can be, for example, a protection ring comprising a first M?1 online storage nodes that follow the snapshot manager node in the protection ring in a predefined direction.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: July 14, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Mikhail Viktorovich Danilov, Konstantin Sergeevich Buinov, Aleksander Georgievich Rakulenko, Andrey Vsevolodovich Kurilov, Kirill Viktorovich Gusakov
  • Patent number: 10691597
    Abstract: The system and method described features mechanisms from a big data analytics platform that provides the performance and energy benefits of integrated acceleration circuits such as field programmable gate arrays (FPGA), application specific integrated circuits (ASIC) or custom circuits without sacrificing the ease of developing applications on distributed cluster-computing frameworks like Apache Spark.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: June 23, 2020
    Assignee: MIFrontiers Corporation
    Inventors: Haitham Akkary, Abdulrahman Kaitoua, Raghid Morcel
  • Patent number: 10678475
    Abstract: In some examples, a tracker receives a write request that is acknowledged upon receipt by a destination media controller without waiting for achievement of persistence of write data associated with the write request. The tracker adds an identifier of the destination media controller to a tracking structure in response to the identifier not already being present in the tracking structure. The tracker sends a request to persist write operations to media controllers identified by the tracking structure.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: June 9, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Derek Alan Sherlock
  • Patent number: 10678460
    Abstract: The subject matter described herein is generally directed to detecting and managing collisions in storage. A hash identifier (ID) for a first block of data is calculated and a determination is made whether the calculated hash ID matches hash IDs associated with a storage. If the calculated hash ID matches at least one of the hash IDs, the first block of data is compared with a second block of data, associated with the hash IDs, in the storage. If the first block of data is different from the second block of data based on the comparison, a hash number is associated with the calculated hash ID and the first block of data is stored in storage using the calculated hash ID and associated hash number as an index to the first block of data in the storage. In this manner, collision between data blocks is detected and prevented.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: June 9, 2020
    Assignee: VMware, Inc.
    Inventor: Dave Smith-Uchida