Abstract: A device includes an overlay mechanism, system with devices each including an overlay mechanism with an individually programmable delay or method for overlaying data. A method for overlaying data includes redirecting an access which is directed to a first memory location to a second memory location. The method for overlaying data selectively delays access to the second memory location in case of a redirection by a time.

Abstract: A memory system includes: a memory device suitable for including a plurality of pages where data are stored and a plurality of memory blocks including the pages; and a controller suitable for receiving a plurality of commands from a host, performing command operations in response to the commands in the memory blocks, updating map data for the memory blocks according to the command operations being performed, and registering information on the map data in a data table for each of the memory blocks.

Abstract: Embodiments of the invention are directed to systems, methods, and computer program products for verifying, storing, and transferring data within an entity. The system is configured for receiving data from one or more source systems, generating a metadata, exposure, and control statement for the data, transferring the data and the metadata, exposure, and control statement to a system of origination, logically classifying the data in the system of record into one or more domains, transferring the data into one or more authorized data sources associated with the one or more domains, receiving a request from a user associated with a target system to retrieve a set of data from the one or more authorized data sources, and transferring the set of data from the one or more authorized data sources to the target system.

Abstract: Techniques for processing I/O operations may include: receiving, at a first data storage system from a host, a write operation that writes data to a logical device; sending the write operation in a synchronous manner to a plurality of other data storage systems, wherein the first data storage system and the plurality of other data storage systems form a linear chain over which the write operation is transmitted; and sending an acknowledgement to the host regarding completion of the write operation only after the first data storage system and each of the plurality of other data storage systems have acknowledged completion of the write operation.

Abstract: A semiconductor memory apparatus may include a data control circuit, an input/output circuit block, and a data line repeater block. The data control circuit may generate a data control flag signal based on an operation control signal and data. The input/output circuit block may perform a data bus inversion operation for the data, based on the data control flag signal. The data line repeater block may perform a data masking operation for the data based on the data control flag signal.

Abstract: A computerized method is disclosed in which an automation device stores, in a parameter storage, application-related parameters, each parameter uniquely identifying a specific automation device application. The automation device also stores, in an application repository, automation device applications as separate computer program entities. The automation device may detect a pre-determined act, performed by a user, the predetermined act comprising the user selecting via a user interface an application-related parameter among the application-related parameters stored in the parameter storage. Based on the detecting, the automation device retrieves, from the application repository to an execution memory, the automation device application corresponding to the selected application-related parameter, wherein the retrieved automation device application is executable from the execution memory, in order to drive the automation device for an application-related purpose.

Abstract: Aspects of the disclosure provide for managing a logical to physical (L2P) table in a Solid State Drive (SSD). Methods and apparatus provide for using a non-volatile memory (NVM) to store the L2P table in its entirety, where the L2P table is separated into a plurality of partitions. The SSD is partitioned into front and back-end processing portions where a partition table is managed by the back-end portion and includes one or more addresses of partitioned portions of the plurality partitions of the L2P table stored in the NVM. The back-end processing portion receives requests from the host via the front-end processing portion and accesses the partition table for scheduling read or write access to the NVM by determining one or more addresses of the respective partitioned portions of the plurality partitions of the L2P table stored in the NVM from the partition table.

Abstract: An apparatus and method are provided for making efficient use of address translation cache resources. The apparatus has an address translation cache having a plurality of entries, where each entry is used to store address translation data used when converting a virtual address into a corresponding physical address of a memory system. Each item of address translation data has a page size indication for a page within the memory system that is associated with that address translation data. Allocation circuitry performs an allocation process to determine the address translation data to be stored in each entry. Further, mode control circuitry is used to switch a mode of operation of the apparatus between a non-skewed mode and at least one skewed mode, dependent on a page size analysis operation.

Abstract: Systems and Methods for data storage in a distributed storage network are disclosed. Unexpected errors can adversely affect consistency of both the content of a write (including the slice data), and the synchronicity between the written slices and metadata structures. To maintain consistency between these data structures, a sequencing of the order of writes and flushes to the memory devices for the different data structures may be enforced as follows: First: Slice content data is first written to the volatile memory (e.g. a cache memory) of a DS unit; Second: the Slice content data stored in volatile memory is “flushed” to a non-volatile bin (which bin is associated with a group of physical memory blocks in non-volatile memory); Third: after the flush of the slice content data to the bin (i.e. data is durable on the media device): metadata relating to the data is written.

Abstract: Presented herein are system and method for providing a non-disruptive mechanism for splitting a parent volume located on a first aggregate into a new volume, the method comprising: splitting the parent volume, by the network storage system, into a new volume, wherein the new volume comprises an application; and providing a snapshot of the parent volume at the new volume.

Abstract: An industrial process control system comprises a primary controller coupled with a buffer and a primary memory. The primary controller is configured to create at least one redundant data type based on at least one base data type. The at least one redundant data type includes tracked operators that are different from corresponding operators of the at least one base data type. The tracked operators include an assignment function that is a same assignment function performed by the corresponding operators of the at least one base data type, and a transfer function. The primary controller is further configured to perform the assignment function on a piece of data to assign the piece of data to an address in the primary memory, perform the transfer function to transfer the piece of data to a buffer, and transfer contents of the buffer to a backup memory.

Abstract: In an example, an apparatus may include a memory comprising a number of groups of memory cells and a controller coupled to the memory and configured to track respective invalidation velocities of the number of groups of memory cells and to assign categories to the number of groups of memory cells based on the invalidation velocities.

Abstract: A data transfer training method includes determining whether a program data transfer training command or a read data transfer training command is received from a host device; transferring normal program signals to non-training memory devices among a plurality of memory devices and performing a program data transfer training to a training memory device among a plurality of memory devices while performing normal program operations to the non-training memory devices in response to a received program data transfer training command; and transferring normal read signals to the non-training memory devices, and performing a read data transfer training to the training memory device while performing normal read operations to the non-training memory devices in response to a received read data transfer training command.

Abstract: A memory system may include: a memory device including a plurality of memory blocks, each memory block including a plurality of pages, each page including a plurality of memory cells operatively coupled to a word line for storing data; and a controller including a memory, the controller being suitable for performing a command operation corresponding to a command received from a host, storing data segments of user data and meta segments of metadata for the its command operation in the memory, storing the data segments in first pages included in a first memory block among the memory blocks, storing the meta segments in second pages included in the first memory block, and storing segment informations for the meta segments, in spare regions of the second pages.

Abstract: Memory management systems and methods are provided in which n-bit translation counters are included within page table entry (PTE) data structures to count of number of times that translations are performed using the PTEs of pages. For example, a method for managing memory includes: receiving a virtual address from an executing process, wherein the virtual address references a virtual page frame number (VPFN) in a virtual address space associated with the executing process; accessing a PTE for translating the VPFN to a page frame number (PFN) in physical memory; incrementing a n-bit translation counter within the accessed PTE in response to the translating; and accessing a memory location within the PFN in the physical memory, which corresponds to the virtual address.

Abstract: A method of controlling access to a flash memory device having multiple sectors divided into multiple blocks of memory, including accepting a virtual block address, calculating a set of possible sectors that can be used for storing data having the virtual block address based on a predefined function, reading meta-data of each sector from the set of possible sectors, wherein the meta-data of a sector includes information for each block in the sector indicating if the block is currently in use and the virtual block address of the data stored in the block, determining the physical block address of the virtual block address if the data is currently stored in a block in the possible sectors or if a block is currently allocated to store the data, wherein the set of possible sectors is distinct for each virtual block address.

Abstract: A non-volatile memory device uses physical authentication to enable the secure programming of a boot partition, when the boot partition is write protected. This physical authentication can also be used to enable other features/functions.

Abstract: A method includes generating a map for a storage tier. The map maps a plurality of extents to physical locations on the storage tier and is implemented as a tree with each extent to physical location mapping being one of a plurality of leaf extent nodes of the tree. Individual ones of the plurality of leaf extent nodes are compressed into small extent nodes. Different groups of the small extent nodes are associated with carrier nodes. A command that involves an extent of the plurality of extents, which is represented by a small extent node in one of the carrier nodes, is received from a host. A decompression operation is performed on the small extent node in the carrier node to provide a leaf extent node for the extent associated with the host command. An extent node operation is performed on the leaf extent node for the extent.

Abstract: A data management method includes steps of: receiving a read command; reading a page containing target data from a non-volatile memory when the target data corresponding to the read command is stored in the non-volatile memory; determining whether a count of reading of the page is greater than a read threshold; and if false, storing at least one record of subsequent data into a first storage space of a data buffering storage device; or if true, storing the at least one record of subsequent data into a second storage space of the data buffering storage device. Both of the target data and the at least one record of subsequent data are stored in the page, and the target data and the at least one record of subsequent data have a sequential relationship in terms of data reading. Another data management method and a corresponding data storage device are also provided.