Abstract: A method is described. The method includes simulating execution of an image processing application software program. The simulating includes intercepting kernel-to-kernel communications with simulated line buffer memories that store and forward lines of image data communicated from models of producing kernels to models of consuming kernels. The simulating further includes tracking respective amounts of image data stored in the respective line buffer memories over a simulation runtime. The method also includes determining respective hardware memory allocations for corresponding hardware line buffer memories from the tracked respective amounts of image data. The method also includes generating configuration information for an image processor to execute the image processing application software program. The configuration information describes the hardware memory allocations for the hardware line buffer memories of the image processor.

Abstract: A graphics processing method is provided, adapted to a graphic processing unit, the steps including: receiving, via a CSP, a first command associated with all render targets from a display driver; determining, via the display driver, sizes and areas of a plurality of tiles in each frame; repeatedly controlling, via a scissor pool unit, a graphics processing unit to perform drawing processing for each tile according to the first command; comparing, via a signature comparing unit of a cache memory, a signature of a current tile of a current frame and a signature of a tile corresponding to the same position of a previous frame and generating a comparison result; and determining whether to flush the dirty data of the current tile stored in the cache memory from the cache memory to a memory access unit according to the comparison result.

Abstract: A method for processing images, including: determining, subsequent to transmitting content of a target image corresponding to a current processing request to a processor, whether the target image is being used by other processing requests; and in response to the determination that the target image is not being used by the other processing requests, releasing memory utilized by the target image at a target memory, the target memory being used to store a copy corresponding to the target image.

Abstract: Systems, methods, and computer readable media to manage memory cache for graphics processing are described. A processor creates a resource group for a plurality of graphics application program interface (API) resources. The processor subsequently encodes a set command that references the resource group within a command buffer and assigns a data set identifier (DSID) to the resource group. The processor also encodes a write command within the command buffer that causes the graphics processor to write data within a cache line and mark the written cache line with the DSID, a read command that causes the graphics processor to read data written into the resource group, and a drop command that causes the graphics processor to notify the memory cache to drop, without flushing to memory, data stored within the cache line.

Abstract: An electronic device includes a display, a processor generating image data, a graphic random access memory (GRAM) storing the image data, and a display driver integrated circuit for driving the display. The display driver integrated circuit is configured to select a part of the image data and to output the selected part to a specified area of the display.

Abstract: A system and method including, in some embodiments, receiving a request for a graphics memory address for an input/output (I/O) device assigned to a virtual machine in a system that supports virtualization, and installing, in a graphics memory translation table, a physical guest graphics memory address to host physical memory address translation.

Abstract: Devices for coordinating or establishing a direct memory access for a network interface card to a graphics processing unit, and for a network interface card to access a graphics processing unit via a direct memory access are disclosed. For example, a central processing unit may request a graphics processing unit to allocate a memory buffer of the graphics processing unit for a direct memory access by a network interface card and receive from the graphics processing unit a first confirmation of an allocation of the memory buffer. The central processing unit may further transmit to the network interface card a first notification of the allocation of the memory buffer of the graphics processing unit, poll the network interface card to determine when a packet is received by the network interface card, and transmit a second notification to the graphics processing unit that the packet is written to the memory buffer.

Abstract: Described herein is a pooling method, device, and system, computer-readable storage medium. The pooling method, comprising: acquiring pixel data of each row where a pooling window is located row by row, each time after the pooling window is moved vertically, wherein the size of the pooling window is N×N, N is a positive integer; writing the acquired pixel data of the first N?1 rows or a pre-pooling result thereof into a cache; and performing a pooling operation on the pixel data of last row where the pooling window being located and pixel data in the cache, when the pixel data of last row being acquired; outputting a pooling result of the pooling operation. The technical solution of the invention may improve the pooling efficiency and the system performance.

Abstract: One embodiment provides for a general-purpose graphics processing device comprising a general-purpose graphics processing compute block to process a workload including graphics or compute operations, a first cache memory, and a coherency module enable the first cache memory to coherently cache data for the workload, the data stored in memory within a virtual address space, wherein the virtual address space shared with a separate general-purpose processor including a second cache memory that is coherent with the first cache memory.

Abstract: An information processing device includes: a timing controller; a system device; and a display panel. The system device operates in accordance with at least a first operating system (OS) and a second OS, and outputs first original image data from the first OS and second original image data from the second OS to the timing controller. The display panel includes a plurality of pixels arranged in a predetermined display area. The timing controller includes: a memory; a writing unit; and a reading unit. The memory has a storage area associated with the display area. The writing unit stores the first original image data in a first individual storage area assigned to the first OS in the storage area, and stores the second original image data in a second individual storage area assigned to the second OS in the storage area. The reading unit reads image data stored in the storage area, frame by frame, and outputs the image data to the display panel.

Abstract: A method for compressing normal maps in a computer system. The method includes accessing a map of input normals. A memory block having a first portion and a second portion is defined. A table of indices is stored in the first portion of the memory block and a table of normals is stored in the second portion of the memory block. The indices of the first portion of the memory block reference the normals of the second portion. The normals in the second portion of the memory block are unit normals of a sphere defined to represent the map of input normals.

Abstract: Determining a schedule of instructions for an integrated circuit graphics pipeline. The method includes accessing a state of a host system. The state comprises operations to be performed on fragments to be processed by the graphics pipeline. The method further includes determining a vector based on the state and indexing a table based on the vector to obtain a predetermined listing and ordering of macro-operations to be executed. The method still further includes determining instructions for programming the graphics pipeline based the executing of the macro-operations in the scheduled order.

Abstract: Multiple Video Graphic Adapters (VGAs) are used to render video data to a common port. In one embodiment, each VGA will render an entire frame of video and provide it to the output port through a switch. The next adjacent frame will be calculated by a separate VGA and provided to an output port through the switch. A voltage adjustment is made to a digital-to-analog converter (DAC) of at least one of the VGAs in order to correlate the video-out voltages being provided by the VGAs. This correlation assures that the color being viewed on the screen is uniform regardless of which VGA is providing the signal. A dummy switch receives the video-output from each of the VGAs. When a VGA is not providing information to the output port, the dummy switch can be selected to provide the video-output of the selected VGA a resistance path which matches the resistance at the video port. This allows the video graphics controller to maintain a constant thermal state.

Abstract: This output device includes a read means which reads in image data of a first aspect ratio from an input port or from a medium. Moreover, this output device includes an image synthesis means which creates combined image data of a second aspect ratio by adding mask bands at the sides of, or above and below, an image which is based upon the image data of said first aspect ratio. Furthermore, this output device includes an output means which outputs this combined image data at said second aspect ratio. And the output means is connected to a display device which processes said combined image data which has been outputted at said second output ratio, and displays the result upon a screen. Moreover, the image synthesis means changes the color of said mask bands to a different color at a predetermined timing during a predetermined time period.

Abstract: Exemplary embodiments of methods, apparatuses, and systems for seamlessly migrating a user visible display stream sent to a display device from one rendered display stream to another rendered display stream are described. For one embodiment, mirror video display streams are received from both a first graphics processing unit (GPU) and a second GPU, and the video display stream sent to a display device is switched from the video display stream from the first GPU to the video display stream from the second GPU, wherein the switching occurs during a blanking interval for the first GPU that overlaps with a blanking interval for the second GPU.

Abstract: Some embodiments provide a system that executes a web application. During operation, the system loads the web application in a web browser and loads a native code module associated with the web application into a secure runtime environment. Next, the system writes a set of rendering commands to a command buffer using the native code module and concurrently reads the rendering commands from the command buffer. Finally, the system renders an image for use by the web application by executing the rendering commands using a graphics-processing unit (GPU).

Abstract: A system and method for utilizing a spatial three-dimensional display unit with a medical diagnostic imaging system is disclosed. The medical diagnostic imaging system may be a picture archival communication system. The system may include at least one two-dimensional display unit and an additional spatial three-dimensional display unit. Accordingly a user may view two and three-dimensional images of similar anatomical objects. The two and three-dimensional images may be linked, providing the user with a consistent viewing angle. The system may be used to review a surgical path. The display parameters of a first three-dimensional data set may be mapped to a second three-dimensional data set. The surgical path of the first data set and the second data set may be displayed on spatial display units. Accordingly, the anatomical objects along the surgical path may be viewed at different points in time, for example prior to surgery and after surgery.

Abstract: A system and a method are disclosed for updating a bi-stable display includes a framebuffer for storing waveforms for each pixel individually. The system includes determining a current state of a pixel of the bi-stable display; determining a desired state of the pixel of the bi-stable display; and updating the pixel by applying a determined control signal to the pixel to drive the pixel from the current state to the final state. Updating each pixel occurs independently of the other pixels of the bi-stable display.

Abstract: An image generation apparatus provides interpolation and distortion correction. The interpolation and distortion correction may be provided in one or two dimensions. Nonlinear image scan trajectories, such as sinusoidal and bi-sinusoidal trajectories are accommodated. Horizontal and vertical scan positions are determined using a linear pixel clock, and displayed pixel intensities are determined using interpolation techniques.

Abstract: A high-speed modeling system and a method of constructing a model are disclosed herein. In one embodiment, the system comprises first and second cameras, a control portion to synchronize the first and second cameras, and a projector of electromagnetic patterns. The first and second cameras are synchronized by the control portion to generate second frames a time interval after first frames are generated to thereby obtain a high frame-rate which is higher than the frame-rate of the first camera. Multiple imaging stations comprising first and second cameras may be directed to the path traveled by a mass at a high speed, in a prescribed arrangement, to model the mass with the high frame-rate system.