Patents Examined by Joni Hsu
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Patent number: 11521351Abstract: In an example, a method includes acquiring, at a processor, a data model of an object to be generated in additive manufacturing, the data model comprising object model data representing a slice of the object model as a plurality of polygons and object property data comprising property data associated with the plurality of polygons. The slice may be inspected from a predetermined perspective at a plurality of discrete locations. It may be determined if each location is within a face of a polygon, and if so, the object property data associated with that polygon may be identified and associated with that location. The slice may further be inspected at a plurality of discrete locations along an edge of a polygon, the object property data associated with each location may be identified and associated with that location.Type: GrantFiled: July 10, 2017Date of Patent: December 6, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Josh Shepherd, Matthew A Shepherd
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Patent number: 11501406Abstract: Methods, devices, systems and computer software/program code products improve the reliability of scene reconstruction through the use of a persistent store or cache to retain scene information observed across one or more previous frames.Type: GrantFiled: December 5, 2018Date of Patent: November 15, 2022Assignee: MINE ONE GMBHInventors: James A. McCombe, Christoph Birkhold
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Patent number: 11484946Abstract: An apparatus for manufacturing a three-dimensional article by additive manufacturing includes a processor and an information storage device storing software instructions. In response to execution by the processor, the software instructions cause the apparatus to: receive initial data defining the three-dimensional article having an outer surface, define a shell having the outer surface of the three-dimensional article and an opposing inner surface that defines an inner cavity, define a transition zone between the inner surface of the shell and a boundary that is inside the inner cavity and generally follows the inner surface of the shell, define a lattice of arrayed unit cells that fill the inside of the boundary, the lattice is defined by connected lattice segments, and define transition segments that couple the lattice to the inner surface of the shell.Type: GrantFiled: September 30, 2019Date of Patent: November 1, 2022Assignee: 3D SYSTEMS, INC.Inventors: Evan Kuester, Patrick Dunne
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Patent number: 11487847Abstract: Techniques that facilitate matrix factorization associated with graphics processing units are provided. In one example, a system includes a first graphics processing unit, a second graphics processing unit and a central processing unit. The first graphics processing unit processes a first data block of a data matrix associated with a matrix factorization system to generate first information for the matrix factorization system. The second graphics processing unit processes a first portion of a second data block of the data matrix separate from a second portion of the second data block to generate second information for the matrix factorization system. The central processing unit processes a machine learning model for the matrix factorization system based on at least the first information provided by the first graphics processing unit and the second information provided by the second graphics processing unit.Type: GrantFiled: May 6, 2021Date of Patent: November 1, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Evelyn Duesterwald, Liana Liyow Fong, Wei Tan, Xiaolong Xie
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Patent number: 11488002Abstract: Disclosed are methods, apparatus and systems for a binary neural network accelerator engine. One example circuit is designed to perform a multiply-and-accumulate (MAC) operation using logic circuits that include a first set of exclusive nor (XNOR) gates to generate a product vector based on a bit-wise XNOR operation two vectors. The result is folded and operated on by another set of logic circuits that provide an output for a series of adder circuits. The MAC circuit can be implemented as part of binary neural network at a small footprint to effect power and cost savings.Type: GrantFiled: February 15, 2019Date of Patent: November 1, 2022Assignee: ATLAZO, INC.Inventors: Javid Jaffari, Karim Arabi, Rodolfo Beraha
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Patent number: 11484080Abstract: A tool allows a user to create new designs for apparel and preview these designs in three dimensions before manufacture. Software and lasers are used in finishing apparel to produce a desired wear pattern or other design. Based on a laser input file with a pattern, a laser will burn the pattern onto apparel. With the tool, the user will be able to create, make changes, and view images of a design, in real time, before burning by a laser. Input to the tool includes fabric template images, laser input files, and damage input. The tool allows adding of tinting and adjusting of intensity and bright point. The user can also move, rotate, scale, and warp the image input.Type: GrantFiled: December 2, 2019Date of Patent: November 1, 2022Assignee: Levi Strauss & Co.Inventors: Benjamin Bell, Jennifer Schultz, Christopher Schultz, Debdulal Mahanty, James Barton Sights
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Patent number: 11481875Abstract: A method for processing an image that can be played on a virtual device, including obtaining a super-resolution deep learning network model, which is trained to learn to reconstruct an image from low resolution to high resolution; wherein the super-resolution deep learning network model includes a plurality of feature filters to extract features of the image; modifying the resolution of the feature filters from a preset value to an established value, wherein the established value is higher than the preset value; inputting a low-resolution image into the super-resolution deep learning network model; and increasing the resolution of the low-resolution image to become a high-resolution image through the super-resolution deep learning network model.Type: GrantFiled: March 9, 2021Date of Patent: October 25, 2022Assignee: ACER INCORPORATEDInventors: Shih-Hao Lin, Chao-Kuang Yang, Wen-Cheng Hsu, Liang-Chi Chen
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Patent number: 11475173Abstract: A method in a computer aided drafting application for replicating a component mating in a modeled assembly includes examining constraints and geometry surrounding a selected component of the component mating in a first surface of the assembly. A first descriptor with a plurality of numerical characteristics of the constraints and geometry is captured. The first descriptor is set as a first seed descriptor. A potential first target geometry in the region of the first face is examined and a first target descriptor is computed according to the first target geometry. If first seed descriptor matches the first target descriptor, an instance of a first target component is created according to the first target descriptor.Type: GrantFiled: December 31, 2020Date of Patent: October 18, 2022Assignee: Dassault Systémes SolidWorks CorporationInventors: Jody Stiles, Makarand Apte, Chin-Loo Lama, Girish Mule, Shrikant Savant
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Patent number: 11475621Abstract: A computer-implemented method simulates an atmospheric phenomenon within a simulation volume. At each time step of a plurality of time steps, the method automatically determines a temperature distribution of the atmospheric phenomenon based on an assumption of fixed volume, and then automatically determines a velocity field of the atmospheric phenomenon, based on an assumption of adiabatic expansion.Type: GrantFiled: March 30, 2021Date of Patent: October 18, 2022Assignee: Unity Technologies SFInventors: Ken Museth, Alexey Stomakhin
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Patent number: 11475862Abstract: One example of a device includes a display screen, a machine readable storage medium storing instructions and Extended Display Identification Data (EDID) data, and a processor. The processor is to execute the instructions to provide an on-screen display control to enable a user to select one of a plurality of EDID standards and format the EDID data based on the selected EDID standard.Type: GrantFiled: July 7, 2017Date of Patent: October 18, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: John W Frederick, Tim Guynes, Greg Staten, Syed S Azam
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Patent number: 11467560Abstract: An engineering support system that supports engineering of a process control system, includes: a storage; and a processor connected to the storage and that: transforms design drawings into semantic models and outputs the semantic models to the storage; and generates a combined semantic model by combining the semantic models based on a degree of similarity among the semantic models and outputs the combined semantic model to the storage, wherein each of the semantic models is expressed by first information indicating elements included in the design drawings and second information indicating a relationship between the elements.Type: GrantFiled: December 23, 2019Date of Patent: October 11, 2022Assignee: YOKOGAWA ELECTRIC CORPORATIONInventors: Isao Hirooka, Tatenobu Seki, Takahiro Kambe, Yuta Machida, Yuri Kimura, Masato Annen, Nobuaki Ema
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Patent number: 11443405Abstract: A processing apparatus is described. The apparatus includes a plurality of processing cores, including a first processing core and a second processing core a first field programmable gate array (FPGA) coupled to the first processing core to accelerate execution of graphics workloads processed at the first processing core and a second FPGA coupled to the second processing core to accelerate execution of workloads processed at the second processing core.Type: GrantFiled: May 17, 2021Date of Patent: September 13, 2022Assignee: Intel IP CorporationInventors: Carsten Benthin, Sven Woop, Ingo Wald
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Patent number: 11442681Abstract: The present invention provides a full-screen display method for an upright image that includes the following steps: reading the resolution of the second image, the resolution of the second image is a:b; extracting from the said second image to generate the third image, the resolution of the third image is b:a; the center line of the second image and of the third image coincide in both the horizontal and vertical directions; the number of pixels of the second image in the vertical direction is the same as that of the third image in the vertical direction; rotating the third image by 90 degrees along the set direction generates the fourth image; and finally displaying the fourth image full-screen on the said display device. The present invention also provides the mirroring same-screen device, the display device, the full-screen display system for upright images, and the computer readable storage medium to perform the previous steps of the full-screen display method for upright images.Type: GrantFiled: November 29, 2019Date of Patent: September 13, 2022Assignee: Actions Microelectronics Co., Ltd.Inventors: Zhengfeng Li, Jianzhang Zheng, Yingrui Li
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Patent number: 11443403Abstract: An image captured using an image sensor is processed to determine control statistics and to produce an altered image which can be output for display or further processing at an image capture device, and the image is then processed according to the control statistics to produce a processed image which can be output for display or further processing at the image capture device or at another device. The altered image may have a lower resolution than the processed image. The image may be stored in a buffer. For example, the image may be retrieved from the buffer to produce the altered image, and again retrieved from the buffer to produce the processed image. The altered image may replace the image within the buffer. For example, the processed image may be produced to represent the altered image at a higher resolution.Type: GrantFiled: November 13, 2020Date of Patent: September 13, 2022Assignee: GoPro, Inc.Inventors: Etienne Terree, Jerome Labarthe, Romain Gounelle, Anandhakumar Chinnaiyan
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Patent number: 11442528Abstract: An electronic device may include a display panel to display images based on corresponding image data and an image source to pre-render a flip-book including a first image frame for display at a first target presentation time and a second image frame for display at a second target presentation time. The electronic device may also include a display pipeline coupled between the display panel and the image source having image data processing circuitry to process image data for display. The electronic device may also include a controller to instruct the display pipeline to process image data, to determine a power-on time based on a target presentation time, and to instruct the display pipeline to power-gate the image data processing circuitry upon completion of the processing of image data and until the power-on time is reached.Type: GrantFiled: March 8, 2021Date of Patent: September 13, 2022Assignee: Apple Inc.Inventors: Peter F. Holland, Brad W. Simeral, Lior Zimet
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Patent number: 11436695Abstract: One embodiment provides for a general-purpose graphics processing device comprising a general-purpose graphics processing compute block to process a workload including graphics or compute operations, a first cache memory, and a coherency module enable the first cache memory to coherently cache data for the workload, the data stored in memory within a virtual address space, wherein the virtual address space shared with a separate general-purpose processor including a second cache memory that is coherent with the first cache memory.Type: GrantFiled: March 12, 2021Date of Patent: September 6, 2022Assignee: Intel CorporationInventors: Joydeep Ray, Altug Koker, James A. Valerio, David Puffer, Abhishek R. Appu, Stephen Junkins
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Patent number: 11436014Abstract: Disclosed herein is a processor for deep learning. In one embodiment, the processor comprises: a load and store unit configured to load and store image pixel data and stencil data; a register unit, implementing a banked register file, configured to: load and store a subset of the image pixel data from the load and store unit, and concurrently provide access to image pixel values stored in a register file entry of the banked register file, wherein the subset of the image pixel data comprises the image pixel values stored in the register file entry; and a plurality of arithmetic logic units configured to concurrently perform one or more operations on the image pixel values stored in the register file entry and corresponding stencil data of the stencil data.Type: GrantFiled: June 23, 2021Date of Patent: September 6, 2022Assignee: Deep Vision, Inc.Inventors: Wajahat Qadeer, Rehan Hameed
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Patent number: 11430083Abstract: Techniques to improve performance of matrix multiply operations are described in which a compute kernel can specify one or more element-wise operations to perform on output of the compute kernel before the output is transferred to higher levels of a processor memory hierarchy.Type: GrantFiled: March 5, 2021Date of Patent: August 30, 2022Assignee: Intel CorporationInventors: Eriko Nurvitadhi, Balaji Vembu, Tsung-Han Lin, Kamal Sinha, Rajkishore Barik, Nicolas C. Galoppo Von Borries
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Patent number: 11431879Abstract: Techniques for selective display frame fetching can include receiving or fetching rendered display frames by a display engine. The display engine can obtain an indication of a new frame and, in response to the indication of the new frame not including an indication of a flip completion event: (i) fill the display buffer with the new frame; (ii) scan out the new frame from the display buffer to a display port; and (iii) apply an adaptive contrast and backlight enhancement based on a histogram of changes in the new frame.Type: GrantFiled: March 15, 2021Date of Patent: August 30, 2022Assignee: Intel CorporationInventors: Jason Tanner, Paul Diefenbaugh, Vishal Sinha, Arthur Runyan, Gary K. Smith, Kathy Bui, Yifan Li, Shirley Huang Meterelliyoz
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Patent number: 11416642Abstract: Various embodiments include a method for preparing a three-dimensional model for a fabrication component in the context of production for data transmission to different receiving entities comprising: receiving three-dimensional model data via an input interface; providing a detail-state for processing of the three-dimensional model on the respective receiving entity; and executing a reduction algorithm on a reference version of the received three-dimensional model data for automatically calculating and providing a reduced reference version with the provided detail-state.Type: GrantFiled: April 25, 2019Date of Patent: August 16, 2022Assignee: SIEMENS AKTIENGESELLSCHAFTInventors: Stefan Krause, Christian Lipp, Alexander Nowitschkow, Peter Robl